<feed xmlns='http://www.w3.org/2005/Atom'>
<title>wireguard-linux/Documentation/devicetree/bindings/net/dsa, branch jd/unified-crypt-queue</title>
<subtitle>WireGuard for the Linux kernel</subtitle>
<id>https://git.zx2c4.com/wireguard-linux/atom/Documentation/devicetree/bindings/net/dsa?h=jd%2Funified-crypt-queue</id>
<link rel='self' href='https://git.zx2c4.com/wireguard-linux/atom/Documentation/devicetree/bindings/net/dsa?h=jd%2Funified-crypt-queue'/>
<link rel='alternate' type='text/html' href='https://git.zx2c4.com/wireguard-linux/'/>
<updated>2020-02-24T23:12:10Z</updated>
<entry>
<title>dt-bindings: net: dsa: ocelot: document the vsc9959 core</title>
<updated>2020-02-24T23:12:10Z</updated>
<author>
<name>Vladimir Oltean</name>
<email>vladimir.oltean@nxp.com</email>
</author>
<published>2020-02-24T12:15:34Z</published>
<link rel='alternate' type='text/html' href='https://git.zx2c4.com/wireguard-linux/commit/?id=37b558f6cda6c8cf8045c419e8ed38d2de551016'/>
<id>urn:sha1:37b558f6cda6c8cf8045c419e8ed38d2de551016</id>
<content type='text'>
This patch adds the required documentation for the embedded L2 switch
inside the NXP LS1028A chip.

I've submitted it in the legacy format instead of yaml schema, because
DSA itself has not yet been converted to yaml, and this driver defines
no custom bindings.

Signed-off-by: Vladimir Oltean &lt;vladimir.oltean@nxp.com&gt;
Reviewed-by: Andrew Lunn &lt;andrew@lunn.ch&gt;
Signed-off-by: David S. Miller &lt;davem@davemloft.net&gt;
</content>
</entry>
<entry>
<title>dt-bindings: net: dsa: qca, ar9331 switch documentation</title>
<updated>2019-12-21T01:05:47Z</updated>
<author>
<name>Oleksij Rempel</name>
<email>o.rempel@pengutronix.de</email>
</author>
<published>2019-12-18T08:02:12Z</published>
<link rel='alternate' type='text/html' href='https://git.zx2c4.com/wireguard-linux/commit/?id=dba261f35d16a8e4b70962d0f8391290510a8201'/>
<id>urn:sha1:dba261f35d16a8e4b70962d0f8391290510a8201</id>
<content type='text'>
Atheros AR9331 has built-in 5 port switch. The switch can be configured
to use all 5 or 4 ports. One of built-in PHYs can be used by first built-in
ethernet controller or to be used directly by the switch over second ethernet
controller.

Signed-off-by: Oleksij Rempel &lt;o.rempel@pengutronix.de&gt;
Signed-off-by: David S. Miller &lt;davem@davemloft.net&gt;
</content>
</entry>
<entry>
<title>dt-bindings: net: dsa: mt7530: Add support for port 5</title>
<updated>2019-09-04T22:28:23Z</updated>
<author>
<name>René van Dorst</name>
<email>opensource@vdorst.com</email>
</author>
<published>2019-09-02T13:02:25Z</published>
<link rel='alternate' type='text/html' href='https://git.zx2c4.com/wireguard-linux/commit/?id=4f358cbd054d905329718443a4dd781d26ea1079'/>
<id>urn:sha1:4f358cbd054d905329718443a4dd781d26ea1079</id>
<content type='text'>
MT7530 port 5 has many modes/configurations.
Update the documentation how to use port 5.

Signed-off-by: René van Dorst &lt;opensource@vdorst.com&gt;
Cc: devicetree@vger.kernel.org
Cc: Rob Herring &lt;robh@kernel.org&gt;
Reviewed-by: Rob Herring &lt;robh@kernel.org&gt;
Signed-off-by: David S. Miller &lt;davem@davemloft.net&gt;
</content>
</entry>
<entry>
<title>Merge git://git.kernel.org/pub/scm/linux/kernel/git/netdev/net</title>
<updated>2019-09-02T18:20:17Z</updated>
<author>
<name>David S. Miller</name>
<email>davem@davemloft.net</email>
</author>
<published>2019-09-02T18:20:17Z</published>
<link rel='alternate' type='text/html' href='https://git.zx2c4.com/wireguard-linux/commit/?id=765b7590c92d849806e9a27ab3a5a17cfc6a47a9'/>
<id>urn:sha1:765b7590c92d849806e9a27ab3a5a17cfc6a47a9</id>
<content type='text'>
r8152 conflicts are the NAPI fixes in 'net' overlapping with
some tasklet stuff in net-next

Signed-off-by: David S. Miller &lt;davem@davemloft.net&gt;
</content>
</entry>
<entry>
<title>dt-bindings: net: dsa: document additional Microchip KSZ8563 switch</title>
<updated>2019-09-01T06:36:37Z</updated>
<author>
<name>Razvan Stefanescu</name>
<email>razvan.stefanescu@microchip.com</email>
</author>
<published>2019-08-30T07:52:01Z</published>
<link rel='alternate' type='text/html' href='https://git.zx2c4.com/wireguard-linux/commit/?id=de5eb9e00eba00783f49da37377bd2a93d38fe42'/>
<id>urn:sha1:de5eb9e00eba00783f49da37377bd2a93d38fe42</id>
<content type='text'>
It is a 3-Port 10/100 Ethernet Switch with 1588v2 PTP.

Signed-off-by: Razvan Stefanescu &lt;razvan.stefanescu@microchip.com&gt;
Signed-off-by: David S. Miller &lt;davem@davemloft.net&gt;
</content>
</entry>
<entry>
<title>dt-bindings: net: dsa: marvell: add 6220 model to the 6250 family</title>
<updated>2019-08-03T00:58:53Z</updated>
<author>
<name>Hubert Feurstein</name>
<email>h.feurstein@gmail.com</email>
</author>
<published>2019-07-31T08:23:47Z</published>
<link rel='alternate' type='text/html' href='https://git.zx2c4.com/wireguard-linux/commit/?id=83c5ee315f73048d0c06c5736eb8ffe4ded2b7cc'/>
<id>urn:sha1:83c5ee315f73048d0c06c5736eb8ffe4ded2b7cc</id>
<content type='text'>
The MV88E6220 is part of the MV88E6250 family.

Signed-off-by: Hubert Feurstein &lt;h.feurstein@gmail.com&gt;
Reviewed-by: Andrew Lunn &lt;andrew@lunn.ch&gt;
Signed-off-by: David S. Miller &lt;davem@davemloft.net&gt;
</content>
</entry>
<entry>
<title>dt-bindings: net: dsa: ksz: document Microchip KSZ87xx family switches</title>
<updated>2019-07-30T22:12:50Z</updated>
<author>
<name>Marek Vasut</name>
<email>marex@denx.de</email>
</author>
<published>2019-07-29T17:49:45Z</published>
<link rel='alternate' type='text/html' href='https://git.zx2c4.com/wireguard-linux/commit/?id=4c173472d051ac469f2dc816aa94484c730c7e61'/>
<id>urn:sha1:4c173472d051ac469f2dc816aa94484c730c7e61</id>
<content type='text'>
Document Microchip KSZ87xx family switches. These include
KSZ8765 - 5 port switch
KSZ8794 - 4 port switch
KSZ8795 - 5 port switch

Signed-off-by: Marek Vasut &lt;marex@denx.de&gt;
Cc: Andrew Lunn &lt;andrew@lunn.ch&gt;
Cc: David S. Miller &lt;davem@davemloft.net&gt;
Cc: Florian Fainelli &lt;f.fainelli@gmail.com&gt;
Cc: Rob Herring &lt;robh+dt@kernel.org&gt;
Cc: Tristram Ha &lt;Tristram.Ha@microchip.com&gt;
Cc: Vivien Didelot &lt;vivien.didelot@gmail.com&gt;
Cc: Woojung Huh &lt;woojung.huh@microchip.com&gt;
Cc: devicetree@vger.kernel.org
Signed-off-by: David S. Miller &lt;davem@davemloft.net&gt;
</content>
</entry>
<entry>
<title>net: dsa: Change DT bindings for Vitesse VSC73xx switches</title>
<updated>2019-07-07T21:16:32Z</updated>
<author>
<name>Pawel Dembicki</name>
<email>paweldembicki@gmail.com</email>
</author>
<published>2019-07-04T22:29:04Z</published>
<link rel='alternate' type='text/html' href='https://git.zx2c4.com/wireguard-linux/commit/?id=86116f4d649bec311bbf3ee50a1eb582e3fcfd9c'/>
<id>urn:sha1:86116f4d649bec311bbf3ee50a1eb582e3fcfd9c</id>
<content type='text'>
This commit introduce how to use vsc73xx platform driver.

Signed-off-by: Pawel Dembicki &lt;paweldembicki@gmail.com&gt;
Reviewed-by: Linus Walleij &lt;linus.walleij@linaro.org&gt;
Reviewed-by: Florian Fainelli &lt;f.fainelli@gmail.com&gt;
Signed-off-by: David S. Miller &lt;davem@davemloft.net&gt;
</content>
</entry>
<entry>
<title>dt-bindings: net: dsa: qca8k: document reset-gpios property</title>
<updated>2019-06-27T18:17:30Z</updated>
<author>
<name>Christian Lamparter</name>
<email>chunkeey@gmail.com</email>
</author>
<published>2019-06-25T08:41:50Z</published>
<link rel='alternate' type='text/html' href='https://git.zx2c4.com/wireguard-linux/commit/?id=e7dd8a894830ca2d7b96d35dd5405993b0cfe32c'/>
<id>urn:sha1:e7dd8a894830ca2d7b96d35dd5405993b0cfe32c</id>
<content type='text'>
This patch documents the qca8k's reset-gpios property that
can be used if the QCA8337N ends up in a bad state during
reset.

Signed-off-by: Christian Lamparter &lt;chunkeey@gmail.com&gt;
Signed-off-by: David S. Miller &lt;davem@davemloft.net&gt;
</content>
</entry>
<entry>
<title>net: dsa: microchip: Support optional 125MHz SYNCLKO output</title>
<updated>2019-06-15T02:11:53Z</updated>
<author>
<name>Robert Hancock</name>
<email>hancock@sedsystems.ca</email>
</author>
<published>2019-06-12T20:49:06Z</published>
<link rel='alternate' type='text/html' href='https://git.zx2c4.com/wireguard-linux/commit/?id=79c8bd15b61eca456c49d20d083f02a2614b4d12'/>
<id>urn:sha1:79c8bd15b61eca456c49d20d083f02a2614b4d12</id>
<content type='text'>
The KSZ9477 series chips have a SYNCLKO pin which by default outputs a
25MHz clock, but some board setups require a 125MHz clock instead. Added
a microchip,synclko-125 device tree property to allow indicating a
125MHz clock output is required.

Signed-off-by: Robert Hancock &lt;hancock@sedsystems.ca&gt;
Signed-off-by: David S. Miller &lt;davem@davemloft.net&gt;
</content>
</entry>
</feed>
