<feed xmlns='http://www.w3.org/2005/Atom'>
<title>wireguard-linux/Documentation/devicetree/bindings/sram, branch jd/unified-crypt-queue</title>
<subtitle>WireGuard for the Linux kernel</subtitle>
<id>https://git.zx2c4.com/wireguard-linux/atom/Documentation/devicetree/bindings/sram?h=jd%2Funified-crypt-queue</id>
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<updated>2020-03-31T15:03:17Z</updated>
<entry>
<title>dt-bindings: Add missing 'additionalProperties: false'</title>
<updated>2020-03-31T15:03:17Z</updated>
<author>
<name>Rob Herring</name>
<email>robh@kernel.org</email>
</author>
<published>2020-03-25T22:05:41Z</published>
<link rel='alternate' type='text/html' href='https://git.zx2c4.com/wireguard-linux/commit/?id=7f464532b05dadc8f96acdda7093334c863e7a06'/>
<id>urn:sha1:7f464532b05dadc8f96acdda7093334c863e7a06</id>
<content type='text'>
Setting 'additionalProperties: false' is frequently omitted, but is
important in order to check that there aren't extra undocumented
properties in a binding.

Ideally, we'd just add this automatically and make this the default, but
there's some cases where it doesn't work. For example, if a common
schema is referenced, then properties in the common schema aren't part
of what's considered for 'additionalProperties'. Also, sometimes there
are bus specific properties such as 'spi-max-frequency' that go into
bus child nodes, but aren't defined in the child node's schema.

So let's stick with the json-schema defined default and add
'additionalProperties: false' where needed. This will be a continual
review comment and game of wack-a-mole.

Signed-off-by: Rob Herring &lt;robh@kernel.org&gt;
Reviewed-by: Neil Armstrong &lt;narmstrong@baylibre.com&gt;
Acked-by: Mark Brown &lt;broonie@kernel.org&gt;
Acked-by: Jonathan Cameron &lt;Jonathan.Cameron@huawei.com&gt;
Acked-by: Alexandru Ardelean &lt;alexandru.ardelean@analog.com&gt;
Reviewed-by: Benjamin Gaignard &lt;benjamin.gaignard@st.com&gt;
Acked-by: Stephen Boyd &lt;sboyd@kernel.org&gt; # clock
Acked-by: Lee Jones &lt;lee.jones@linaro.org&gt;
</content>
</entry>
<entry>
<title>dt-bindings: sram: qcom: Clean-up 'ranges' and child node names</title>
<updated>2020-03-26T16:06:27Z</updated>
<author>
<name>Rob Herring</name>
<email>robh@kernel.org</email>
</author>
<published>2020-03-25T22:05:39Z</published>
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<id>urn:sha1:b6b76af4661bae4d3ab6a5c93e85f739d94865b6</id>
<content type='text'>
The regex for child nodes doesn't match the example. This wasn't flagged
with 'additionalProperties: false' missing. The child node schema was also
incorrect with 'ranges' property as it applies to child nodes and should
be moved up to the parent node.

Fixes: 957fd69d396b ("dt-bindings: soc: qcom: add On Chip MEMory (OCMEM) bindings")
Signed-off-by: Rob Herring &lt;robh@kernel.org&gt;
Reviewed-by: Brian Masney &lt;masneyb@onstation.org&gt;
Cc: Bjorn Andersson &lt;bjorn.andersson@linaro.org&gt;
Cc: Brian Masney &lt;masneyb@onstation.org&gt;
Cc: linux-arm-msm@vger.kernel.org
</content>
</entry>
<entry>
<title>dt-bindings: Fix dtc warnings in examples</title>
<updated>2020-02-28T20:15:52Z</updated>
<author>
<name>Rob Herring</name>
<email>robh@kernel.org</email>
</author>
<published>2020-02-21T22:27:10Z</published>
<link rel='alternate' type='text/html' href='https://git.zx2c4.com/wireguard-linux/commit/?id=51a21e0e7baf279fbd0b57f3e376f8762df8bb7d'/>
<id>urn:sha1:51a21e0e7baf279fbd0b57f3e376f8762df8bb7d</id>
<content type='text'>
Fix all the warnings in the DT binding schema examples when built with
'W=1'. This is in preparation to make that the default for examples.

Reviewed-by: Linus Walleij &lt;linus.walleij@linaro.org&gt;
Acked-by: Stephen Boyd &lt;sboyd@kernel.org&gt;
Acked-by: Sam Ravnborg &lt;sam@ravnborg.org&gt;
Acked-by: Vinod Koul &lt;vkoul@kernel.org&gt;
Acked-by: Lee Jones &lt;lee.jones@linaro.org&gt;
Acked-by: Srinivas Kandagatla &lt;srinivas.kandagatla@linaro.org&gt;
Acked-by: Mark Brown &lt;broonie@kernel.org&gt;
Acked-by: Bartosz Golaszewski &lt;bgolaszewski@baylibre.com&gt;
Cc: Daniel Lezcano &lt;daniel.lezcano@linaro.org&gt;
Cc: Kishon Vijay Abraham I &lt;kishon@ti.com&gt;
Cc: Ulf Hansson &lt;ulf.hansson@linaro.org&gt;
Cc: Dmitry Torokhov &lt;dmitry.torokhov@gmail.com&gt;
Cc: Krzysztof Kozlowski &lt;krzk@kernel.org&gt;
Cc: Kukjin Kim &lt;kgene@kernel.org&gt;
Cc: Jonathan Cameron &lt;jic23@kernel.org&gt;
Cc: Thierry Reding &lt;thierry.reding@gmail.com&gt;
Cc: Chen-Yu Tsai &lt;wens@csie.org&gt;
Cc: Maxime Ripard &lt;mripard@kernel.org&gt;
Cc: Alexandre Torgue &lt;alexandre.torgue@st.com&gt;
Cc: Maxime Coquelin &lt;mcoquelin.stm32@gmail.com&gt;
Signed-off-by: Rob Herring &lt;robh@kernel.org&gt;
</content>
</entry>
<entry>
<title>dt-bindings: sram: Convert Allwinner A10 system controller to a schema</title>
<updated>2019-12-18T01:53:57Z</updated>
<author>
<name>Maxime Ripard</name>
<email>maxime@cerno.tech</email>
</author>
<published>2019-12-09T09:34:41Z</published>
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<id>urn:sha1:e4597da1d685aff534d04fb149a9b8e79563ce7f</id>
<content type='text'>
The older Allwinner SoCs have a system controller that is supported in
Linux, with a matching Device Tree binding.

Now that we have the DT validation in place, let's convert the device tree
bindings for that controller over to a YAML schemas.

Signed-off-by: Maxime Ripard &lt;maxime@cerno.tech&gt;
[robh: fixup missing 'properties']
Signed-off-by: Rob Herring &lt;robh@kernel.org&gt;
</content>
</entry>
<entry>
<title>dt-bindings: sram: Add Allwinner SRAM compatibles</title>
<updated>2019-12-18T01:42:48Z</updated>
<author>
<name>Maxime Ripard</name>
<email>maxime@cerno.tech</email>
</author>
<published>2019-12-09T09:34:40Z</published>
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<id>urn:sha1:3538129cabaa6b57744196a2e084efa022244b00</id>
<content type='text'>
The mmio-sram binding was added missing a few SRAM sections compatible for
allwinner SoCs. Let's add them.

Signed-off-by: Maxime Ripard &lt;maxime@cerno.tech&gt;
Signed-off-by: Rob Herring &lt;robh@kernel.org&gt;
</content>
</entry>
<entry>
<title>dt-bindings: sram: Allow for more specific compatibles</title>
<updated>2019-12-18T01:42:38Z</updated>
<author>
<name>Maxime Ripard</name>
<email>maxime@cerno.tech</email>
</author>
<published>2019-12-09T09:34:39Z</published>
<link rel='alternate' type='text/html' href='https://git.zx2c4.com/wireguard-linux/commit/?id=df45bdd9f615eb7973f8e40a988e55bb5d3832c4'/>
<id>urn:sha1:df45bdd9f615eb7973f8e40a988e55bb5d3832c4</id>
<content type='text'>
Even though the generic mmio-sram binding has a list of the sections
compatible allowed, most device trees have more specific compatibles
attached to those generic ones.

This creates warnings at the moment, and we don't really want to cripple
the generic binding with all the vendor specific combinations that would
prove to be hard to maintain.

Let's allow additional compatibles for the sections, and then we can have
the vendor-specific bindings to reduce the scope of what's allowed exactly.

Signed-off-by: Maxime Ripard &lt;maxime@cerno.tech&gt;
Signed-off-by: Rob Herring &lt;robh@kernel.org&gt;
</content>
</entry>
<entry>
<title>dt-bindings: sram: Allow for the childs nodes to be called sections</title>
<updated>2019-12-18T01:39:38Z</updated>
<author>
<name>Maxime Ripard</name>
<email>maxime@cerno.tech</email>
</author>
<published>2019-12-09T09:34:38Z</published>
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<id>urn:sha1:b19da6636c4ae90e3da360b7dd8797365e58b97b</id>
<content type='text'>
The generic SRAM binding currently only allows for child nodes of an SRAM
to be called sram too. However, these are also called sections in a number
of device tree, which seems a bit more accurate.

Let's change the name pattern to allow both.

Signed-off-by: Maxime Ripard &lt;maxime@cerno.tech&gt;
Signed-off-by: Rob Herring &lt;robh@kernel.org&gt;
</content>
</entry>
<entry>
<title>Merge tag 'drm-next-2019-12-06' of git://anongit.freedesktop.org/drm/drm</title>
<updated>2019-12-06T18:28:09Z</updated>
<author>
<name>Linus Torvalds</name>
<email>torvalds@linux-foundation.org</email>
</author>
<published>2019-12-06T18:28:09Z</published>
<link rel='alternate' type='text/html' href='https://git.zx2c4.com/wireguard-linux/commit/?id=7ada90eb9c7ae4a8eb066f8e9b4d80122f0363db'/>
<id>urn:sha1:7ada90eb9c7ae4a8eb066f8e9b4d80122f0363db</id>
<content type='text'>
Pull more drm updates from Dave Airlie:
 "Rob pointed out I missed his pull request for msm-next, it's been in
  next for a while outside of my tree so shouldn't cause any unexpected
  issues, it has some OCMEM support in drivers/soc that is acked by
  other maintainers as it's outside my tree.

  Otherwise it's a usual fixes pull, i915, amdgpu, the main ones, with
  some tegra, omap, mgag200 and one core fix.

  Summary:

  msm-next:
   - OCMEM support for a3xx and a4xx GPUs.
   - a510 support + display support

  core:
   - mst payload deletion fix

  i915:
   - uapi alignment fix
   - fix for power usage regression due to security fixes
   - change default preemption timeout to 640ms from 100ms
   - EHL voltage level display fixes
   - TGL DGL PHY fix
   - gvt - MI_ATOMIC cmd parser fix, CFL non-priv warning
   - CI spotted deadlock fix
   - EHL port D programming fix

  amdgpu:
   - VRAM lost fixes on BACO for CI/VI
   - navi14 DC fixes
   - misc SR-IOV, gfx10 fixes
   - XGMI fixes for arcturus
   - SRIOV fixes

  amdkfd:
   - KFD on ppc64le enabled
   - page table optimisations

  radeon:
   - fix for r1xx/2xx register checker.

  tegra:
   - displayport regression fixes
   - DMA API regression fixes

  mgag200:
   - fix devices that can't scanout except at 0 addr

  omap:
   - fix dma_addr refcounting"

* tag 'drm-next-2019-12-06' of git://anongit.freedesktop.org/drm/drm: (100 commits)
  drm/dp_mst: Correct the bug in drm_dp_update_payload_part1()
  drm/omap: fix dma_addr refcounting
  drm/tegra: Run hub cleanup on -&gt;remove()
  drm/tegra: sor: Make the +5V HDMI supply optional
  drm/tegra: Silence expected errors on IOMMU attach
  drm/tegra: vic: Export module device table
  drm/tegra: sor: Implement system suspend/resume
  drm/tegra: Use proper IOVA address for cursor image
  drm/tegra: gem: Remove premature import restrictions
  drm/tegra: gem: Properly pin imported buffers
  drm/tegra: hub: Remove bogus connection mutex check
  ia64: agp: Replace empty define with do while
  agp: Add bridge parameter documentation
  agp: remove unused variable num_segments
  agp: move AGPGART_MINOR to include/linux/miscdevice.h
  agp: remove unused variable size in agp_generic_create_gatt_table
  drm/dp_mst: Fix build on systems with STACKTRACE_SUPPORT=n
  drm/radeon: fix r1xx/r2xx register checker for POT textures
  drm/amdgpu: fix GFX10 missing CSIB set(v3)
  drm/amdgpu: should stop GFX ring in hw_fini
  ...
</content>
</entry>
<entry>
<title>dt-bindings: sram: Merge Socionext SRAM bindings into generic</title>
<updated>2019-10-29T00:40:48Z</updated>
<author>
<name>Krzysztof Kozlowski</name>
<email>krzk@kernel.org</email>
</author>
<published>2019-10-21T16:13:51Z</published>
<link rel='alternate' type='text/html' href='https://git.zx2c4.com/wireguard-linux/commit/?id=4345dda5a58a9c0803a80e503f2831b31222cb2b'/>
<id>urn:sha1:4345dda5a58a9c0803a80e503f2831b31222cb2b</id>
<content type='text'>
The Socionext SRAM bindings list only compatible so integrate them into
generic SRAM bindings schema.

Signed-off-by: Krzysztof Kozlowski &lt;krzk@kernel.org&gt;
Signed-off-by: Rob Herring &lt;robh@kernel.org&gt;
</content>
</entry>
<entry>
<title>dt-bindings: sram: Merge Allwinner SRAM bindings into generic</title>
<updated>2019-10-29T00:40:47Z</updated>
<author>
<name>Krzysztof Kozlowski</name>
<email>krzk@kernel.org</email>
</author>
<published>2019-10-21T16:13:50Z</published>
<link rel='alternate' type='text/html' href='https://git.zx2c4.com/wireguard-linux/commit/?id=517bcde22c214612b86f4795e2c9d7df9b08cd54'/>
<id>urn:sha1:517bcde22c214612b86f4795e2c9d7df9b08cd54</id>
<content type='text'>
The Allwinner SRAM bindings list only compatible so integrate them into
generic SRAM bindings schema.

Signed-off-by: Krzysztof Kozlowski &lt;krzk@kernel.org&gt;
Signed-off-by: Rob Herring &lt;robh@kernel.org&gt;
</content>
</entry>
</feed>
