WireGuard for the Linux kernel https://git.zx2c4.com/wireguard-linux/atom/Documentation/devicetree/bindings/ufs?h=jd%2Funified-crypt-queue 2019-11-13T03:21:33Z 2019-11-13T03:21:33Z Vignesh Raghavendra vigneshr@ti.com 2019-11-08T16:48:56Z urn:sha1:8e31a94938adffb208f714a33ba651491b53a5d0 Add binding documentation of TI wrapper for Cadence UFS Controller. Link: https://lore.kernel.org/r/20191108164857.11466-2-vigneshr@ti.com Reviewed-by: Rob Herring <robh@kernel.org> Signed-off-by: Vignesh Raghavendra <vigneshr@ti.com> Signed-off-by: Martin K. Petersen <martin.petersen@oracle.com> 2019-11-06T05:21:09Z Vinod Koul vkoul@kernel.org 2019-10-24T07:48:00Z urn:sha1:c8510d240306075ebb2ac2a44054d664cb39908b Document "qcom,sm8150-ufshc" compatible string for UFS HC found on SM8150. Link: https://lore.kernel.org/r/20191024074802.26526-2-vkoul@kernel.org Reviewed-by: Bjorn Andersson <bjorn.andersson@linaro.org> Reviewed-by: Stephen Boyd <swboyd@chromium.org> Acked-by: Rob Herring <robh@kernel.org> Signed-off-by: Vinod Koul <vkoul@kernel.org> Signed-off-by: Martin K. Petersen <martin.petersen@oracle.com> 2019-09-07T20:36:03Z Bjorn Andersson bjorn.andersson@linaro.org 2019-08-28T19:17:55Z urn:sha1:b8416b2fedbf1cfe1c3645c627b2341d253880bd The UFS_RESET pin on Qualcomm SoCs are controlled by TLMM and exposed through the GPIO framework. Acquire the device-reset GPIO and use this to implement the device_reset vops, to allow resetting the attached memory. Based on downstream support implemented by Subhash Jadavani <subhashj@codeaurora.org>. Link: https://lore.kernel.org/r/20190828191756.24312-3-bjorn.andersson@linaro.org Signed-off-by: Bjorn Andersson <bjorn.andersson@linaro.org> Acked-by: Rob Herring <robh@kernel.org> Acked-by: Avri Altman <Avri.Altman@wdc.com> Signed-off-by: Martin K. Petersen <martin.petersen@oracle.com> 2019-05-16T15:38:17Z Linus Torvalds torvalds@linux-foundation.org 2019-05-16T15:38:17Z urn:sha1:e8a1d70117116c8d96c266f0b99e931717670eaf Pull ARM Device-tree updates from Olof Johansson: "Besides new bindings and additional descriptions of hardware blocks for various SoCs and boards, the main new contents here is: SoCs: - Intel Agilex (SoCFPGA) - NXP i.MX8MM (Quad Cortex-A53 with media/graphics focus) New boards: - Allwinner: + RerVision H3-DVK (H3) + Oceanic 5205 5inMFD (H6) + Beelink GS2 (H6) + Orange Pi 3 (H6) - Rockchip: + Orange Pi RK3399 + Nanopi NEO4 + Veyron-Mighty Chromebook variant - Amlogic: + SEI Robotics SEI510 - ST Micro: + stm32mp157a discovery1 + stm32mp157c discovery2 - NXP: + Eckelmann ci4x10 (i.MX6DL) + i.MX8MM EVK (i.MX8MM) + ZII i.MX7 RPU2 (i.MX7) + ZII SPB4 (VF610) + Zii Ultra (i.MX8M) + TQ TQMa7S (i.MX7Solo) + TQ TQMa7D (i.MX7Dual) + Kobo Aura (i.MX50) + Menlosystems M53 (i.MX53)j - Nvidia: + Jetson Nano (Tegra T210)" * tag 'armsoc-dt' of git://git.kernel.org/pub/scm/linux/kernel/git/soc/soc: (593 commits) arm64: dts: bitmain: Add UART pinctrl support for Sophon Edge arm64: dts: bitmain: Add pinctrl support for BM1880 SoC arm64: dts: bitmain: Add GPIO Line names for Sophon Edge board arm64: dts: bitmain: Add GPIO support for BM1880 SoC ARM: dts: gemini: Indent DIR-685 partition table dt-bindings: hwmon (pwm-fan) Remove dead "cooling-*-state" properties ARM: dts: qcom-apq8064: Set 'cxo_board' as ref clock of the DSI PHY arm64: dts: msm8998: thermal: Restrict thermal zone name length to under 20 arm64: dts: msm8998: thermal: Fix number of supported sensors arm64: dts: msm8998-mtp: thermal: Remove skin and battery thermal zones arm64: dts: exynos: Move fixed-clocks out of soc arm64: dts: exynos: Move pmu and timer nodes out of soc ARM: dts: s5pv210: Fix camera clock provider on Goni board ARM: dts: exynos: Properly override node to use MDMA0 on Universal C210 ARM: dts: exynos: Move fixed-clocks out of soc on Exynos3250 ARM: dts: exynos: Remove unneeded address/size cells from fixed-clock on Exynos3250 ARM: dts: exynos: Move pmu and timer nodes out of soc arm64: dts: rockchip: fix IO domain voltage setting of APIO5 on rockpro64 arm64: dts: db820c: Add sound card support arm64: dts: apq8096-db820c: Add HDMI display support ... 2019-05-08T17:12:46Z Linus Torvalds torvalds@linux-foundation.org 2019-05-08T17:12:46Z urn:sha1:d1cd7c85f9e29740fddec6f25d8bf061937bf58d Pull SCSI updates from James Bottomley: "This is mostly update of the usual drivers: qla2xxx, qedf, smartpqi, hpsa, lpfc, ufs, mpt3sas, ibmvfc and hisi_sas. Plus number of minor changes, spelling fixes and other trivia" * tag 'scsi-misc' of git://git.kernel.org/pub/scm/linux/kernel/git/jejb/scsi: (298 commits) scsi: qla2xxx: Avoid that lockdep complains about unsafe locking in tcm_qla2xxx_close_session() scsi: qla2xxx: Avoid that qlt_send_resp_ctio() corrupts memory scsi: qla2xxx: Fix hardirq-unsafe locking scsi: qla2xxx: Complain loudly about reference count underflow scsi: qla2xxx: Use __le64 instead of uint32_t[2] for sending DMA addresses to firmware scsi: qla2xxx: Introduce the dsd32 and dsd64 data structures scsi: qla2xxx: Check the size of firmware data structures at compile time scsi: qla2xxx: Pass little-endian values to the firmware scsi: qla2xxx: Fix race conditions in the code for aborting SCSI commands scsi: qla2xxx: Use an on-stack completion in qla24xx_control_vp() scsi: qla2xxx: Make qla24xx_async_abort_cmd() static scsi: qla2xxx: Remove unnecessary locking from the target code scsi: qla2xxx: Remove qla_tgt_cmd.released scsi: qla2xxx: Complain if a command is released that is owned by the firmware scsi: qla2xxx: target: Fix offline port handling and host reset handling scsi: qla2xxx: Fix abort handling in tcm_qla2xxx_write_pending() scsi: qla2xxx: Fix error handling in qlt_alloc_qfull_cmd() scsi: qla2xxx: Simplify qlt_send_term_imm_notif() scsi: qla2xxx: Fix use-after-free issues in qla2xxx_qpair_sp_free_dma() scsi: qla2xxx: Fix a qla24xx_enable_msix() error path ... 2019-04-17T08:42:54Z Evan Green evgreen@chromium.org 2019-03-21T17:17:55Z urn:sha1:70b894deb78a7deed9157863a17f9e85a4ba87b3 Add a resets property to the PHY that represents the PHY reset register in the UFS controller itself. This better describes the complete specification of the PHY, and allows the PHY to perform its initialization in a single function, rather than relying on back-channel sequencing of initialization through the PHY framework. Signed-off-by: Evan Green <evgreen@chromium.org> Reviewed-by: Rob Herring <robh@kernel.org> Reviewed-by: Stephen Boyd <swboyd@chromium.org> Signed-off-by: Kishon Vijay Abraham I <kishon@ti.com> 2019-04-17T08:42:53Z Evan Green evgreen@chromium.org 2019-03-21T17:17:53Z urn:sha1:8de4acd397ab96bf3487c6a765fd2b76e2863909 Enable Qualcomm UFS controllers to expose the PHY reset via a reset controller. Signed-off-by: Evan Green <evgreen@chromium.org> Reviewed-by: Rob Herring <robh@kernel.org> Reviewed-by: Stephen Boyd <swboyd@chromium.org> Signed-off-by: Kishon Vijay Abraham I <kishon@ti.com> 2019-04-04T03:45:59Z Stanley Chu stanley.chu@mediatek.com 2019-03-29T15:32:48Z urn:sha1:c9d61a5aa39025caee2971dac7f471fbe761cb27 Add VCC supply for ufs-mediatek driver to provide power-saving operation during low-power modes. For example VCC can be turned-off during system suspend and turned-on after system is resumed. Signed-off-by: Stanley Chu <stanley.chu@mediatek.com> Signed-off-by: Martin K. Petersen <martin.petersen@oracle.com> 2019-04-04T03:45:59Z Stanley Chu stanley.chu@mediatek.com 2019-03-29T15:32:47Z urn:sha1:55dc9b3c3156f469d1de209ea03afafeaf6fca08 Custom device tree property "<name>-fixed-regulator" can be removed because, 1) It is not used anywhere in tree. 2) All handlings for "<name>-fixed-regulator" have been removed in UFS driver. 3) There is no issue if an existed regulator defined "<name>-fixed-regulator" property in device tree. Signed-off-by: Stanley Chu <stanley.chu@mediatek.com> Signed-off-by: Martin K. Petersen <martin.petersen@oracle.com> 2019-04-04T03:45:59Z Jan Kotas jank@cadence.com 2019-03-27T14:44:04Z urn:sha1:5328efce9461ce39c04e7b0b6eec563f5ac1f3e9 This patch adds a new compatible string description for CDNS UFS HCD + M31 16nm PHY. Signed-off-by: Jan Kotas <jank@cadence.com> Reviewed-by: Rob Herring <robh@kernel.org> Signed-off-by: Martin K. Petersen <martin.petersen@oracle.com>