wireguard-linux/arch/arm/boot/dts/intel, branch stable

Merge tag 'socfpga_dts_updates_for_v7.3' of https://git.kernel.org/pub/scm/linux/kernel/git/dinguyen/linux into soc/dt

2026-07-29T13:39:35Z

SoCFPGA DTS updates for v7.3 - dt-bindings updates: - Document compatible for Agilex72 - Document additional interrupts for Agilex5 - Add the additional interrupts for the gmac on Agilex5 - Use decimal number for interrupts, not hexadecimal - Enable the SMMU on Agilex5 - Add dma-coherent on XGMAC nodes - Add initial support for the Agilex72 SoCDK - Correct indentation on Arria10 - Update QSPI boot partition label * tag 'socfpga_dts_updates_for_v7.3' of https://git.kernel.org/pub/scm/linux/kernel/git/dinguyen/linux: arm64: dts: socfpga: use consistent QSPI boot partition label ARM: dts: intel: arria10: Correct indentation arm64: dts: socfpga: agilex5: update channel interrupts for gmac1 and gmac2 dt-bindings: net: altr,socfpga-stmmac: add more interrupts for Agilex5 arm64: dts: socfpga: agilex72: Add initial device tree dt-bindings: arm: altera: Add Agilex72 SoCFPGA compatible strings arm64: dts: socfpga: agilex5: Add dma-coherent to XGMAC nodes arm64: dts: socfpga: agilex5: Enable the SMMU arm64: dts: intel: keembay: Always use decimal interrupts arm64: dts: socfpga: agilex5: Add per-channel interrupts to gmac0 Signed-off-by: Arnd Bergmann

ARM: dts: ixp4xx: Drop the reg-offset hack

2026-07-24T16:10:41Z

The reg-offset hack only works when the IXP4xx platform is running in big endian mode, and it is there to byte-offset the byte where the serial registers appear in the BE config. This is clearly wrong, workarounds need to be in the drivers. Drop the reg-offset. Signed-off-by: Linus Walleij Link: https://lore.kernel.org/r/20260724-ixp4xx-dts-fix-v1-1-09bf7111e94e@kernel.org Signed-off-by: Arnd Bergmann

ARM: dts: intel: arria10: Correct indentation

2026-07-06T12:16:56Z

Correct spaces or mix of tabs+spaces into proper tab-indented lines. No functional impact (same DTB). Signed-off-by: Krzysztof Kozlowski Signed-off-by: Dinh Nguyen

Merge tag 'socfpga_dts_updates_for_v7.2' of git://git.kernel.org/pub/scm/linux/kernel/git/dinguyen/linux into soc/dt

2026-06-04T11:50:09Z

SoCFPGA DTS updates for v7.2 - dt-bindings updates: - Document compatible for Agilex5 socdk debug daughter card - Document compatible for Agilex7-M devkit - Add support for Agilex7-M devkit - Remove reg property in the PMU on 32-bit SoCFPGA - Set i3c alias on Agilex3 and Agilex5 - Update data-width of DMA controller on Agilex5 - Set phy-mode to rgmii on Agilex5 - Increase the JFFS2 rootfs partition on the Arria10 NAND SoCDK * tag 'socfpga_dts_updates_for_v7.2' of git://git.kernel.org/pub/scm/linux/kernel/git/dinguyen/linux: ARM: dts: socfpga: arria10: Increase JFFS2 rootfs partition size dt-bindings: altera: add compatible for agilex5 socdk debug daughter card arm64: dts: socfpga: agilex5: Fix phy-mode to rgmii as HW provides clock delay arm64: dts: socfpga: agilex5: update data-width for dmac arm64: dts: socfpga: agilex3: set alias for i3c controller arm64: dts: socfpga: agilex5: set alias for i3c controllers ARM: dts: socfpga: remove the reg property in the pmu arm64: dts: socfpga: agilex7m: Add SoCFPGA Agilex7-M devkit dt-bindings: arm: altera: document the Agilex7-M devkit Signed-off-by: Linus Walleij

ARM: dts: socfpga: arria10: Increase JFFS2 rootfs partition size

2026-05-14T11:56:55Z

Increase the JFFS2 partition size to support larger root filesystem. Also fix the partition label to match the actual start address. Signed-off-by: Niravkumar L Rabara Signed-off-by: Nazim Amirul Signed-off-by: Dinh Nguyen

ARM: dts: ixp4xx: use phandle-based GPIOs in mi424wr

2026-05-11T07:57:43Z

Convert remaining legacy integer GPIO specifiers to phandle-based descriptors in intel-ixp42x-actiontec-mi424wr.dtsi. All other GPIOs in this file already use &gpio0/&gpio1. These are the last remaining legacy users in the IXP4xx DTS files. Signed-off-by: Mohamed Ayman Link: https://lore.kernel.org/20260428191029.809462-1-mohamedaymanworkspace@gmail.com Signed-off-by: Linus Walleij Link: https://lore.kernel.org/r/20260505-ixp4xx-dts-v1-1-02f4a92a9697@kernel.org Signed-off-by: Arnd Bergmann

ARM: dts: socfpga: remove the reg property in the pmu

2026-04-27T12:35:39Z

The Cortex-A9 PMU accesses the hardware via system coprocessor registers, not memory-mapped I/O. The driver does not parse or use a 'reg' property from the device tree, so we can remove the reg from the DTS. This change fixes this dtbs_check warning: (arm,cortex-a9-pmu): 'reg' does not match any of the regexes Signed-off-by: Dinh Nguyen

Merge tag 'soc-dt-7.0' of git://git.kernel.org/pub/scm/linux/kernel/git/soc/soc

2026-02-11T05:11:08Z

Pull SoC devicetree updates from Arnd Bergmann: "There are a handful of new SoCs this time, all of these are more or less related to chips in a wider family: - SpacemiT Key Stone K3 is an 8-core risc-v chip, and the first widely available RVA23 implementation. Note that this is entirely unrelated with the similarly named Texas Instruments K3 chip family that follwed the TI Keystone2 SoC. - The Realtek Kent family of SoCs contains three chip models rtd1501s, rtd1861b and rtd1920s, and is related to their earlier Set-top-box and NAS products such as rtd1619, but is built on newer Arm Cortex-A78 cores. - The Qualcomm Milos family includes the Snapdragon 7s Gen 3 (SM7635) mobile phone SoC built around Armv9 Kryo cores of the Arm Cortex-A720 generation. This one is used in the Fairphone Gen 6 - Qualcomm Kaanapali is a new SoC based around eight high performance Oryon CPU cores - NXP i.MX8QP and i.MX952 are both feature reduced versions of chips we already support, i.e. the i.MX8QM and i.MX952, with fewer CPU cores and I/O interfaces. As part of a cleanup, a number of SoC specific devicetree files got removed because they did not have a single board using the .dtsi files and they were never compile tested as a result: Samsung s3c6400, ST spear320s, ST stm32mp21xc/stm32mp23xc/stm32mp25xc, Renesas r8a779m0/r8a779m2/r8a779m4/r8a779m6/r8a779m7/r8a779m8/r8a779mb/ r9a07g044c1/r9a07g044l1/r9a07g054l1/r9a09g047e37, and TI am3703/am3715. All of these could be restored easily if a new board gets merged. Broadcom/Cavium/Marvell ThunderX2 gets removed along with its only machine, as all remaining users are assumed to be using ACPI based firmware. A relatively small number of 43 boards get added this time, and almost all of them for arm64. Aside from the reference boards for the newly added SoCs, this includes: - Three server boards use 32-bit ASpeed BMCs - One more reference board for 32-bit Microchip LAN9668 - 64-bit Arm single-board computers based on Amlogic s905y4, CIX sky1, NXP ls1028a/imx8mn/imx8mp/imx91/imx93/imx95, Qualcomm qcs6490/qrb2210 and Rockchip rk3568/rk3588s - Carrier board for SOMs using Intel agilex5, Marvell Armada 7020, NXP iMX8QP, Mediatek mt8370/mt8390 and rockchip rk3588 - Two mobile phones using Snapdragon 845 - A gaming device and a NAS box, both based on Rockchips rk356x On top of the newly added boards and SoCs, there is a lot of background activity going into cleanups, in particular towards getting a warning-free dtc build, and the usual work on adding support for more hardware on the previously added machines" * tag 'soc-dt-7.0' of git://git.kernel.org/pub/scm/linux/kernel/git/soc/soc: (757 commits) dt-bindings: intel: Add Agilex eMMC support arm64: dts: socfpga: agilex: add emmc support arm64: dts: intel: agilex5: Add simple-bus node on top of dma controller node ARM: dts: socfpga: fix dtbs_check warning for fpga-region ARM: dts: socfpga: add #address-cells and #size-cells for sram node dt-bindings: altera: document syscon as fallback for sys-mgr arm64: dts: altera: Use lowercase hex dt-bindings: arm: altera: combine Intel's SoCFPGA into altera.yaml arm64: dts: socfpga: agilex5: Add IOMMUS property for ethernet nodes arm64: dts: socfpga: agilex5: add support for modular board dt-bindings: intel: Add Agilex5 SoCFPGA modular board arm64: dts: socfpga: agilex5: Add dma-coherent property arm64: dts: realtek: Add Kent SoC and EVB device trees dt-bindings: arm: realtek: Add Kent Soc family compatibles ARM: dts: samsung: Drop s3c6400.dtsi ARM: dts: nuvoton: Minor whitespace cleanup MAINTAINERS: Add Falcon DB arm64: dts: a7k: add COM Express boards ARM: dts: microchip: Drop usb_a9g20-dab-mmx.dtsi arm64: dts: rockchip: Fix rk3588 PCIe range mappings ...

ARM: dts: socfpga: fix dtbs_check warning for fpga-region

2026-01-30T15:27:12Z

soc (simple-bus): base_fpga_region: 'ranges' is a required property from schema $id: http://devicetree.org/schemas/simple-bus.yaml base_fpga_region (fpga-region): $nodename:0: 'base_fpga_region' does not match '^fpga-region(@.*|-([0-9]|[1-9][0-9]+))?$' from schema $id: http://devicetree.org/schemas/fpga/fpga-region.yaml Signed-off-by: Dinh Nguyen

ARM: dts: socfpga: add #address-cells and #size-cells for sram node

2026-01-30T15:27:12Z

Add #address-cells and #size-cells for sram node to fix below DTB_CHECK warnings: socfpga_arria5_socdk.dtb: sram@ffff0000 (mmio-sram): '#size-cells' is a required property from schema $id: http://devicetree.org/schemas/sram/sram.yaml Signed-off-by: Dinh Nguyen