wireguard-linux/arch/arm/boot/dts/microchip, branch stable

ARM: dts: Correct white-space style

2026-08-04T06:10:31Z

Correct a few white-space issues, like missing space before bracket '{' character or spurious space, which will be flagged by dt-check-style ("redundant-whitespace" warning). No functional changes. Signed-off-by: Krzysztof Kozlowski Reviewed-by: Michal Simek # Zynq Link: https://patch.msgid.link/20260801210210.383417-3-krzysztof.kozlowski@oss.qualcomm.com Signed-off-by: Krzysztof Kozlowski

ARM: dts: microchip: at91: Correct indentation

2026-07-25T16:28:01Z

Correct spaces or mix of tabs+spaces into proper tab-indented lines. No functional impact (same DTB). Signed-off-by: Krzysztof Kozlowski Link: https://patch.msgid.link/20260706101843.341339-2-krzysztof.kozlowski@oss.qualcomm.com Signed-off-by: Krzysztof Kozlowski

Merge tag 'soc-dt-7.2' of git://git.kernel.org/pub/scm/linux/kernel/git/soc/soc

2026-06-17T18:16:56Z

Pull SoC devicetree updates from Arnd Bergmann: "There are fewer devicetree updates this time that the last few ones, with five SoC types getting added: - Qualcomm Dragonwing IPQ9650 is a new wireless networking SoC using four Cortex-A55 and one Cortex-A78 core, which is a significant upgrade from older generations - ZTE zx297520v3 is an older low-end wireless SoC using a single Cortex-A53 core, which so far can only run 32-bit kernels. This brings back the ZX family of chips that was removed in 2021 after support for the original zx296702 and zx296718 chips was never completed. - Renesas R-Car M3Le (R8A779MD) is a variant of the R-Car M3-N (R8A77965) automotive SoC. - Apple t8122 (M3) is the 2023 generation of their laptop SoCs, which has now been reverse-engineered to the point of having initial kernel support for five laptop models. - ASPEED AST27xx is their first baseboard managment controller using a 64-bit core, the Cortex-A35, following earlier generations using ARMv5/v6/v7 CPUs. These all come with one or more initial boards, and in total there are 39 new boards getting added across SoC families, including: - Two NAS boxes using the old Cortina Systems Gemini SoC based on an ARMv4 FA526 CPU core - 18 industrial embedded boards using NXP i.MX6/8/9 and LX2160A SoCs from Variscite, Toradex and SolidRun, plus a number of overlays for combinations with additional boards - One new carrier board and SoM using TI K3 AM62x, in addition to new overlays for older SoMs - Two new boards using Spacemit K3 (no relation with TI) RISC-V SoCs. - Three phones from Google, Nothing and Motorola, all using Qualcomm Snapdragon SoCs - AST26xx BMC support for two server boards While there is still a significant number of patches improving hardware support for the existing boards across vendors (NXP, Qualcomm, Renesas, Rockchips, Mediatek, ...), a much smaller number of cleanups and warning fixes have made it in this time" * tag 'soc-dt-7.2' of git://git.kernel.org/pub/scm/linux/kernel/git/soc/soc: (665 commits) arm64: dts: aspeed: Fix duplicate pinctrl labels and address scheme arm64: dts: bst: enable eMMC controller in C1200 dt-bindings: display/lvds-codec: add ti,sn65lvds93 arm64: dts: allwinner: a523: Add missing GPIO interrupt arm64: dts: lx2160a-rev2: avoid 32-bit pcie window system ram overlap arm64: dts: aspeed: Add initial AST27xx SoC device tree arm64: Kconfig: Add ASPEED SoC family Kconfig support dt-bindings: arm: aspeed: Add AST2700 board compatible arm64: dts: allwinner: a523: add gpadc node arm64: dts: allwinner: Add EL2 virtual timer interrupt ARM: dts: sun8i: a83t: Add MIPI CSI-2 controller node dt-bindings: media: sun6i-a31-isp: Add optional interconnect properties dt-bindings: media: sun6i-a31-csi: Add optional interconnect properties arm64: dts: imx{91,93}-phyboard-segin: Add peb-av-18 overlays arm64: dts: imx93-var-som-symphony: enable ADC arm64: dts: imx93-var-som-symphony: enable TPM3 PWM arm64: dts: imx93-var-som-symphony: keep RGB_SEL low arm64: dts: imx93-var-som-symphony: enable UART7 arm64: dts: imx93-var-som-symphony: add TPM support arm64: dts: imx91-var-som-symphony: fix RGB_SEL handling ...

ARM: dts: microchip: add I3C controller

2026-05-25T19:54:37Z

Add I3C controller for sama7d65 SoC. Signed-off-by: Durai Manickam KR Signed-off-by: Manikandan Muralidharan Link: https://lore.kernel.org/r/20260525092405.1514213-5-manikandan.m@microchip.com Signed-off-by: Claudiu Beznea

ARM: dts: microchip: sam9x7: fix GMAC clock configuration

2026-05-16T16:52:37Z

The GMAC node incorrectly listed four clocks, including a separate tx_clk and a TSU GCK clock sourced from ID 67. According to the SAM9X7 clocking scheme, the GMAC uses only three clocks: HCLK, PCLK, and the TSU GCK derived from the GMAC peripheral clock (ID 24). Remove the unused tx_clk, update the clock-names accordingly, and correct the assigned clock to use GCK 24 instead of GCK 67. This aligns the device tree with the actual hardware clock topology and prevents misconfiguration of the GMAC clock tree. [root@SAM9X75 ~]$ cat /sys/kernel/debug/clk/clk_summary | grep gmac gmac_gclk 1 1 1 266666666 0 0 50000 Y f802c000.ethernet tsu_clk f802c000.ethernet tsu_clk gmac_clk 2 2 0 266666666 0 0 50000 Y f802c000.ethernet hclk f802c000.ethernet pclk Fixes: 41af45af8bc3 ("ARM: dts: at91: sam9x7: add device tree for SoC") Signed-off-by: Mihai Sain Link: https://lore.kernel.org/r/20260309075329.1528-5-mihai.sain@microchip.com [claudiu.beznea: massaged the patch description] Signed-off-by: Claudiu Beznea

Merge tag 'soc-dt-7.1' of git://git.kernel.org/pub/scm/linux/kernel/git/soc/soc

2026-04-17T03:28:48Z

Pull SoC devicetree updates from Arnd Bergmann: "A number of SoC platforms are adding modernized variants of their already supported chips time, with a total of 12 new SoCs, and two older SoC getting removed: - Qualcomm Glymur is a compute SoC using 18 Oryon-2 CPU cores - Qualcomm Mahua is a variant of Glymur with only 12 CPU cores, but largely identical. - Qualcomm Eliza is an embeded platform for mobile phone (SM7750) and IOT (QC7790S/M) workloads - Qualcomm IPQ5210 is a wireless networking SoC using Cortex-A53 cores - Qualcomm apq8084 and ipq806x had only rudimentary support but no actual products using them, so they are now gone. - Axis ARTPEC-9 is a follow-up to the ARTPEC-8 embedded SoC, using the Samsung SoC platform but now with Cortex-A55 cores - ARM Zena is a virtual platform in FVP using Cortex-A720AE cores, with additional versions planned to be merged in the future. - ARM corstone-1000-a320 is a reference platform for IOT, using low-end Cortex-A320 cores - Microchip LAN9691 is an updated 64-bit variant of the arm32 lan966x series of networking SoCs - Microchip PIC64GX is an embedded RISC-V chip using SIFIVE U54 CPU cores - Rockchip RV1103B is the low-end 32-bit single-core vision processor - Renesas RZ/G3L (r9a08g046) is an industrial embedded chip using Cortex-A55 cores, similar to the G3E and G3S variants we already supported. - NXP S32N79 is an automotive SoC using Cortex-A78AE cores, a significant upgrade from the older S32V and S32G series These all come with at least one reference board or an initial product using these, in total there are 67 newly added boards. The ones for already supported SoCs are: - Two more Aspeed BMC based boards - Three older tablets based on 32-bit OMAP4 and Exynos5 SoCs - One Set-top-box based on Allwinner H6 - 22 additional industrial/embedded boards using 64-bit NXP i.MX8M or i.MX9 SoCs - 20 Qualcomm SoC based machines across all possible markets: workstation, gaming, laptop, phone, networking, reference, ... - Three more Rockchips rk35xx based boards - Four variants of the Toradex Verdin using TI AM62 Other notable bits are: - A cleanup for the 32-bit Tegra paz00 board moved the last board specific code on Tegra into equivalent dts syntax. - There continues to be a significant number of fixes for static checking of dtc syntax, but it feels like this is slowing down, hopefully getting into a state where most known issues are addressed - Additional hardware support for many existing boards across SoC families, notably Qualcomm, Broadcom, i.MX2, i.MX6, Rockchips, STM32, Mediatek, Tegra, TI and Microchip" * tag 'soc-dt-7.1' of git://git.kernel.org/pub/scm/linux/kernel/git/soc/soc: (841 commits) arm64: dts: ti: k3: Use memory-region-names for r5f ARM: dts: imx: Add DT overlays for DH i.MX6 DHCOM SoM and boards ARM: dts: imx6sx: remove fallback compatible string fsl,imx28-lcdif ARM: dts: imx25: rename node name tcq to touchscreen ARM: dts: imx: b850v3: Disable unused usdhc4 ARM: dts: imx: b850v3: Define GPIO line names ARM: dts: imx: b850v3: Use alphabetical sorting ARM: dts: imx: bx50v3: Configure phy-mode to eliminate a warning ARM: dts: imx: bx50v3: Configure switch PHY max-speed to 100Mbps ARM: dts: imx7ulp: Add CPU clock and OPP table support ARM: dts: imx7-mba7: Deassert BOOT_EN after boot ARM: dts: tqma7: add boot phase properties ARM: dts: imx7s: add boot phase properties ARM: dts: tqma6ul[l]: correct spelling of TQ-Systems ARM: dts: mba6ulx: add boot phase properties ARM: dts: imx6ul[l]-tqma6ul[l]: add boot phase properties ARM: dts: imx6ul/imx6ull: add boot phase properties ARM: dts: imx6qdl-mba6: add boot phase properties ARM: dts: imx6qdl-tqma6: add boot phase properties ARM: dts: imx6qdl: add boot phase properties ...

ARM: dts: microchip: sama7d65: add Cortex-A7 PMU node

2026-03-24T13:35:37Z

Add the Performance Monitoring Unit (PMU) node with the appropriate compatible string and interrupt line so that perf and other PMU-based tooling can function correctly on this SoC. [root@SAMA7D65 ~]$ dmesg | grep -i pmu [ 1.487869] hw-perfevents: enabled with armv7_cortex_a7 PMU driver, 5 (8000000f) counters available [root@SAMA7D65 ~]$ perf list hw List of pre-defined events (to be used in -e or -M): branch-instructions OR branches [Hardware event] branch-misses [Hardware event] bus-cycles [Hardware event] cache-misses [Hardware event] cache-references [Hardware event] cpu-cycles OR cycles [Hardware event] instructions [Hardware event] Signed-off-by: Mihai Sain Link: https://lore.kernel.org/r/20260324070927.1496-2-mihai.sain@microchip.com [claudiu.beznea: keep nodes alphanumerically sorted] Signed-off-by: Claudiu Beznea

ARM: dts: microchip: sam9x7: fix gpio-lines count for pioB

2026-03-23T10:54:24Z

The pioB controller on the SAM9X7 SoC actually supports 27 GPIO lines. The previous value of 26 was incorrect, leading to the last pin being unavailable for use by the GPIO subsystem. Update the #gpio-lines property to reflect the correct hardware specification. Fixes: 41af45af8bc3 ("ARM: dts: at91: sam9x7: add device tree for SoC") Signed-off-by: Mihai Sain Link: https://lore.kernel.org/r/20260209090735.2016-1-mihai.sain@microchip.com Signed-off-by: Claudiu Beznea

arm: dts: microchip: remove unused #address-cells/#size-cells from sam9x60 udc node

2026-03-08T16:06:52Z

The UDC node does not define any child nodes, so the "#address-cells" and "#size-cells" properties are unnecessary. Remove these unused properties to simplify the devicetree node and keep it consistent with DT conventions. Signed-off-by: Charan Pedumuru Link: https://lore.kernel.org/r/20260307-atmel-usb-v3-1-3dc48fe772be@gmail.com Reviewed-by: Claudiu Beznea [claudiu.beznea: s/at91/microchip in commit title] Signed-off-by: Claudiu Beznea

ARM: dts: microchip: sama7d65: add LVDS controller

2026-02-28T14:05:26Z

Add support for LVDS controller node Signed-off-by: Ryan Wanner Signed-off-by: Manikandan Muralidharan Reviewed-by: Claudiu Beznea Link: https://lore.kernel.org/r/20260225085430.480052-4-manikandan.m@microchip.com Signed-off-by: Claudiu Beznea