<feed xmlns='http://www.w3.org/2005/Atom'>
<title>wireguard-linux/arch/arm/boot/dts/nvidia, branch stable</title>
<subtitle>WireGuard for the Linux kernel</subtitle>
<id>https://git.zx2c4.com/wireguard-linux/atom/arch/arm/boot/dts/nvidia?h=stable</id>
<link rel='self' href='https://git.zx2c4.com/wireguard-linux/atom/arch/arm/boot/dts/nvidia?h=stable'/>
<link rel='alternate' type='text/html' href='https://git.zx2c4.com/wireguard-linux/'/>
<updated>2026-07-25T16:30:00Z</updated>
<entry>
<title>ARM: dts: nvidia: tegra114-asus-tf701t: Correct trailing whitespace</title>
<updated>2026-07-25T16:30:00Z</updated>
<author>
<name>Krzysztof Kozlowski</name>
<email>krzysztof.kozlowski@oss.qualcomm.com</email>
</author>
<published>2026-07-06T10:17:58Z</published>
<link rel='alternate' type='text/html' href='https://git.zx2c4.com/wireguard-linux/commit/?id=6a5a6cc5e9ad5655186ff289f21db532b44e14b2'/>
<id>urn:sha1:6a5a6cc5e9ad5655186ff289f21db532b44e14b2</id>
<content type='text'>
Drop trailing whitespace.  No functional impact (same DTB).

Signed-off-by: Krzysztof Kozlowski &lt;krzysztof.kozlowski@oss.qualcomm.com&gt;
Link: https://patch.msgid.link/20260706101757.340149-2-krzysztof.kozlowski@oss.qualcomm.com
Signed-off-by: Krzysztof Kozlowski &lt;krzk@kernel.org&gt;
</content>
</entry>
<entry>
<title>ARM: tegra: tf600t: Invert accelerometer calibration matrix</title>
<updated>2026-05-29T12:36:18Z</updated>
<author>
<name>Svyatoslav Ryhel</name>
<email>clamor95@gmail.com</email>
</author>
<published>2026-05-11T07:48:59Z</published>
<link rel='alternate' type='text/html' href='https://git.zx2c4.com/wireguard-linux/commit/?id=774bc2764647cfd6b65727cfa978d809f11df392'/>
<id>urn:sha1:774bc2764647cfd6b65727cfa978d809f11df392</id>
<content type='text'>
IMU calibration matrix used in the device tree is inverted when testing on
the device which results in wrong screen orientation. Invert it to match
the matrix dumped from the device.

Tested-by: Andreas Westman Dorcsak &lt;hedmoo@yahoo.com&gt;
Signed-off-by: Svyatoslav Ryhel &lt;clamor95@gmail.com&gt;
Signed-off-by: Thierry Reding &lt;treding@nvidia.com&gt;
</content>
</entry>
<entry>
<title>ARM: tegra: tf600t: Drop backlight regulator</title>
<updated>2026-05-29T12:36:17Z</updated>
<author>
<name>Svyatoslav Ryhel</name>
<email>clamor95@gmail.com</email>
</author>
<published>2026-05-11T07:48:58Z</published>
<link rel='alternate' type='text/html' href='https://git.zx2c4.com/wireguard-linux/commit/?id=d9c890d753034adcae0f74de578deed60d58233a'/>
<id>urn:sha1:d9c890d753034adcae0f74de578deed60d58233a</id>
<content type='text'>
Drop dedicated backlight regulator since the GPIO used in it is actually
SFIO controlling backlight and setting it as GPIO causes backlight to
freeze at maximum level.

Tested-by: Andreas Westman Dorcsak &lt;hedmoo@yahoo.com&gt;
Signed-off-by: Svyatoslav Ryhel &lt;clamor95@gmail.com&gt;
Signed-off-by: Thierry Reding &lt;treding@nvidia.com&gt;
</content>
</entry>
<entry>
<title>ARM: tegra: tf600t: Configure panel</title>
<updated>2026-05-29T12:36:16Z</updated>
<author>
<name>Svyatoslav Ryhel</name>
<email>clamor95@gmail.com</email>
</author>
<published>2026-05-11T07:48:57Z</published>
<link rel='alternate' type='text/html' href='https://git.zx2c4.com/wireguard-linux/commit/?id=2ecff0cda80b9ba0e513620003d156cfef7394df'/>
<id>urn:sha1:2ecff0cda80b9ba0e513620003d156cfef7394df</id>
<content type='text'>
Configure DSI panel used in ASUS VivoTab TF600T.

Tested-by: Andreas Westman Dorcsak &lt;hedmoo@yahoo.com&gt;
Signed-off-by: Svyatoslav Ryhel &lt;clamor95@gmail.com&gt;
Signed-off-by: Thierry Reding &lt;treding@nvidia.com&gt;
</content>
</entry>
<entry>
<title>ARM: tegra: transformers: Add connector node for common trees</title>
<updated>2026-05-29T12:36:16Z</updated>
<author>
<name>Svyatoslav Ryhel</name>
<email>clamor95@gmail.com</email>
</author>
<published>2026-05-11T07:48:56Z</published>
<link rel='alternate' type='text/html' href='https://git.zx2c4.com/wireguard-linux/commit/?id=5333a49e51c2d0d5fe1615f721898036733ed5b0'/>
<id>urn:sha1:5333a49e51c2d0d5fe1615f721898036733ed5b0</id>
<content type='text'>
All ASUS Transformers have micro-HDMI connector directly available. After
Tegra HDMI got bridge/connector support, we should use connector framework
for proper HW description.

Tested-by: Andreas Westman Dorcsak &lt;hedmoo@yahoo.com&gt; # ASUS TF T30
Tested-by: Robert Eckelmann &lt;longnoserob@gmail.com&gt; # ASUS TF101 T20
Tested-by: Svyatoslav Ryhel &lt;clamor95@gmail.com&gt; # ASUS TF201 T30
Signed-off-by: Svyatoslav Ryhel &lt;clamor95@gmail.com&gt;
Signed-off-by: Thierry Reding &lt;treding@nvidia.com&gt;
</content>
</entry>
<entry>
<title>ARM: tegra: transformer: Add support for front camera</title>
<updated>2026-05-29T12:36:14Z</updated>
<author>
<name>Svyatoslav Ryhel</name>
<email>clamor95@gmail.com</email>
</author>
<published>2026-05-11T07:48:55Z</published>
<link rel='alternate' type='text/html' href='https://git.zx2c4.com/wireguard-linux/commit/?id=34d89435081d07b052dd522a57054132dada5400'/>
<id>urn:sha1:34d89435081d07b052dd522a57054132dada5400</id>
<content type='text'>
Add front camera video path. Aptina MI1040 camera is used on all supported
ASUS Transformers, but only TF201 and TF700T will work since on
TF300T/TG/TL front camera is linked through an additional ISP.

Signed-off-by: Svyatoslav Ryhel &lt;clamor95@gmail.com&gt;
Signed-off-by: Thierry Reding &lt;treding@nvidia.com&gt;
</content>
</entry>
<entry>
<title>ARM: tegra: grouper: Add support for front camera</title>
<updated>2026-05-29T12:36:14Z</updated>
<author>
<name>Svyatoslav Ryhel</name>
<email>clamor95@gmail.com</email>
</author>
<published>2026-05-11T07:48:54Z</published>
<link rel='alternate' type='text/html' href='https://git.zx2c4.com/wireguard-linux/commit/?id=a5acde8adb4d4d921a004b8df995d50255253afa'/>
<id>urn:sha1:a5acde8adb4d4d921a004b8df995d50255253afa</id>
<content type='text'>
Add front camera video path.

Signed-off-by: Svyatoslav Ryhel &lt;clamor95@gmail.com&gt;
Signed-off-by: Thierry Reding &lt;treding@nvidia.com&gt;
</content>
</entry>
<entry>
<title>ARM: tegra: p880: Lower CPU thermal limit</title>
<updated>2026-05-29T12:36:12Z</updated>
<author>
<name>Ion Agorria</name>
<email>ion@agorria.com</email>
</author>
<published>2026-05-11T07:48:53Z</published>
<link rel='alternate' type='text/html' href='https://git.zx2c4.com/wireguard-linux/commit/?id=ece4229e457de4ceeec80890c5c760f0c858eeea'/>
<id>urn:sha1:ece4229e457de4ceeec80890c5c760f0c858eeea</id>
<content type='text'>
Lower the CPU thermal limit for the LG P880, since its chassis has less
thermal dissipation capability than the P895.

Signed-off-by: Ion Agorria &lt;ion@agorria.com&gt;
Signed-off-by: Svyatoslav Ryhel &lt;clamor95@gmail.com&gt;
Signed-off-by: Thierry Reding &lt;treding@nvidia.com&gt;
</content>
</entry>
<entry>
<title>ARM: tegra: lg-x3: Set PMIC's RTC address</title>
<updated>2026-05-29T12:36:12Z</updated>
<author>
<name>Svyatoslav Ryhel</name>
<email>clamor95@gmail.com</email>
</author>
<published>2026-05-11T07:48:52Z</published>
<link rel='alternate' type='text/html' href='https://git.zx2c4.com/wireguard-linux/commit/?id=61cf0112f79d6c6de2a002874b8618e802b664f2'/>
<id>urn:sha1:61cf0112f79d6c6de2a002874b8618e802b664f2</id>
<content type='text'>
LG X3 devices have the PMIC's RTC module located at a non-standard
address. Set the correct address.

Signed-off-by: Svyatoslav Ryhel &lt;clamor95@gmail.com&gt;
Signed-off-by: Thierry Reding &lt;treding@nvidia.com&gt;
</content>
</entry>
<entry>
<title>ARM: tegra: lg-x3: Complete video device graph</title>
<updated>2026-05-29T12:36:11Z</updated>
<author>
<name>Svyatoslav Ryhel</name>
<email>clamor95@gmail.com</email>
</author>
<published>2026-05-11T07:48:51Z</published>
<link rel='alternate' type='text/html' href='https://git.zx2c4.com/wireguard-linux/commit/?id=8399055d9f98e94c33608fe9d61afc09a43cc4df'/>
<id>urn:sha1:8399055d9f98e94c33608fe9d61afc09a43cc4df</id>
<content type='text'>
Add front and rear camera nodes and interlink them with Tegra CSI and VI.
Adjust camera PMIC voltages to better fit requirements and fix the focuser
node.

Signed-off-by: Svyatoslav Ryhel &lt;clamor95@gmail.com&gt;
Signed-off-by: Thierry Reding &lt;treding@nvidia.com&gt;
</content>
</entry>
</feed>
