<feed xmlns='http://www.w3.org/2005/Atom'>
<title>wireguard-linux/arch/arm64/include/asm/kvm_hyp.h, branch jd/orphan-parallel</title>
<subtitle>WireGuard for the Linux kernel</subtitle>
<id>https://git.zx2c4.com/wireguard-linux/atom/arch/arm64/include/asm/kvm_hyp.h?h=jd%2Forphan-parallel</id>
<link rel='self' href='https://git.zx2c4.com/wireguard-linux/atom/arch/arm64/include/asm/kvm_hyp.h?h=jd%2Forphan-parallel'/>
<link rel='alternate' type='text/html' href='https://git.zx2c4.com/wireguard-linux/'/>
<updated>2020-09-15T17:39:03Z</updated>
<entry>
<title>KVM: arm64: nVHE: Handle hyp panics</title>
<updated>2020-09-15T17:39:03Z</updated>
<author>
<name>Andrew Scull</name>
<email>ascull@google.com</email>
</author>
<published>2020-09-15T10:46:37Z</published>
<link rel='alternate' type='text/html' href='https://git.zx2c4.com/wireguard-linux/commit/?id=a2e102e20fd69ce26ea9fe7bd0df26d25dafff59'/>
<id>urn:sha1:a2e102e20fd69ce26ea9fe7bd0df26d25dafff59</id>
<content type='text'>
Restore the host context when panicking from hyp to give the best chance
of the panic being clean.

The host requires that registers be preserved such as x18 for the shadow
callstack. If the panic is caused by an exception from EL1, the host
context is still valid so the panic can return straight back to the
host. If the panic comes from EL2 then it's most likely that the hyp
context is active and the host context needs to be restored.

There are windows before and after the host context is saved and
restored that restoration is attempted incorrectly and the panic won't
be clean.

Signed-off-by: Andrew Scull &lt;ascull@google.com&gt;
Signed-off-by: Marc Zyngier &lt;maz@kernel.org&gt;
Link: https://lore.kernel.org/r/20200915104643.2543892-14-ascull@google.com
</content>
</entry>
<entry>
<title>KVM: arm64: Introduce hyp context</title>
<updated>2020-09-15T17:39:02Z</updated>
<author>
<name>Andrew Scull</name>
<email>ascull@google.com</email>
</author>
<published>2020-09-15T10:46:32Z</published>
<link rel='alternate' type='text/html' href='https://git.zx2c4.com/wireguard-linux/commit/?id=b619d9aa8b385bdab747df596961d8fdddde4d52'/>
<id>urn:sha1:b619d9aa8b385bdab747df596961d8fdddde4d52</id>
<content type='text'>
During __guest_enter, save and restore from a new hyp context rather
than the host context. This is preparation for separation of the hyp and
host context in nVHE.

Signed-off-by: Andrew Scull &lt;ascull@google.com&gt;
Signed-off-by: Marc Zyngier &lt;maz@kernel.org&gt;
Link: https://lore.kernel.org/r/20200915104643.2543892-9-ascull@google.com
</content>
</entry>
<entry>
<title>KVM: arm64: Save chosen hyp vector to a percpu variable</title>
<updated>2020-09-15T17:39:02Z</updated>
<author>
<name>Andrew Scull</name>
<email>ascull@google.com</email>
</author>
<published>2020-09-15T10:46:29Z</published>
<link rel='alternate' type='text/html' href='https://git.zx2c4.com/wireguard-linux/commit/?id=a0e479523e3fb4fa52c351cc4906f38097de789a'/>
<id>urn:sha1:a0e479523e3fb4fa52c351cc4906f38097de789a</id>
<content type='text'>
Introduce a percpu variable to hold the address of the selected hyp
vector that will be used with guests. This avoids the selection process
each time a guest is being entered and can be used by nVHE when a
separate vector is introduced for the host.

Signed-off-by: Andrew Scull &lt;ascull@google.com&gt;
Signed-off-by: Marc Zyngier &lt;maz@kernel.org&gt;
Link: https://lore.kernel.org/r/20200915104643.2543892-6-ascull@google.com
</content>
</entry>
<entry>
<title>KVM: arm64: Remove hyp_panic arguments</title>
<updated>2020-09-15T17:39:01Z</updated>
<author>
<name>Andrew Scull</name>
<email>ascull@google.com</email>
</author>
<published>2020-09-15T10:46:26Z</published>
<link rel='alternate' type='text/html' href='https://git.zx2c4.com/wireguard-linux/commit/?id=6a0259ed29bba83653a36fabcdf6b06aecd78596'/>
<id>urn:sha1:6a0259ed29bba83653a36fabcdf6b06aecd78596</id>
<content type='text'>
hyp_panic is able to find all the context it needs from within itself so
remove the argument. The __hyp_panic wrapper becomes redundant so is
also removed.

Signed-off-by: Andrew Scull &lt;ascull@google.com&gt;
Signed-off-by: Marc Zyngier &lt;maz@kernel.org&gt;
Link: https://lore.kernel.org/r/20200915104643.2543892-3-ascull@google.com
</content>
</entry>
<entry>
<title>KVM: arm64: Remove __hyp_text macro, use build rules instead</title>
<updated>2020-07-05T17:38:45Z</updated>
<author>
<name>David Brazdil</name>
<email>dbrazdil@google.com</email>
</author>
<published>2020-06-25T13:14:19Z</published>
<link rel='alternate' type='text/html' href='https://git.zx2c4.com/wireguard-linux/commit/?id=c50cb04303cb88c517715b078e3e010c024af1a5'/>
<id>urn:sha1:c50cb04303cb88c517715b078e3e010c024af1a5</id>
<content type='text'>
With nVHE code now fully separated from the rest of the kernel, the effects of
the __hyp_text macro (which had to be applied on all nVHE code) can be
achieved with build rules instead. The macro used to:
  (a) move code to .hyp.text ELF section, now done by renaming .text using
      `objcopy`, and
  (b) `notrace` and `__noscs` would negate effects of CC_FLAGS_FTRACE and
      CC_FLAGS_SCS, respectivelly, now those flags are  erased from
      KBUILD_CFLAGS (same way as in EFI stub).

Note that by removing __hyp_text from code shared with VHE, all VHE code is now
compiled into .text and without `notrace` and `__noscs`.

Use of '.pushsection .hyp.text' removed from assembly files as this is now also
covered by the build rules.

For MAINTAINERS: if needed to re-run, uses of macro were removed with the
following command. Formatting was fixed up manually.

  find arch/arm64/kvm/hyp -type f -name '*.c' -o -name '*.h' \
       -exec sed -i 's/ __hyp_text//g' {} +

Signed-off-by: David Brazdil &lt;dbrazdil@google.com&gt;
Signed-off-by: Marc Zyngier &lt;maz@kernel.org&gt;
Link: https://lore.kernel.org/r/20200625131420.71444-15-dbrazdil@google.com
</content>
</entry>
<entry>
<title>KVM: arm64: Duplicate hyp/timer-sr.c for VHE/nVHE</title>
<updated>2020-07-05T17:38:38Z</updated>
<author>
<name>David Brazdil</name>
<email>dbrazdil@google.com</email>
</author>
<published>2020-06-25T13:14:17Z</published>
<link rel='alternate' type='text/html' href='https://git.zx2c4.com/wireguard-linux/commit/?id=9aebdea494b5d2d5fe0ba54d71e9d6c5acfe76b4'/>
<id>urn:sha1:9aebdea494b5d2d5fe0ba54d71e9d6c5acfe76b4</id>
<content type='text'>
timer-sr.c contains a HVC handler for setting CNTVOFF_EL2 and two helper
functions for controlling access to physical counter. The former is used by
both VHE/nVHE and is duplicated, the latter are used only by nVHE and moved
to nvhe/timer-sr.c.

Signed-off-by: David Brazdil &lt;dbrazdil@google.com&gt;
Signed-off-by: Marc Zyngier &lt;maz@kernel.org&gt;
Link: https://lore.kernel.org/r/20200625131420.71444-13-dbrazdil@google.com
</content>
</entry>
<entry>
<title>KVM: arm64: Split hyp/sysreg-sr.c to VHE/nVHE</title>
<updated>2020-07-05T17:38:29Z</updated>
<author>
<name>David Brazdil</name>
<email>dbrazdil@google.com</email>
</author>
<published>2020-06-25T13:14:16Z</published>
<link rel='alternate' type='text/html' href='https://git.zx2c4.com/wireguard-linux/commit/?id=13aeb9b400c5d7c5e979fdbbf994c787487f7889'/>
<id>urn:sha1:13aeb9b400c5d7c5e979fdbbf994c787487f7889</id>
<content type='text'>
sysreg-sr.c contains KVM's code for saving/restoring system registers, with
some code shared between VHE/nVHE. These common routines are moved to
a header file, VHE-specific code is moved to vhe/sysreg-sr.c and nVHE-specific
code to nvhe/sysreg-sr.c.

Signed-off-by: David Brazdil &lt;dbrazdil@google.com&gt;
Signed-off-by: Marc Zyngier &lt;maz@kernel.org&gt;
Link: https://lore.kernel.org/r/20200625131420.71444-12-dbrazdil@google.com
</content>
</entry>
<entry>
<title>KVM: arm64: Split hyp/switch.c to VHE/nVHE</title>
<updated>2020-07-05T17:38:21Z</updated>
<author>
<name>David Brazdil</name>
<email>dbrazdil@google.com</email>
</author>
<published>2020-06-25T13:14:14Z</published>
<link rel='alternate' type='text/html' href='https://git.zx2c4.com/wireguard-linux/commit/?id=09cf57eba304246141367b95c89801fd2047ac96'/>
<id>urn:sha1:09cf57eba304246141367b95c89801fd2047ac96</id>
<content type='text'>
switch.c implements context-switching for KVM, with large parts shared between
VHE/nVHE. These common routines are moved to a header file, VHE-specific code
is moved to vhe/switch.c and nVHE-specific code is moved to nvhe/switch.c.

Previously __kvm_vcpu_run needed a different symbol name for VHE/nVHE. This
is cleaned up and the caller in arm.c simplified.

Signed-off-by: David Brazdil &lt;dbrazdil@google.com&gt;
Signed-off-by: Marc Zyngier &lt;maz@kernel.org&gt;
Link: https://lore.kernel.org/r/20200625131420.71444-10-dbrazdil@google.com
</content>
</entry>
<entry>
<title>Merge tag 'for-linus' of git://git.kernel.org/pub/scm/virt/kvm/kvm</title>
<updated>2020-06-03T22:13:47Z</updated>
<author>
<name>Linus Torvalds</name>
<email>torvalds@linux-foundation.org</email>
</author>
<published>2020-06-03T22:13:47Z</published>
<link rel='alternate' type='text/html' href='https://git.zx2c4.com/wireguard-linux/commit/?id=039aeb9deb9291f3b19c375a8bc6fa7f768996cc'/>
<id>urn:sha1:039aeb9deb9291f3b19c375a8bc6fa7f768996cc</id>
<content type='text'>
Pull kvm updates from Paolo Bonzini:
 "ARM:
   - Move the arch-specific code into arch/arm64/kvm

   - Start the post-32bit cleanup

   - Cherry-pick a few non-invasive pre-NV patches

  x86:
   - Rework of TLB flushing

   - Rework of event injection, especially with respect to nested
     virtualization

   - Nested AMD event injection facelift, building on the rework of
     generic code and fixing a lot of corner cases

   - Nested AMD live migration support

   - Optimization for TSC deadline MSR writes and IPIs

   - Various cleanups

   - Asynchronous page fault cleanups (from tglx, common topic branch
     with tip tree)

   - Interrupt-based delivery of asynchronous "page ready" events (host
     side)

   - Hyper-V MSRs and hypercalls for guest debugging

   - VMX preemption timer fixes

  s390:
   - Cleanups

  Generic:
   - switch vCPU thread wakeup from swait to rcuwait

  The other architectures, and the guest side of the asynchronous page
  fault work, will come next week"

* tag 'for-linus' of git://git.kernel.org/pub/scm/virt/kvm/kvm: (256 commits)
  KVM: selftests: fix rdtsc() for vmx_tsc_adjust_test
  KVM: check userspace_addr for all memslots
  KVM: selftests: update hyperv_cpuid with SynDBG tests
  x86/kvm/hyper-v: Add support for synthetic debugger via hypercalls
  x86/kvm/hyper-v: enable hypercalls regardless of hypercall page
  x86/kvm/hyper-v: Add support for synthetic debugger interface
  x86/hyper-v: Add synthetic debugger definitions
  KVM: selftests: VMX preemption timer migration test
  KVM: nVMX: Fix VMX preemption timer migration
  x86/kvm/hyper-v: Explicitly align hcall param for kvm_hyperv_exit
  KVM: x86/pmu: Support full width counting
  KVM: x86/pmu: Tweak kvm_pmu_get_msr to pass 'struct msr_data' in
  KVM: x86: announce KVM_FEATURE_ASYNC_PF_INT
  KVM: x86: acknowledgment mechanism for async pf page ready notifications
  KVM: x86: interrupt based APF 'page ready' event delivery
  KVM: introduce kvm_read_guest_offset_cached()
  KVM: rename kvm_arch_can_inject_async_page_present() to kvm_arch_can_dequeue_async_page_present()
  KVM: x86: extend struct kvm_vcpu_pv_apf_data with token info
  Revert "KVM: async_pf: Fix #DF due to inject "Page not Present" and "Page Ready" exceptions simultaneously"
  KVM: VMX: Replace zero-length array with flexible-array
  ...
</content>
</entry>
<entry>
<title>Merge branch 'for-next/scs' into for-next/core</title>
<updated>2020-05-28T17:03:40Z</updated>
<author>
<name>Will Deacon</name>
<email>will@kernel.org</email>
</author>
<published>2020-05-28T17:03:40Z</published>
<link rel='alternate' type='text/html' href='https://git.zx2c4.com/wireguard-linux/commit/?id=082af5ec5080b028f7d0846a6c27cbb87f288205'/>
<id>urn:sha1:082af5ec5080b028f7d0846a6c27cbb87f288205</id>
<content type='text'>
Support for Clang's Shadow Call Stack in the kernel
(Sami Tolvanen and Will Deacon)
* for-next/scs:
  arm64: entry-ftrace.S: Update comment to indicate that x18 is live
  scs: Move DEFINE_SCS macro into core code
  scs: Remove references to asm/scs.h from core code
  scs: Move scs_overflow_check() out of architecture code
  arm64: scs: Use 'scs_sp' register alias for x18
  scs: Move accounting into alloc/free functions
  arm64: scs: Store absolute SCS stack pointer value in thread_info
  efi/libstub: Disable Shadow Call Stack
  arm64: scs: Add shadow stacks for SDEI
  arm64: Implement Shadow Call Stack
  arm64: Disable SCS for hypervisor code
  arm64: vdso: Disable Shadow Call Stack
  arm64: efi: Restore register x18 if it was corrupted
  arm64: Preserve register x18 when CPU is suspended
  arm64: Reserve register x18 from general allocation with SCS
  scs: Disable when function graph tracing is enabled
  scs: Add support for stack usage debugging
  scs: Add page accounting for shadow call stack allocations
  scs: Add support for Clang's Shadow Call Stack (SCS)
</content>
</entry>
</feed>
