<feed xmlns='http://www.w3.org/2005/Atom'>
<title>wireguard-linux/arch/arm64/include/asm/kvm_pgtable.h, branch jd/orphan-parallel</title>
<subtitle>WireGuard for the Linux kernel</subtitle>
<id>https://git.zx2c4.com/wireguard-linux/atom/arch/arm64/include/asm/kvm_pgtable.h?h=jd%2Forphan-parallel</id>
<link rel='self' href='https://git.zx2c4.com/wireguard-linux/atom/arch/arm64/include/asm/kvm_pgtable.h?h=jd%2Forphan-parallel'/>
<link rel='alternate' type='text/html' href='https://git.zx2c4.com/wireguard-linux/'/>
<updated>2020-09-11T14:51:15Z</updated>
<entry>
<title>KVM: arm64: Add support for relaxing stage-2 perms in generic page-table code</title>
<updated>2020-09-11T14:51:15Z</updated>
<author>
<name>Will Deacon</name>
<email>will@kernel.org</email>
</author>
<published>2020-09-11T13:25:24Z</published>
<link rel='alternate' type='text/html' href='https://git.zx2c4.com/wireguard-linux/commit/?id=adcd4e23291e67575be0c8b08eed04fbe7fd9e77'/>
<id>urn:sha1:adcd4e23291e67575be0c8b08eed04fbe7fd9e77</id>
<content type='text'>
Add support for relaxing the permissions of a stage-2 mapping (i.e.
adding additional permissions) to the generic page-table code.

Signed-off-by: Will Deacon &lt;will@kernel.org&gt;
Signed-off-by: Marc Zyngier &lt;maz@kernel.org&gt;
Reviewed-by: Gavin Shan &lt;gshan@redhat.com&gt;
Cc: Marc Zyngier &lt;maz@kernel.org&gt;
Cc: Quentin Perret &lt;qperret@google.com&gt;
Link: https://lore.kernel.org/r/20200911132529.19844-17-will@kernel.org
</content>
</entry>
<entry>
<title>KVM: arm64: Add support for stage-2 cache flushing in generic page-table</title>
<updated>2020-09-11T14:51:14Z</updated>
<author>
<name>Quentin Perret</name>
<email>qperret@google.com</email>
</author>
<published>2020-09-11T13:25:22Z</published>
<link rel='alternate' type='text/html' href='https://git.zx2c4.com/wireguard-linux/commit/?id=93c66b40d728178722706a306df15ce92c819cd6'/>
<id>urn:sha1:93c66b40d728178722706a306df15ce92c819cd6</id>
<content type='text'>
Add support for cache flushing a range of the stage-2 address space to
the generic page-table code.

Signed-off-by: Quentin Perret &lt;qperret@google.com&gt;
Signed-off-by: Will Deacon &lt;will@kernel.org&gt;
Signed-off-by: Marc Zyngier &lt;maz@kernel.org&gt;
Reviewed-by: Gavin Shan &lt;gshan@redhat.com&gt;
Cc: Marc Zyngier &lt;maz@kernel.org&gt;
Link: https://lore.kernel.org/r/20200911132529.19844-15-will@kernel.org
</content>
</entry>
<entry>
<title>KVM: arm64: Add support for stage-2 write-protect in generic page-table</title>
<updated>2020-09-11T14:51:14Z</updated>
<author>
<name>Quentin Perret</name>
<email>qperret@google.com</email>
</author>
<published>2020-09-11T13:25:20Z</published>
<link rel='alternate' type='text/html' href='https://git.zx2c4.com/wireguard-linux/commit/?id=73d49df2c3e7cad5bf64c92ec03ce9e3823898b9'/>
<id>urn:sha1:73d49df2c3e7cad5bf64c92ec03ce9e3823898b9</id>
<content type='text'>
Add a stage-2 wrprotect() operation to the generic page-table code.

Signed-off-by: Quentin Perret &lt;qperret@google.com&gt;
Signed-off-by: Will Deacon &lt;will@kernel.org&gt;
Signed-off-by: Marc Zyngier &lt;maz@kernel.org&gt;
Reviewed-by: Gavin Shan &lt;gshan@redhat.com&gt;
Cc: Marc Zyngier &lt;maz@kernel.org&gt;
Link: https://lore.kernel.org/r/20200911132529.19844-13-will@kernel.org
</content>
</entry>
<entry>
<title>KVM: arm64: Add support for stage-2 page-aging in generic page-table</title>
<updated>2020-09-11T14:51:14Z</updated>
<author>
<name>Will Deacon</name>
<email>will@kernel.org</email>
</author>
<published>2020-09-11T13:25:18Z</published>
<link rel='alternate' type='text/html' href='https://git.zx2c4.com/wireguard-linux/commit/?id=e0e5a07f3f5adca259ffa8ad3f4153ab448a4115'/>
<id>urn:sha1:e0e5a07f3f5adca259ffa8ad3f4153ab448a4115</id>
<content type='text'>
Add stage-2 mkyoung(), mkold() and is_young() operations to the generic
page-table code.

Signed-off-by: Will Deacon &lt;will@kernel.org&gt;
Signed-off-by: Marc Zyngier &lt;maz@kernel.org&gt;
Reviewed-by: Gavin Shan &lt;gshan@redhat.com&gt;
Cc: Marc Zyngier &lt;maz@kernel.org&gt;
Cc: Quentin Perret &lt;qperret@google.com&gt;
Link: https://lore.kernel.org/r/20200911132529.19844-11-will@kernel.org
</content>
</entry>
<entry>
<title>KVM: arm64: Add support for stage-2 map()/unmap() in generic page-table</title>
<updated>2020-09-11T14:51:13Z</updated>
<author>
<name>Will Deacon</name>
<email>will@kernel.org</email>
</author>
<published>2020-09-11T13:25:14Z</published>
<link rel='alternate' type='text/html' href='https://git.zx2c4.com/wireguard-linux/commit/?id=6d9d2115c48027132a69477c98d812be669f5b9b'/>
<id>urn:sha1:6d9d2115c48027132a69477c98d812be669f5b9b</id>
<content type='text'>
Add stage-2 map() and unmap() operations to the generic page-table code.

Signed-off-by: Will Deacon &lt;will@kernel.org&gt;
Signed-off-by: Marc Zyngier &lt;maz@kernel.org&gt;
Reviewed-by: Gavin Shan &lt;gshan@redhat.com&gt;
Cc: Marc Zyngier &lt;maz@kernel.org&gt;
Cc: Quentin Perret &lt;qperret@google.com&gt;
Link: https://lore.kernel.org/r/20200911132529.19844-7-will@kernel.org
</content>
</entry>
<entry>
<title>KVM: arm64: Add support for creating kernel-agnostic stage-2 page tables</title>
<updated>2020-09-11T14:51:13Z</updated>
<author>
<name>Will Deacon</name>
<email>will@kernel.org</email>
</author>
<published>2020-09-11T13:25:13Z</published>
<link rel='alternate' type='text/html' href='https://git.zx2c4.com/wireguard-linux/commit/?id=71233d05f4b5e3560f0d3d5607d01e9beff8dcbd'/>
<id>urn:sha1:71233d05f4b5e3560f0d3d5607d01e9beff8dcbd</id>
<content type='text'>
Introduce alloc() and free() functions to the generic page-table code
for guest stage-2 page-tables and plumb these into the existing KVM
page-table allocator. Subsequent patches will convert other operations
within the KVM allocator over to the generic code.

Signed-off-by: Will Deacon &lt;will@kernel.org&gt;
Signed-off-by: Marc Zyngier &lt;maz@kernel.org&gt;
Reviewed-by: Gavin Shan &lt;gshan@redhat.com&gt;
Cc: Marc Zyngier &lt;maz@kernel.org&gt;
Cc: Quentin Perret &lt;qperret@google.com&gt;
Link: https://lore.kernel.org/r/20200911132529.19844-6-will@kernel.org
</content>
</entry>
<entry>
<title>KVM: arm64: Use generic allocator for hyp stage-1 page-tables</title>
<updated>2020-09-11T14:51:13Z</updated>
<author>
<name>Will Deacon</name>
<email>will@kernel.org</email>
</author>
<published>2020-09-11T13:25:12Z</published>
<link rel='alternate' type='text/html' href='https://git.zx2c4.com/wireguard-linux/commit/?id=0f9d09b8e29bc8166f6584279aedc4a7a4038f68'/>
<id>urn:sha1:0f9d09b8e29bc8166f6584279aedc4a7a4038f68</id>
<content type='text'>
Now that we have a shiny new page-table allocator, replace the hyp
page-table code with calls into the new API. This also allows us to
remove the extended idmap code, as we can now simply ensure that the
VA size is large enough to map everything we need.

Signed-off-by: Will Deacon &lt;will@kernel.org&gt;
Signed-off-by: Marc Zyngier &lt;maz@kernel.org&gt;
Cc: Marc Zyngier &lt;maz@kernel.org&gt;
Cc: Quentin Perret &lt;qperret@google.com&gt;
Link: https://lore.kernel.org/r/20200911132529.19844-5-will@kernel.org
</content>
</entry>
<entry>
<title>KVM: arm64: Add support for creating kernel-agnostic stage-1 page tables</title>
<updated>2020-09-11T14:51:12Z</updated>
<author>
<name>Will Deacon</name>
<email>will@kernel.org</email>
</author>
<published>2020-09-11T13:25:11Z</published>
<link rel='alternate' type='text/html' href='https://git.zx2c4.com/wireguard-linux/commit/?id=bb0e92cbbcd1f91411d0a7241f8febe2c8c5b078'/>
<id>urn:sha1:bb0e92cbbcd1f91411d0a7241f8febe2c8c5b078</id>
<content type='text'>
The generic page-table walker is pretty useless as it stands, because it
doesn't understand enough to allocate anything. Teach it about stage-1
page-tables, and hook up an API for allocating these for the hypervisor
at EL2.

Signed-off-by: Will Deacon &lt;will@kernel.org&gt;
Signed-off-by: Marc Zyngier &lt;maz@kernel.org&gt;
Reviewed-by: Gavin Shan &lt;gshan@redhat.com&gt;
Cc: Marc Zyngier &lt;maz@kernel.org&gt;
Cc: Quentin Perret &lt;qperret@google.com&gt;
Link: https://lore.kernel.org/r/20200911132529.19844-4-will@kernel.org
</content>
</entry>
<entry>
<title>KVM: arm64: Add stand-alone page-table walker infrastructure</title>
<updated>2020-09-11T14:51:12Z</updated>
<author>
<name>Will Deacon</name>
<email>will@kernel.org</email>
</author>
<published>2020-09-11T13:25:10Z</published>
<link rel='alternate' type='text/html' href='https://git.zx2c4.com/wireguard-linux/commit/?id=b1e57de62cfb4d05f45ab848bb893fbcff9557d3'/>
<id>urn:sha1:b1e57de62cfb4d05f45ab848bb893fbcff9557d3</id>
<content type='text'>
The KVM page-table code is intricately tied into the kernel page-table
code and re-uses the pte/pmd/pud/p4d/pgd macros directly in an attempt
to reduce code duplication. Unfortunately, the reality is that there is
an awful lot of code required to make this work, and at the end of the
day you're limited to creating page-tables with the same configuration
as the host kernel. Furthermore, lifting the page-table code to run
directly at EL2 on a non-VHE system (as we plan to to do in future
patches) is practically impossible due to the number of dependencies it
has on the core kernel.

Introduce a framework for walking Armv8 page-tables configured
independently from the host kernel.

Signed-off-by: Will Deacon &lt;will@kernel.org&gt;
Signed-off-by: Marc Zyngier &lt;maz@kernel.org&gt;
Reviewed-by: Gavin Shan &lt;gshan@redhat.com&gt;
Cc: Marc Zyngier &lt;maz@kernel.org&gt;
Cc: Quentin Perret &lt;qperret@google.com&gt;
Link: https://lore.kernel.org/r/20200911132529.19844-3-will@kernel.org
</content>
</entry>
</feed>
