<feed xmlns='http://www.w3.org/2005/Atom'>
<title>wireguard-linux/arch/arm64/kernel/ptrace.c, branch jd/orphan-parallel</title>
<subtitle>WireGuard for the Linux kernel</subtitle>
<id>https://git.zx2c4.com/wireguard-linux/atom/arch/arm64/kernel/ptrace.c?h=jd%2Forphan-parallel</id>
<link rel='self' href='https://git.zx2c4.com/wireguard-linux/atom/arch/arm64/kernel/ptrace.c?h=jd%2Forphan-parallel'/>
<link rel='alternate' type='text/html' href='https://git.zx2c4.com/wireguard-linux/'/>
<updated>2020-09-04T11:46:07Z</updated>
<entry>
<title>arm64: mte: ptrace: Add NT_ARM_TAGGED_ADDR_CTRL regset</title>
<updated>2020-09-04T11:46:07Z</updated>
<author>
<name>Catalin Marinas</name>
<email>catalin.marinas@arm.com</email>
</author>
<published>2020-07-03T14:12:57Z</published>
<link rel='alternate' type='text/html' href='https://git.zx2c4.com/wireguard-linux/commit/?id=2200aa7154cb7ef76bac93e98326883ba64bfa2e'/>
<id>urn:sha1:2200aa7154cb7ef76bac93e98326883ba64bfa2e</id>
<content type='text'>
This regset allows read/write access to a ptraced process
prctl(PR_SET_TAGGED_ADDR_CTRL) setting.

Signed-off-by: Catalin Marinas &lt;catalin.marinas@arm.com&gt;
Cc: Will Deacon &lt;will@kernel.org&gt;
Cc: Alan Hayward &lt;Alan.Hayward@arm.com&gt;
Cc: Luis Machado &lt;luis.machado@linaro.org&gt;
Cc: Omair Javaid &lt;omair.javaid@linaro.org&gt;
</content>
</entry>
<entry>
<title>arm64: mte: ptrace: Add PTRACE_{PEEK,POKE}MTETAGS support</title>
<updated>2020-09-04T11:46:07Z</updated>
<author>
<name>Catalin Marinas</name>
<email>catalin.marinas@arm.com</email>
</author>
<published>2020-03-30T09:29:38Z</published>
<link rel='alternate' type='text/html' href='https://git.zx2c4.com/wireguard-linux/commit/?id=18ddbaa02b7a64f4cf3e7e3d4b78b8b70481a17b'/>
<id>urn:sha1:18ddbaa02b7a64f4cf3e7e3d4b78b8b70481a17b</id>
<content type='text'>
Add support for bulk setting/getting of the MTE tags in a tracee's
address space at 'addr' in the ptrace() syscall prototype. 'data' points
to a struct iovec in the tracer's address space with iov_base
representing the address of a tracer's buffer of length iov_len. The
tags to be copied to/from the tracer's buffer are stored as one tag per
byte.

On successfully copying at least one tag, ptrace() returns 0 and updates
the tracer's iov_len with the number of tags copied. In case of error,
either -EIO or -EFAULT is returned, trying to follow the ptrace() man
page.

Note that the tag copying functions are not performance critical,
therefore they lack optimisations found in typical memory copy routines.

Signed-off-by: Catalin Marinas &lt;catalin.marinas@arm.com&gt;
Cc: Will Deacon &lt;will@kernel.org&gt;
Cc: Alan Hayward &lt;Alan.Hayward@arm.com&gt;
Cc: Luis Machado &lt;luis.machado@linaro.org&gt;
Cc: Omair Javaid &lt;omair.javaid@linaro.org&gt;
</content>
</entry>
<entry>
<title>arm64: mte: system register definitions</title>
<updated>2020-09-03T16:26:31Z</updated>
<author>
<name>Vincenzo Frascino</name>
<email>vincenzo.frascino@arm.com</email>
</author>
<published>2019-09-06T09:55:29Z</published>
<link rel='alternate' type='text/html' href='https://git.zx2c4.com/wireguard-linux/commit/?id=c058b1c4a5ea7b88cce4c961c1000acf482ea64b'/>
<id>urn:sha1:c058b1c4a5ea7b88cce4c961c1000acf482ea64b</id>
<content type='text'>
Add Memory Tagging Extension system register definitions together with
the relevant bitfields.

Signed-off-by: Vincenzo Frascino &lt;vincenzo.frascino@arm.com&gt;
Co-developed-by: Catalin Marinas &lt;catalin.marinas@arm.com&gt;
Signed-off-by: Catalin Marinas &lt;catalin.marinas@arm.com&gt;
Cc: Will Deacon &lt;will@kernel.org&gt;
</content>
</entry>
<entry>
<title>Merge branch 'work.regset' of git://git.kernel.org/pub/scm/linux/kernel/git/viro/vfs</title>
<updated>2020-08-07T16:29:25Z</updated>
<author>
<name>Linus Torvalds</name>
<email>torvalds@linux-foundation.org</email>
</author>
<published>2020-08-07T16:29:25Z</published>
<link rel='alternate' type='text/html' href='https://git.zx2c4.com/wireguard-linux/commit/?id=19b39c38abf68591edbd698740d410c37ee075cc'/>
<id>urn:sha1:19b39c38abf68591edbd698740d410c37ee075cc</id>
<content type='text'>
Pull ptrace regset updates from Al Viro:
 "Internal regset API changes:

   - regularize copy_regset_{to,from}_user() callers

   - switch to saner calling conventions for -&gt;get()

   - kill user_regset_copyout()

  The -&gt;put() side of things will have to wait for the next cycle,
  unfortunately.

  The balance is about -1KLoC and replacements for -&gt;get() instances are
  a lot saner"

* 'work.regset' of git://git.kernel.org/pub/scm/linux/kernel/git/viro/vfs: (41 commits)
  regset: kill user_regset_copyout{,_zero}()
  regset(): kill -&gt;get_size()
  regset: kill -&gt;get()
  csky: switch to -&gt;regset_get()
  xtensa: switch to -&gt;regset_get()
  parisc: switch to -&gt;regset_get()
  nds32: switch to -&gt;regset_get()
  nios2: switch to -&gt;regset_get()
  hexagon: switch to -&gt;regset_get()
  h8300: switch to -&gt;regset_get()
  openrisc: switch to -&gt;regset_get()
  riscv: switch to -&gt;regset_get()
  c6x: switch to -&gt;regset_get()
  ia64: switch to -&gt;regset_get()
  arc: switch to -&gt;regset_get()
  arm: switch to -&gt;regset_get()
  sh: convert to -&gt;regset_get()
  arm64: switch to -&gt;regset_get()
  mips: switch to -&gt;regset_get()
  sparc: switch to -&gt;regset_get()
  ...
</content>
</entry>
<entry>
<title>regset(): kill -&gt;get_size()</title>
<updated>2020-07-27T18:31:13Z</updated>
<author>
<name>Al Viro</name>
<email>viro@zeniv.linux.org.uk</email>
</author>
<published>2020-06-17T13:57:08Z</published>
<link rel='alternate' type='text/html' href='https://git.zx2c4.com/wireguard-linux/commit/?id=c522401e0656b51e6a65ec112489cb078801aa9c'/>
<id>urn:sha1:c522401e0656b51e6a65ec112489cb078801aa9c</id>
<content type='text'>
not used anymore

Signed-off-by: Al Viro &lt;viro@zeniv.linux.org.uk&gt;
</content>
</entry>
<entry>
<title>arm64: switch to -&gt;regset_get()</title>
<updated>2020-07-27T18:31:08Z</updated>
<author>
<name>Al Viro</name>
<email>viro@zeniv.linux.org.uk</email>
</author>
<published>2020-05-27T23:09:44Z</published>
<link rel='alternate' type='text/html' href='https://git.zx2c4.com/wireguard-linux/commit/?id=759de58f28b1cd90a485d3bf1ce49236a153ce51'/>
<id>urn:sha1:759de58f28b1cd90a485d3bf1ce49236a153ce51</id>
<content type='text'>
Signed-off-by: Al Viro &lt;viro@zeniv.linux.org.uk&gt;
</content>
</entry>
<entry>
<title>arm64: ptrace: Use NO_SYSCALL instead of -1 in syscall_trace_enter()</title>
<updated>2020-07-16T10:42:08Z</updated>
<author>
<name>Will Deacon</name>
<email>will@kernel.org</email>
</author>
<published>2020-07-10T12:20:57Z</published>
<link rel='alternate' type='text/html' href='https://git.zx2c4.com/wireguard-linux/commit/?id=d83ee6e3e75db6f518ef2b0858f163849f2ddeb7'/>
<id>urn:sha1:d83ee6e3e75db6f518ef2b0858f163849f2ddeb7</id>
<content type='text'>
Setting a system call number of -1 is special, as it indicates that the
current system call should be skipped.

Use NO_SYSCALL instead of -1 when checking for this scenario, which is
different from the -1 returned due to a seccomp failure.

Cc: Mark Rutland &lt;mark.rutland@arm.com&gt;
Cc: Keno Fischer &lt;keno@juliacomputing.com&gt;
Cc: Luis Machado &lt;luis.machado@linaro.org&gt;
Signed-off-by: Will Deacon &lt;will@kernel.org&gt;
</content>
</entry>
<entry>
<title>arm64: ptrace: Add a comment describing our syscall entry/exit trap ABI</title>
<updated>2020-07-16T10:41:41Z</updated>
<author>
<name>Will Deacon</name>
<email>will@kernel.org</email>
</author>
<published>2020-07-02T20:14:20Z</published>
<link rel='alternate' type='text/html' href='https://git.zx2c4.com/wireguard-linux/commit/?id=59ee987ea47caff8c1e7ba4b89932c6900a35d0c'/>
<id>urn:sha1:59ee987ea47caff8c1e7ba4b89932c6900a35d0c</id>
<content type='text'>
Our tracehook logic for syscall entry/exit raises a SIGTRAP back to the
tracer following a ptrace request such as PTRACE_SYSCALL. As part of this
procedure, we clobber the reported value of one of the tracee's general
purpose registers (x7 for native tasks, r12 for compat) to indicate
whether the stop occurred on syscall entry or exit. This is a slightly
unfortunate ABI, as it prevents the tracer from accessing the real
register value and is at odds with other similar stops such as seccomp
traps.

Since we're stuck with this ABI, expand the comment in our tracehook
logic to acknowledge the issue and describe the behaviour in more detail.

Cc: Mark Rutland &lt;mark.rutland@arm.com&gt;
Cc: Luis Machado &lt;luis.machado@linaro.org&gt;
Reported-by: Keno Fischer &lt;keno@juliacomputing.com&gt;
Signed-off-by: Will Deacon &lt;will@kernel.org&gt;
</content>
</entry>
<entry>
<title>arm64: ptrace: Override SPSR.SS when single-stepping is enabled</title>
<updated>2020-07-16T10:41:21Z</updated>
<author>
<name>Will Deacon</name>
<email>will@kernel.org</email>
</author>
<published>2020-02-13T12:06:26Z</published>
<link rel='alternate' type='text/html' href='https://git.zx2c4.com/wireguard-linux/commit/?id=3a5a4366cecc25daa300b9a9174f7fdd352b9068'/>
<id>urn:sha1:3a5a4366cecc25daa300b9a9174f7fdd352b9068</id>
<content type='text'>
Luis reports that, when reverse debugging with GDB, single-step does not
function as expected on arm64:

  | I've noticed, under very specific conditions, that a PTRACE_SINGLESTEP
  | request by GDB won't execute the underlying instruction. As a consequence,
  | the PC doesn't move, but we return a SIGTRAP just like we would for a
  | regular successful PTRACE_SINGLESTEP request.

The underlying problem is that when the CPU register state is restored
as part of a reverse step, the SPSR.SS bit is cleared and so the hardware
single-step state can transition to the "active-pending" state, causing
an unexpected step exception to be taken immediately if a step operation
is attempted.

In hindsight, we probably shouldn't have exposed SPSR.SS in the pstate
accessible by the GPR regset, but it's a bit late for that now. Instead,
simply prevent userspace from configuring the bit to a value which is
inconsistent with the TIF_SINGLESTEP state for the task being traced.

Cc: &lt;stable@vger.kernel.org&gt;
Cc: Mark Rutland &lt;mark.rutland@arm.com&gt;
Cc: Keno Fischer &lt;keno@juliacomputing.com&gt;
Link: https://lore.kernel.org/r/1eed6d69-d53d-9657-1fc9-c089be07f98c@linaro.org
Reported-by: Luis Machado &lt;luis.machado@linaro.org&gt;
Tested-by: Luis Machado &lt;luis.machado@linaro.org&gt;
Signed-off-by: Will Deacon &lt;will@kernel.org&gt;
</content>
</entry>
<entry>
<title>arm64: ptrace: Consistently use pseudo-singlestep exceptions</title>
<updated>2020-07-16T10:41:07Z</updated>
<author>
<name>Will Deacon</name>
<email>will@kernel.org</email>
</author>
<published>2020-07-02T20:16:20Z</published>
<link rel='alternate' type='text/html' href='https://git.zx2c4.com/wireguard-linux/commit/?id=ac2081cdc4d99c57f219c1a6171526e0fa0a6fff'/>
<id>urn:sha1:ac2081cdc4d99c57f219c1a6171526e0fa0a6fff</id>
<content type='text'>
Although the arm64 single-step state machine can be fast-forwarded in
cases where we wish to generate a SIGTRAP without actually executing an
instruction, this has two major limitations outside of simply skipping
an instruction due to emulation.

1. Stepping out of a ptrace signal stop into a signal handler where
   SIGTRAP is blocked. Fast-forwarding the stepping state machine in
   this case will result in a forced SIGTRAP, with the handler reset to
   SIG_DFL.

2. The hardware implicitly fast-forwards the state machine when executing
   an SVC instruction for issuing a system call. This can interact badly
   with subsequent ptrace stops signalled during the execution of the
   system call (e.g. SYSCALL_EXIT or seccomp traps), as they may corrupt
   the stepping state by updating the PSTATE for the tracee.

Resolve both of these issues by injecting a pseudo-singlestep exception
on entry to a signal handler and also on return to userspace following a
system call.

Cc: &lt;stable@vger.kernel.org&gt;
Cc: Mark Rutland &lt;mark.rutland@arm.com&gt;
Tested-by: Luis Machado &lt;luis.machado@linaro.org&gt;
Reported-by: Keno Fischer &lt;keno@juliacomputing.com&gt;
Signed-off-by: Will Deacon &lt;will@kernel.org&gt;
</content>
</entry>
</feed>
