<feed xmlns='http://www.w3.org/2005/Atom'>
<title>wireguard-linux/arch/mips/include/asm/bootinfo.h, branch jd/unified-crypt-queue</title>
<subtitle>WireGuard for the Linux kernel</subtitle>
<id>https://git.zx2c4.com/wireguard-linux/atom/arch/mips/include/asm/bootinfo.h?h=jd%2Funified-crypt-queue</id>
<link rel='self' href='https://git.zx2c4.com/wireguard-linux/atom/arch/mips/include/asm/bootinfo.h?h=jd%2Funified-crypt-queue'/>
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<updated>2020-01-09T17:48:42Z</updated>
<entry>
<title>MIPS: X1830: Add X1830 system type.</title>
<updated>2020-01-09T17:48:42Z</updated>
<author>
<name>周琰杰 (Zhou Yanjie)</name>
<email>zhouyanjie@wanyeetech.com</email>
</author>
<published>2019-12-09T05:10:25Z</published>
<link rel='alternate' type='text/html' href='https://git.zx2c4.com/wireguard-linux/commit/?id=b9bb868e2fc169b7917392eb41c84bc7436a8022'/>
<id>urn:sha1:b9bb868e2fc169b7917392eb41c84bc7436a8022</id>
<content type='text'>
1.Add X1830 system type for cat /proc/cpuinfo to give out X1830.
2.Change "PRID_IMP_XBURST" to "PRID_IMP_XBURST_REV1" and add a
  new "PRID_IMP_XBURST_REV2" for new Ingenic CPUs which has
  XBurst with MXU2 SIMD ISA.

Notice:
1."PRID_IMP_XBURST_REV2" is corresponds to the latest XBurst
  processor with 128bit MXU2 SIMD instruction set, not the upcoming
  XBurst2 processor. This version of the processors fixes issues
  such as BTB and HPTLB.
2.In order to simplify and reuse the code, the "c-&gt;cputype" and
  the "c-&gt;writecombine" and the "__cpu_name[cpu]" in the original
  "PRID_IMP_XBURST" (now is "PRID_IMP_XBURST_REV1") are removed,
  and the corresponding settings are abtained through fall-through
  to "PRID_IMP_XBURST_REV2", which will cause the name that was
  previously mistakenly called "JZRISC" to become to the real name
  "XBurst".

Signed-off-by: 周琰杰 (Zhou Yanjie) &lt;zhouyanjie@wanyeetech.com&gt;
Signed-off-by: Paul Burton &lt;paulburton@kernel.org&gt;
Cc: linux-mips@vger.kernel.org
Cc: linux-kernel@vger.kernel.org
Cc: yamada.masahiro@socionext.com
Cc: tglx@linutronix.de
Cc: chenhc@lemote.com
Cc: tbogendoerfer@suse.de
Cc: paul.burton@mips.com
Cc: paul@crapouillou.net
Cc: jhogan@kernel.org
Cc: fancer.lancer@gmail.com
Cc: ralf@linux-mips.org
Cc: jiaxun.yang@flygoat.com
</content>
</entry>
<entry>
<title>MIPS: Loongson64: Cleanup unused code</title>
<updated>2019-11-01T21:31:28Z</updated>
<author>
<name>Jiaxun Yang</name>
<email>jiaxun.yang@flygoat.com</email>
</author>
<published>2019-10-20T15:01:35Z</published>
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<id>urn:sha1:1bdb7b76705a38936e9875950587ea91c9ec0a98</id>
<content type='text'>
Clean up legacy code after stripping out Loongson2ef code.

Signed-off-by: Jiaxun Yang &lt;jiaxun.yang@flygoat.com&gt;
Signed-off-by: Paul Burton &lt;paulburton@kernel.org&gt;
Cc: linux-mips@vger.kernel.org
Cc: paul.burton@mips.com
</content>
</entry>
<entry>
<title>MIPS: SGI-IP22/28: Use PROM for memory detection</title>
<updated>2019-10-09T21:55:57Z</updated>
<author>
<name>Thomas Bogendoerfer</name>
<email>tbogendoerfer@suse.de</email>
</author>
<published>2019-10-09T13:27:17Z</published>
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<id>urn:sha1:c0de00b286ed1c14064ff94ca70abdfd4e4d11e8</id>
<content type='text'>
EARLY_PRINTK uses ArcWrite (via prom_putchar) on IP22/28, which needs
to not mess up PROMs data structures. ARC PROM gives out a list of
memory chunks, which are used and which are free. This fixes the
problem of not working early printk.

By using XKPHYS spaces more than 256MB memory on Indigo2 R4k machines
is working now, too.

Signed-off-by: Thomas Bogendoerfer &lt;tbogendoerfer@suse.de&gt;
Signed-off-by: Paul Burton &lt;paul.burton@mips.com&gt;
Cc: Ralf Baechle &lt;ralf@linux-mips.org&gt;
Cc: James Hogan &lt;jhogan@kernel.org&gt;
Cc: linux-mips@vger.kernel.org
Cc: linux-kernel@vger.kernel.org
</content>
</entry>
<entry>
<title>MIPS: init: Drop boot_mem_map</title>
<updated>2019-08-23T14:42:40Z</updated>
<author>
<name>Jiaxun Yang</name>
<email>jiaxun.yang@flygoat.com</email>
</author>
<published>2019-08-19T14:23:13Z</published>
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<id>urn:sha1:a94e4f24ec836c8984f839594bad7454184975b1</id>
<content type='text'>
boot_mem_map was introduced very early and cannot handle memory maps
with nid. Nowadays, memblock can exactly replace boot_mem_map.

Detect pfn info and setup resources with memblock maps.

Signed-off-by: Jiaxun Yang &lt;jiaxun.yang@flygoat.com&gt;
[paul.burton@mips.com: Fix size calculation in check_kernel_sections_mem]
Signed-off-by: Paul Burton &lt;paul.burton@mips.com&gt;
Cc: linux-mips@vger.kernel.org
Cc: yasha.che3@gmail.com
Cc: aurelien@aurel32.net
Cc: sfr@canb.auug.org.au
Cc: fancer.lancer@gmail.com
Cc: matt.redfearn@mips.com
Cc: chenhc@lemote.com
</content>
</entry>
<entry>
<title>MIPS: X1000: Add X1000 system type.</title>
<updated>2019-07-30T16:41:14Z</updated>
<author>
<name>Zhou Yanjie</name>
<email>zhouyanjie@zoho.com</email>
</author>
<published>2019-07-30T11:30:11Z</published>
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<id>urn:sha1:7ea502e1d885966cb5912b4488255d8c12645042</id>
<content type='text'>
Add X1000 system type for cat /proc/cpuinfo to give out X1000.

Signed-off-by: Zhou Yanjie &lt;zhouyanjie@zoho.com&gt;
Signed-off-by: Paul Burton &lt;paul.burton@mips.com&gt;
Cc: linux-mips@vger.kernel.org
Cc: linux-kernel@vger.kernel.org
Cc: ralf@linux-mips.org
Cc: paul@crapouillou.net
Cc: jhogan@kernel.org
Cc: fancer.lancer@gmail.com
Cc: chenhc@lemote.com
Cc: tglx@linutronix.de
Cc: gregkh@linuxfoundation.org
Cc: armijn@tjaldur.nl
Cc: syq@debian.org
Cc: jiaxun.yang@flygoat.com
</content>
</entry>
<entry>
<title>mips: Add reserve-nomap memory type support</title>
<updated>2019-05-02T18:27:11Z</updated>
<author>
<name>Serge Semin</name>
<email>fancer.lancer@gmail.com</email>
</author>
<published>2019-04-23T22:47:43Z</published>
<link rel='alternate' type='text/html' href='https://git.zx2c4.com/wireguard-linux/commit/?id=9b9a59db84812d326af41a3802c63f1f95d81016'/>
<id>urn:sha1:9b9a59db84812d326af41a3802c63f1f95d81016</id>
<content type='text'>
It might be necessary to prevent the virtual mapping creation for a
requested memory region. For instance there is a "no-map" property
indicating exactly this feature. In this case we need to not only
reserve the specified region by pretending it doesn't exist in the
memory space, but completely remove the range from system just by
removing it from memblock. The same way it's done in default
early_init_dt_reserve_memory_arch() method.

Signed-off-by: Serge Semin &lt;fancer.lancer@gmail.com&gt;
Signed-off-by: Paul Burton &lt;paul.burton@mips.com&gt;
Cc: Ralf Baechle &lt;ralf@linux-mips.org&gt;
Cc: James Hogan &lt;jhogan@kernel.org&gt;
Cc: Matt Redfearn &lt;matt.redfearn@mips.com&gt;
Cc: Mike Rapoport &lt;rppt@linux.ibm.com&gt;
Cc: Andrew Morton &lt;akpm@linux-foundation.org&gt;
Cc: Michal Hocko &lt;mhocko@suse.com&gt;
Cc: Greg Kroah-Hartman &lt;gregkh@linuxfoundation.org&gt;
Cc: Thomas Bogendoerfer &lt;tbogendoerfer@suse.de&gt;
Cc: Huacai Chen &lt;chenhc@lemote.com&gt;
Cc: Stefan Agner &lt;stefan@agner.ch&gt;
Cc: Stephen Rothwell &lt;sfr@canb.auug.org.au&gt;
Cc: Alexandre Belloni &lt;alexandre.belloni@bootlin.com&gt;
Cc: Juergen Gross &lt;jgross@suse.com&gt;
Cc: linux-mips@vger.kernel.org
Cc: linux-kernel@vger.kernel.org
</content>
</entry>
<entry>
<title>MIPS: platform: add machtype IDs for more Ingenic SoCs</title>
<updated>2018-01-18T22:07:16Z</updated>
<author>
<name>Paul Cercueil</name>
<email>paul@crapouillou.net</email>
</author>
<published>2018-01-16T15:47:59Z</published>
<link rel='alternate' type='text/html' href='https://git.zx2c4.com/wireguard-linux/commit/?id=147b7910c8bdb4e702c8813bb3de4f3dc4eb4046'/>
<id>urn:sha1:147b7910c8bdb4e702c8813bb3de4f3dc4eb4046</id>
<content type='text'>
Add a machtype ID for the JZ4780 SoC, which was missing, and one for the
newly supported JZ4770 SoC.

Signed-off-by: Paul Cercueil &lt;paul@crapouillou.net&gt;
Reviewed-by: PrasannaKumar Muralidharan &lt;prasannatsmkumar@gmail.com&gt;
Reviewed-by: James Hogan &lt;jhogan@kernel.org&gt;
Cc: Ralf Baechle &lt;ralf@linux-mips.org&gt;
Cc: Maarten ter Huurne &lt;maarten@treewalker.org&gt;
Cc: linux-mips@linux-mips.org
Patchwork: https://patchwork.linux-mips.org/patch/18485/
Signed-off-by: James Hogan &lt;jhogan@kernel.org&gt;
</content>
</entry>
<entry>
<title>MIPS: platform: Allow for DTB to be moved during kernel relocation</title>
<updated>2017-01-03T15:34:45Z</updated>
<author>
<name>Marcin Nowakowski</name>
<email>marcin.nowakowski@imgtec.com</email>
</author>
<published>2016-11-23T13:43:47Z</published>
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<id>urn:sha1:0063fdede69b2cc6f861aab0641f7e25f451def9</id>
<content type='text'>
Add plat_fdt_relocated(void*) API to allow the kernel relocation code to
update platform's information about the DTB location if the DTB had to
be moved due to being placed in a location used by the relocated kernel.

Signed-off-by: Marcin Nowakowski &lt;marcin.nowakowski@imgtec.com&gt;
Cc: linux-mips@linux-mips.org
Patchwork: https://patchwork.linux-mips.org/patch/14611/
Signed-off-by: Ralf Baechle &lt;ralf@linux-mips.org&gt;
</content>
</entry>
<entry>
<title>MIPS: store the appended dtb address in a variable</title>
<updated>2016-08-02T12:00:16Z</updated>
<author>
<name>Jonas Gorski</name>
<email>jogo@openwrt.org</email>
</author>
<published>2016-06-20T09:27:37Z</published>
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<id>urn:sha1:15f37e1588920e010f20b53f04af94e91b8ee714</id>
<content type='text'>
Instead of rewriting the arguments to match the UHI spec, store the
address of a appended or UHI supplied dtb in fw_supplied_dtb.

That way the original bootloader arugments are kept intact while still
making the use of an appended dtb invisible for mach code.

Mach code can still find out if it is an appended dtb by comparing
fw_arg1 with fw_supplied_dtb.

Signed-off-by: Jonas Gorski &lt;jogo@openwrt.org&gt;
Cc: Kevin Cernekee &lt;cernekee@gmail.com&gt;
Cc: Florian Fainelli &lt;f.fainelli@gmail.com&gt;
Cc: John Crispin &lt;john@phrozen.org&gt;
Cc: Paul Burton &lt;paul.burton@imgtec.com&gt;
Cc: James Hogan &lt;james.hogan@imgtec.com&gt;
Cc: Alban Bedel &lt;albeu@free.fr&gt;
Cc: Daniel Gimpelevich &lt;daniel@gimpelevich.san-francisco.ca.us&gt;
Cc: Antony Pavlov &lt;antonynpavlov@gmail.com&gt;
Cc: linux-mips@linux-mips.org
Patchwork: https://patchwork.linux-mips.org/patch/13699/
Signed-off-by: Ralf Baechle &lt;ralf@linux-mips.org&gt;
</content>
</entry>
<entry>
<title>MIPS: Introduce plat_get_fdt a platform API to retrieve the FDT</title>
<updated>2016-05-13T12:02:03Z</updated>
<author>
<name>Matt Redfearn</name>
<email>matt.redfearn@imgtec.com</email>
</author>
<published>2016-03-31T09:05:40Z</published>
<link rel='alternate' type='text/html' href='https://git.zx2c4.com/wireguard-linux/commit/?id=5e7c1c918a4433c5dd1844d99f5648e17425fa16'/>
<id>urn:sha1:5e7c1c918a4433c5dd1844d99f5648e17425fa16</id>
<content type='text'>
Early access to the kernel command line requires early access to the FDT
for platforms which pass the command line within the device tree. There
was no common way to retrieve the location of the FDT without incurring
side effects, such as plat_mem_setup which, on Malta at least,
initializes a bunch of other stuff.

This patch adds plat_get_ftd() for IMG platforms.

Signed-off-by: Matt Redfearn &lt;matt.redfearn@imgtec.com&gt;
Cc: Paul Burton &lt;paul.burton@imgtec.com&gt;
Cc: linux-mips@linux-mips.org
Cc: kernel-hardening@lists.openwall.com
Cc: linux-kernel@vger.kernel.org
Patchwork: https://patchwork.linux-mips.org/patch/12988/
Signed-off-by: Ralf Baechle &lt;ralf@linux-mips.org&gt;
</content>
</entry>
</feed>
