<feed xmlns='http://www.w3.org/2005/Atom'>
<title>wireguard-linux/arch/mips/include/asm/mach-rm, branch jd/unified-crypt-queue</title>
<subtitle>WireGuard for the Linux kernel</subtitle>
<id>https://git.zx2c4.com/wireguard-linux/atom/arch/mips/include/asm/mach-rm?h=jd%2Funified-crypt-queue</id>
<link rel='self' href='https://git.zx2c4.com/wireguard-linux/atom/arch/mips/include/asm/mach-rm?h=jd%2Funified-crypt-queue'/>
<link rel='alternate' type='text/html' href='https://git.zx2c4.com/wireguard-linux/'/>
<updated>2020-03-19T12:12:27Z</updated>
<entry>
<title>MIPS: Add header files reference with path prefix</title>
<updated>2020-03-19T12:12:27Z</updated>
<author>
<name>bibo mao</name>
<email>maobibo@loongson.cn</email>
</author>
<published>2020-03-17T06:03:14Z</published>
<link rel='alternate' type='text/html' href='https://git.zx2c4.com/wireguard-linux/commit/?id=863be3c3ab7396d606c26b9e50ac06543ec3bfd6'/>
<id>urn:sha1:863be3c3ab7396d606c26b9e50ac06543ec3bfd6</id>
<content type='text'>
There are some common header files which are referenced locally
with #includenext method, includenext is tricky method and only
used on mips platform.

This patech removes includenext method, replace it with defailed
pathname prefix for header files.

This patch passes to compile on all mips platform with defconfig,
and is verified on my loongson64 box.

Changes:
--------
v2:
  - Fix compiling issue on malta platform

Reported-by: kbuild test robot &lt;lkp@intel.com&gt;
Signed-off-by: bibo mao &lt;maobibo@loongson.cn&gt;
Signed-off-by: Thomas Bogendoerfer &lt;tsbogend@alpha.franken.de&gt;
</content>
</entry>
<entry>
<title>MIPS: Remove unused R5432_CP0_INTERRUPT_WAR</title>
<updated>2019-07-23T21:33:44Z</updated>
<author>
<name>Paul Burton</name>
<email>paul.burton@mips.com</email>
</author>
<published>2019-07-22T22:00:00Z</published>
<link rel='alternate' type='text/html' href='https://git.zx2c4.com/wireguard-linux/commit/?id=ccd51b9fc3bf264482dab86875754c40cbe13045'/>
<id>urn:sha1:ccd51b9fc3bf264482dab86875754c40cbe13045</id>
<content type='text'>
R5432_CP0_INTERRUPT_WAR is defined as 0 for every system we support, and
so the workaround is never used. Remove the dead code.

Signed-off-by: Paul Burton &lt;paul.burton@mips.com&gt;
Cc: linux-mips@vger.kernel.org
</content>
</entry>
<entry>
<title>MIPS16e2: Provide feature overrides for non-MIPS16 systems</title>
<updated>2017-07-11T12:13:06Z</updated>
<author>
<name>Maciej W. Rozycki</name>
<email>macro@imgtec.com</email>
</author>
<published>2017-05-23T12:40:23Z</published>
<link rel='alternate' type='text/html' href='https://git.zx2c4.com/wireguard-linux/commit/?id=65ae8d2621a9fb20b53348311984ea79fee42a55'/>
<id>urn:sha1:65ae8d2621a9fb20b53348311984ea79fee42a55</id>
<content type='text'>
Hardcode the absence of the MIPS16e2 ASE for all the systems that do so
for the MIPS16 ASE already, providing for code to be optimized away.

Signed-off-by: Maciej W. Rozycki &lt;macro@imgtec.com&gt;
Reviewed-by: James Hogan &lt;james.hogan@imgtec.com&gt;
Cc: linux-mips@linux-mips.org
Patchwork: https://patchwork.linux-mips.org/patch/16097/
Signed-off-by: Ralf Baechle &lt;ralf@linux-mips.org&gt;
</content>
</entry>
<entry>
<title>MIPS: mach-rm: Remove recursive include of cpu-feature-overrides.h</title>
<updated>2017-04-12T11:52:22Z</updated>
<author>
<name>Marcin Nowakowski</name>
<email>marcin.nowakowski@imgtec.com</email>
</author>
<published>2017-03-13T13:33:37Z</published>
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<id>urn:sha1:1e548da5cef1f7148ce625f0bb0272ae2657cb1f</id>
<content type='text'>
cpu-feautre-overrides.h in mach-rm unnecessarily includes itself, so
drop the pointless include

Signed-off-by: Marcin Nowakowski &lt;marcin.nowakowski@imgtec.com&gt;
Cc: linux-mips@linux-mips.org
Patchwork: https://patchwork.linux-mips.org/patch/15462/
Signed-off-by: Ralf Baechle &lt;ralf@linux-mips.org&gt;
</content>
</entry>
<entry>
<title>MIPS: Correct `nofpu' non-functionality</title>
<updated>2015-04-07T23:09:49Z</updated>
<author>
<name>Maciej W. Rozycki</name>
<email>macro@linux-mips.org</email>
</author>
<published>2015-04-03T22:26:04Z</published>
<link rel='alternate' type='text/html' href='https://git.zx2c4.com/wireguard-linux/commit/?id=18a2c2c6b9319503eeac8a38b62fc82c9ff81b0d'/>
<id>urn:sha1:18a2c2c6b9319503eeac8a38b62fc82c9ff81b0d</id>
<content type='text'>
The `cpu_has_fpu' feature flag must not be hardcoded to 1 or the `nofpu'
kernel option will be ignored.  Remove any such overrides and add a
cautionary note.  Hardcoding to 0 is fine for FPU-less platforms.

Signed-off-by: Maciej W. Rozycki &lt;macro@linux-mips.org&gt;
Cc: linux-mips@linux-mips.org
Patchwork: https://patchwork.linux-mips.org/patch/9694/
Signed-off-by: Ralf Baechle &lt;ralf@linux-mips.org&gt;
</content>
</entry>
<entry>
<title>MIPS: PMC-Sierra Yosemite: Remove support.</title>
<updated>2012-12-13T17:15:30Z</updated>
<author>
<name>Ralf Baechle</name>
<email>ralf@linux-mips.org</email>
</author>
<published>2012-12-11T20:02:55Z</published>
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<id>urn:sha1:bdf20507da11a9a5b32ef04fa09f352828189aef</id>
<content type='text'>
Nobody seems to be interested anymore and upstream also never had an
ethernet driver.

Signed-off-by: Ralf Baechle &lt;ralf@linux-mips.org&gt;
</content>
</entry>
<entry>
<title>MIPS: Hardwire detection of DSP ASE Rev 2 for systems, as required.</title>
<updated>2012-10-11T09:10:43Z</updated>
<author>
<name>Ralf Baechle</name>
<email>ralf@linux-mips.org</email>
</author>
<published>2012-08-20T14:25:14Z</published>
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<id>urn:sha1:475032564ed96c94c085e3e7a90e07d150a7cec9</id>
<content type='text'>
Most supported systems currently hardwire cpu_has_dsp to 0, so we also
can disable support for cpu_has_dsp2 resulting in a slightly smaller
kernel.

Signed-off-by: Ralf Baechle &lt;ralf@linux-mips.org&gt;
</content>
</entry>
<entry>
<title>MIPS: Move headfiles to new location below arch/mips/include</title>
<updated>2008-10-11T15:18:52Z</updated>
<author>
<name>Ralf Baechle</name>
<email>ralf@linux-mips.org</email>
</author>
<published>2008-09-16T17:48:51Z</published>
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<id>urn:sha1:384740dc49ea651ba350704d13ff6be9976e37fe</id>
<content type='text'>
Signed-off-by: Ralf Baechle &lt;ralf@linux-mips.org&gt;
</content>
</entry>
</feed>
