<feed xmlns='http://www.w3.org/2005/Atom'>
<title>wireguard-linux/arch/mips/kernel/smp-bmips.c, branch jd/unified-crypt-queue</title>
<subtitle>WireGuard for the Linux kernel</subtitle>
<id>https://git.zx2c4.com/wireguard-linux/atom/arch/mips/kernel/smp-bmips.c?h=jd%2Funified-crypt-queue</id>
<link rel='self' href='https://git.zx2c4.com/wireguard-linux/atom/arch/mips/kernel/smp-bmips.c?h=jd%2Funified-crypt-queue'/>
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<updated>2019-11-11T18:44:52Z</updated>
<entry>
<title>MIPS: Drop pmon.h</title>
<updated>2019-11-11T18:44:52Z</updated>
<author>
<name>Jiaxun Yang</name>
<email>jiaxun.yang@flygoat.com</email>
</author>
<published>2019-11-07T04:01:14Z</published>
<link rel='alternate' type='text/html' href='https://git.zx2c4.com/wireguard-linux/commit/?id=28e6b875fdbb17ef57cc4343d8825e0d5770f427'/>
<id>urn:sha1:28e6b875fdbb17ef57cc4343d8825e0d5770f427</id>
<content type='text'>
There is no code still using pmon callvectors.

Signed-off-by: Jiaxun Yang &lt;jiaxun.yang@flygoat.com&gt;
Signed-off-by: Paul Burton &lt;paulburton@kernel.org&gt;
Cc: linux-mips@vger.kernel.org
Cc: chenhe@lemote.com
</content>
</entry>
<entry>
<title>MIPS: bmips: mark exception vectors as char arrays</title>
<updated>2019-10-24T04:07:28Z</updated>
<author>
<name>Jonas Gorski</name>
<email>jonas.gorski@gmail.com</email>
</author>
<published>2019-10-22T19:11:00Z</published>
<link rel='alternate' type='text/html' href='https://git.zx2c4.com/wireguard-linux/commit/?id=e4f5cb1a9b27c0f94ef4f5a0178a3fde2d3d0e9e'/>
<id>urn:sha1:e4f5cb1a9b27c0f94ef4f5a0178a3fde2d3d0e9e</id>
<content type='text'>
The vectors span more than one byte, so mark them as arrays.

Fixes the following build error when building when using GCC 8.3:

In file included from ./include/linux/string.h:19,
                 from ./include/linux/bitmap.h:9,
                 from ./include/linux/cpumask.h:12,
                 from ./arch/mips/include/asm/processor.h:15,
                 from ./arch/mips/include/asm/thread_info.h:16,
                 from ./include/linux/thread_info.h:38,
                 from ./include/asm-generic/preempt.h:5,
                 from ./arch/mips/include/generated/asm/preempt.h:1,
                 from ./include/linux/preempt.h:81,
                 from ./include/linux/spinlock.h:51,
                 from ./include/linux/mmzone.h:8,
                 from ./include/linux/bootmem.h:8,
                 from arch/mips/bcm63xx/prom.c:10:
arch/mips/bcm63xx/prom.c: In function 'prom_init':
./arch/mips/include/asm/string.h:162:11: error: '__builtin_memcpy' forming offset [2, 32] is out of the bounds [0, 1] of object 'bmips_smp_movevec' with type 'char' [-Werror=array-bounds]
   __ret = __builtin_memcpy((dst), (src), __len); \
           ^~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~
arch/mips/bcm63xx/prom.c:97:3: note: in expansion of macro 'memcpy'
   memcpy((void *)0xa0000200, &amp;bmips_smp_movevec, 0x20);
   ^~~~~~
In file included from arch/mips/bcm63xx/prom.c:14:
./arch/mips/include/asm/bmips.h:80:13: note: 'bmips_smp_movevec' declared here
 extern char bmips_smp_movevec;

Fixes: 18a1eef92dcd ("MIPS: BMIPS: Introduce bmips.h")
Signed-off-by: Jonas Gorski &lt;jonas.gorski@gmail.com&gt;
Reviewed-by: Florian Fainelli &lt;f.fainelli@gmail.com&gt;
Signed-off-by: Paul Burton &lt;paulburton@kernel.org&gt;
Cc: linux-mips@vger.kernel.org
Cc: Ralf Baechle &lt;ralf@linux-mips.org&gt;
Cc: James Hogan &lt;jhogan@kernel.org&gt;
</content>
</entry>
<entry>
<title>MIPS: kexec: Make a framework for both jumping and halting on nonboot CPUs</title>
<updated>2018-09-22T17:31:50Z</updated>
<author>
<name>Dengcheng Zhu</name>
<email>dzhu@wavecomp.com</email>
</author>
<published>2018-09-11T21:49:21Z</published>
<link rel='alternate' type='text/html' href='https://git.zx2c4.com/wireguard-linux/commit/?id=62cac480f33f8f9413d609cb1601b0ee521a86b8'/>
<id>urn:sha1:62cac480f33f8f9413d609cb1601b0ee521a86b8</id>
<content type='text'>
The existing implementation lets machine_kexec() CPU jump to reboot code
buffer, whereas other CPUs to relocated_kexec_smp_wait. The natural way to
bring up an SMP new kernel would be to let CPU0 do it while others being
halted. For those failing to do so, fall back to the jumping method.

Signed-off-by: Dengcheng Zhu &lt;dzhu@wavecomp.com&gt;
[paul.burton@mips.com: Guard kexec_nonboot_cpu_jump with CONFIG_SMP]
Signed-off-by: Paul Burton &lt;paul.burton@mips.com&gt;
Patchwork: https://patchwork.linux-mips.org/patch/20570/
Cc: pburton@wavecomp.com
Cc: ralf@linux-mips.org
Cc: linux-mips@linux-mips.org
Cc: rachel.mozes@intel.com
</content>
</entry>
<entry>
<title>MIPS: BMIPS: Do not mask IPIs during suspend</title>
<updated>2018-03-05T23:35:04Z</updated>
<author>
<name>Justin Chen</name>
<email>justinpopo6@gmail.com</email>
</author>
<published>2017-09-28T00:15:15Z</published>
<link rel='alternate' type='text/html' href='https://git.zx2c4.com/wireguard-linux/commit/?id=06a3f0c9f2725f5d7c63c4203839373c9bd00c28'/>
<id>urn:sha1:06a3f0c9f2725f5d7c63c4203839373c9bd00c28</id>
<content type='text'>
Commit a3e6c1eff548 ("MIPS: IRQ: Fix disable_irq on CPU IRQs") fixes an
issue where disable_irq did not actually disable the irq. The bug caused
our IPIs to not be disabled, which actually is the correct behavior.

With the addition of commit a3e6c1eff548 ("MIPS: IRQ: Fix disable_irq on
CPU IRQs"), the IPIs were getting disabled going into suspend, thus
schedule_ipi() was not being called. This caused deadlocks where
schedulable task were not being scheduled and other cpus were waiting
for them to do something.

Add the IRQF_NO_SUSPEND flag so an irq_disable will not be called on the
IPIs during suspend.

Signed-off-by: Justin Chen &lt;justinpopo6@gmail.com&gt;
Fixes: a3e6c1eff548 ("MIPS: IRQ: Fix disabled_irq on CPU IRQs")
Cc: Florian Fainelli &lt;f.fainelli@gmail.com&gt;
Cc: linux-mips@linux-mips.org
Cc: stable@vger.kernel.org
Patchwork: https://patchwork.linux-mips.org/patch/17385/
[jhogan@kernel.org: checkpatch: wrap long lines and fix commit refs]
Signed-off-by: James Hogan &lt;jhogan@kernel.org&gt;
</content>
</entry>
<entry>
<title>MIPS: BMIPS: Fix section mismatch warning</title>
<updated>2018-02-13T11:53:28Z</updated>
<author>
<name>Jaedon Shin</name>
<email>jaedon.shin@gmail.com</email>
</author>
<published>2018-02-06T03:13:21Z</published>
<link rel='alternate' type='text/html' href='https://git.zx2c4.com/wireguard-linux/commit/?id=627f4a2bdf113ab88abc65cb505c89cbf615eae0'/>
<id>urn:sha1:627f4a2bdf113ab88abc65cb505c89cbf615eae0</id>
<content type='text'>
Remove the __init annotation from bmips_cpu_setup() to avoid the
following warning.

WARNING: vmlinux.o(.text+0x35c950): Section mismatch in reference from the function brcmstb_pm_s3() to the function .init.text:bmips_cpu_setup()
The function brcmstb_pm_s3() references
the function __init bmips_cpu_setup().
This is often because brcmstb_pm_s3 lacks a __init
annotation or the annotation of bmips_cpu_setup is wrong.

Signed-off-by: Jaedon Shin &lt;jaedon.shin@gmail.com&gt;
Cc: Ralf Baechle &lt;ralf@linux-mips.org&gt;
Cc: Florian Fainelli &lt;f.fainelli@gmail.com&gt;
Cc: Kevin Cernekee &lt;cernekee@gmail.com&gt;
Cc: linux-mips@linux-mips.org
Reviewed-by: James Hogan &lt;jhogan@kernel.org&gt;
Reviewed-by: Florian Fainelli &lt;f.fainelli@gmail.com&gt;
Patchwork: https://patchwork.linux-mips.org/patch/18589/
Signed-off-by: James Hogan &lt;jhogan@kernel.org&gt;
</content>
</entry>
<entry>
<title>MIPS: BMIPS: Fix missing cbr address</title>
<updated>2017-11-07T21:28:19Z</updated>
<author>
<name>Jaedon Shin</name>
<email>jaedon.shin@gmail.com</email>
</author>
<published>2017-06-16T11:03:01Z</published>
<link rel='alternate' type='text/html' href='https://git.zx2c4.com/wireguard-linux/commit/?id=ea4b3afe1eac8f88bb453798a084fba47a1f155a'/>
<id>urn:sha1:ea4b3afe1eac8f88bb453798a084fba47a1f155a</id>
<content type='text'>
Fix NULL pointer access in BMIPS3300 RAC flush.

Fixes: 738a3f79027b ("MIPS: BMIPS: Add early CPU initialization code")
Signed-off-by: Jaedon Shin &lt;jaedon.shin@gmail.com&gt;
Reviewed-by: Florian Fainelli &lt;f.fainelli@gmail.com&gt;
Cc: Kevin Cernekee &lt;cernekee@gmail.com&gt;
Cc: linux-mips@linux-mips.org
Cc: &lt;stable@vger.kernel.org&gt; # 4.7+
Patchwork: https://patchwork.linux-mips.org/patch/16423/
Signed-off-by: James Hogan &lt;jhogan@kernel.org&gt;
</content>
</entry>
<entry>
<title>MIPS: SMP: Allow boot_secondary SMP op to return errors</title>
<updated>2017-08-29T22:57:27Z</updated>
<author>
<name>Paul Burton</name>
<email>paul.burton@imgtec.com</email>
</author>
<published>2017-08-13T02:49:40Z</published>
<link rel='alternate' type='text/html' href='https://git.zx2c4.com/wireguard-linux/commit/?id=d595d423d06071bd7a4892c3c2f16bfe1d5b3a85'/>
<id>urn:sha1:d595d423d06071bd7a4892c3c2f16bfe1d5b3a85</id>
<content type='text'>
Allow the boot_secondary SMP op to return an error to __cpu_up(), which
will in turn return it to its caller.

This will allow SMP implementations to return errors quickly in cases
they they know have failed, rather than relying upon __cpu_up()
eventually timing out waiting for the cpu_running completion.

Signed-off-by: Paul Burton &lt;paul.burton@imgtec.com&gt;
Cc: linux-mips@linux-mips.org
Patchwork: https://patchwork.linux-mips.org/patch/17014/
Signed-off-by: Ralf Baechle &lt;ralf@linux-mips.org&gt;
</content>
</entry>
<entry>
<title>MIPS: Abstract CPU core &amp; VP(E) ID access through accessor functions</title>
<updated>2017-08-29T22:57:26Z</updated>
<author>
<name>Paul Burton</name>
<email>paul.burton@imgtec.com</email>
</author>
<published>2017-08-13T02:49:35Z</published>
<link rel='alternate' type='text/html' href='https://git.zx2c4.com/wireguard-linux/commit/?id=f875a832d2028523f9b53c261b67e05a359bab8b'/>
<id>urn:sha1:f875a832d2028523f9b53c261b67e05a359bab8b</id>
<content type='text'>
We currently have fields in struct cpuinfo_mips for the core &amp; VP(E) ID
of a particular CPU, and various pieces of code directly access those
fields. This patch abstracts such access by introducing accessor
functions cpu_core(), cpu_set_core(), cpu_vpe_id() &amp; cpu_set_vpe_id()
and having code that needs to access these values call those functions
rather than directly accessing the struct cpuinfo_mips fields. This
prepares us for changes to the way in which those values are stored in
later patches.

The cpu_vpe_id() function is introduced even though we already had a
cpu_vpe_id() macro for a couple of reasons:

  1) It's more consistent with the core, and future cluster, accessors.

  2) It ensures a sensible return type without explicit casts.

  3) It's generally preferable to use functions rather than macros.

Signed-off-by: Paul Burton &lt;paul.burton@imgtec.com&gt;
Cc: linux-mips@linux-mips.org
Patchwork: https://patchwork.linux-mips.org/patch/17009/
Signed-off-by: Ralf Baechle &lt;ralf@linux-mips.org&gt;
</content>
</entry>
<entry>
<title>MIPS: SMP: Constify smp ops</title>
<updated>2017-08-29T13:21:50Z</updated>
<author>
<name>Matt Redfearn</name>
<email>matt.redfearn@imgtec.com</email>
</author>
<published>2017-07-19T08:21:03Z</published>
<link rel='alternate' type='text/html' href='https://git.zx2c4.com/wireguard-linux/commit/?id=ff2c8252bfbf069dda1e53353a63b560f1369f59'/>
<id>urn:sha1:ff2c8252bfbf069dda1e53353a63b560f1369f59</id>
<content type='text'>
smp_ops providers do not modify their ops structures, so they should be
made const for robustness. Since currently the MIPS kernel is not mapped
with memory protection, this does not in itself provide any security
benefit, but it still makes sense to make this change.

There are also slight code size efficincies from the structure being
made read-only, saving 128 bytes of kernel text on a
pistachio_defconfig.
Before:
   text	   data	    bss	    dec	    hex	filename
7187239	1772752	 470224	9430215	 8fe4c7	vmlinux
After:
   text	   data	    bss	    dec	    hex	filename
7187111	1772752	 470224	9430087	 8fe447	vmlinux

Signed-off-by: Matt Redfearn &lt;matt.redfearn@imgtec.com&gt;
Cc: Sebastian Andrzej Siewior &lt;bigeasy@linutronix.de&gt;
Cc: Arnd Bergmann &lt;arnd@arndb.de&gt;
Cc: Marcin Nowakowski &lt;marcin.nowakowski@imgtec.com&gt;
Cc: Bart Van Assche &lt;bart.vanassche@sandisk.com&gt;
Cc: Masahiro Yamada &lt;yamada.masahiro@socionext.com&gt;
Cc: Huacai Chen &lt;chenhc@lemote.com&gt;
Cc: Paul Gortmaker &lt;paul.gortmaker@windriver.com&gt;
Cc: Kevin Cernekee &lt;cernekee@gmail.com&gt;
Cc: Thomas Gleixner &lt;tglx@linutronix.de&gt;
Cc: Doug Ledford &lt;dledford@redhat.com&gt;
Cc: James Hogan &lt;james.hogan@imgtec.com&gt;
Cc: Joe Perches &lt;joe@perches.com&gt;
Cc: Florian Fainelli &lt;f.fainelli@gmail.com&gt;
Cc: Ingo Molnar &lt;mingo@kernel.org&gt;
Cc: Paul Burton &lt;paul.burton@imgtec.com&gt;
Cc: Andrew Morton &lt;akpm@linux-foundation.org&gt;
Cc: Steven J. Hill &lt;steven.hill@cavium.com&gt;
Cc: linux-mips@linux-mips.org
Cc: linux-kernel@vger.kernel.org
Patchwork: https://patchwork.linux-mips.org/patch/16784/
Signed-off-by: Ralf Baechle &lt;ralf@linux-mips.org&gt;
</content>
</entry>
<entry>
<title>MIPS: Add missing include files</title>
<updated>2017-03-08T09:38:06Z</updated>
<author>
<name>Arnd Bergmann</name>
<email>arnd@arndb.de</email>
</author>
<published>2017-03-08T07:29:31Z</published>
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<id>urn:sha1:fc69910f329d61821897871e0e957eda39beb3d8</id>
<content type='text'>
After the split of linux/sched.h, several platforms in arch/mips stopped building.

Add the respective additional #include statements to fix the problem I first
tried adding these into asm/processor.h, but ran into circular header
dependencies with that which I could not figure out.

The commit I listed as causing the problem is the branch merge, as there is
likely a combination of multiple patches in that branch.

Signed-off-by: Arnd Bergmann &lt;arnd@arndb.de&gt;
Cc: Linus Torvalds &lt;torvalds@linux-foundation.org&gt;
Cc: Peter Zijlstra &lt;peterz@infradead.org&gt;
Cc: Thomas Gleixner &lt;tglx@linutronix.de&gt;
Cc: linux-mips@linux-mips.org
Cc: ralf@linux-mips.org
Fixes: 1827adb11ad2 ("Merge branch 'WIP.sched-core-for-linus' of git://git.kernel.org/pub/scm/linux/kernel/git/tip/tip")
Link: http://lkml.kernel.org/r/20170308072931.3836696-1-arnd@arndb.de
Signed-off-by: Ingo Molnar &lt;mingo@kernel.org&gt;
</content>
</entry>
</feed>
