wireguard-linux/arch/ppc/kernel/entry.S, branch stable

powerpc: Remove arch/ppc and include/asm-ppc

2008-06-10T11:40:22Z

All the maintained platforms are now in arch/powerpc, so the old arch/ppc stuff can now go away. Acked-by: Adrian Bunk Acked-by: Arnd Bergmann Acked-by: Becky Bruce Acked-by: Benjamin Herrenschmidt Acked-by: Geert Uytterhoeven Acked-by: Grant Likely Acked-by: Jochen Friedrich Acked-by: John Linn Acked-by: Jon Loeliger Acked-by: Josh Boyer Acked-by: Kumar Gala Acked-by: Olof Johansson Acked-by: Peter Korsgaard Acked-by: Scott Wood Acked-by: Sean MacLennan Acked-by: Segher Boessenkool Acked-by: Stefan Roese Acked-by: Stephen Neuendorffer Acked-by: Wolfgang Denk Signed-off-by: Paul Mackerras

[POWERPC] Define and use TLF_RESTORE_SIGMASK

2008-05-14T12:31:33Z

Replace TIF_RESTORE_SIGMASK with TLF_RESTORE_SIGMASK and define our own set_restore_sigmask() function. This saves the costly SMP-safe set_bit operation, which we do not need for the sigmask flag since TIF_SIGPENDING always has to be set too. Signed-off-by: Roland McGrath Signed-off-by: Paul Mackerras

[PPC] Remove 85xx from arch/ppc

2008-01-28T14:33:10Z

85xx exists in arch/powerpc as well as cuImage support to boot from a u-boot that doesn't support device trees. Signed-off-by: Kumar Gala

[POWERPC] Avoid unpaired stwcx. on some processors

2007-11-13T05:22:43Z

The context switch code in the kernel issues a dummy stwcx. to clear the reservation, as recommended by the architecture. However, some processors can have issues if this stwcx to address A occurs while the reservation is already held to a different address B. To avoid this problem, the dummy stwcx. needs to be paired with a dummy lwarx to the same address. This adds the dummy lwarx, and creates a cpu feature bit to indicate which cpus are affected. Tested on mpc8641_hpcn_defconfig in arch/powerpc; build tested in arch/ppc. Signed-off-by: Becky Bruce Signed-off-by: Paul Mackerras

[POWERPC] 4xx: Deal with 44x virtually tagged icache

2007-11-01T12:15:30Z

The 44x family has an interesting "feature" which is a virtually tagged instruction cache (yuck !). So far, we haven't dealt with it properly, which means we've been mostly lucky or people didn't report the problems, unless people have been running custom patches in their distro... This is an attempt at fixing it properly. I chose to do it by setting a global flag whenever we change a PTE that was previously marked executable, and flush the entire instruction cache upon return to user space when that happens. This is a bit heavy handed, but it's hard to do more fine grained flushes as the icbi instruction, on those processor, for some very strange reasons (since the cache is virtually mapped) still requires a valid TLB entry for reading in the target address space, which isn't something I want to deal with. Signed-off-by: Benjamin Herrenschmidt Signed-off-by: Josh Boyer

[PPC] Fix COMMON symbol warnings

2007-05-23T05:17:44Z

We get the following warnings in various ARCH=ppc builds: WARNING: "ee_restarts" [arch/ppc/kernel/built-in] is COMMON symbol WARNING: "fee_restarts" [arch/ppc/kernel/built-in] is COMMON symbol WARNING: "htab_hash_searches" [arch/ppc/mm/built-in] is COMMON symbol WARNING: "next_slot" [arch/ppc/mm/built-in] is COMMON symbol WARNING: "mmu_hash_lock" [arch/ppc/mm/built-in] is COMMON symbol WARNING: "primary_pteg_full" [arch/ppc/mm/built-in] is COMMON symbol WARNING: "global_dbcr0" [arch/ppc/kernel/built-in] is COMMON symbol Switch to local symbols for ee_restarts, fee_restarts, and global_dbcr0 and global symbols for mmu_hash_lock, next_slot, primary_pteg_full, and htab_hash_searches. (except mmu_hash_lock which is global) and space directive instead. Signed-off-by: Kumar Gala

[POWERPC] Remove last_syscall

2007-03-22T11:52:58Z

Remove last_syscall from 32bit powerpc, its been gone in 64bit for years. Signed-off-by: Anton Blanchard Signed-off-by: Paul Mackerras

Remove obsolete #include

2006-06-30T17:25:36Z

Signed-off-by: Jörn Engel Signed-off-by: Adrian Bunk

[PATCH] ppc: Fix powersave code on arch/ppc

2006-04-21T12:33:22Z

Fix asm_offsets.c and entry.S to work with the new power save code. Changes in arch/powerpc needed to exist in arch/ppc as well since the idle code is shared by both ppc and powerpc.. Signed-off-by: Becky Bruce Signed-off-by: Paul Mackerras

ppc: Remove CHRP, POWER3 and POWER4 support from arch/ppc

2006-03-27T23:22:10Z

32-bit CHRP machines are now supported only in arch/powerpc, as are all 64-bit PowerPC processors. This means that we don't use Open Firmware on any platform in arch/ppc any more. This makes PReP support a single-platform option like every other platform support option in arch/ppc now, thus CONFIG_PPC_MULTIPLATFORM is gone from arch/ppc. CONFIG_PPC_PREP is the option that selects PReP support and is generally what has replaced CONFIG_PPC_MULTIPLATFORM within arch/ppc. _machine is all but dead now, being #defined to 0. Updated Makefiles, comments and Kconfig options generally to reflect these changes. Signed-off-by: Paul Mackerras