wireguard-linux/arch/x86/include/asm/cpuid, branch stable

x86/cpuid: Update bitfields to x86-cpuid-db v3.1

2026-06-04T02:05:58Z

Update leaf_types.h to version 3.1, as generated by x86-cpuid-db. Summary of the v3.1 changes: * Fix a few typos that were found during the kernel CPUID data model review. Also include fixes found using an LLM agent review, from Ahmed. * Rename thrd_director_nclasses to hw_feedback_nclasses as it's the name used in Intel SDM. See https://gitlab.com/x86-cpuid.org/x86-cpuid-db/-/blob/v3.1/CHANGELOG.rst for more info. Signed-off-by: Maciej Wieczor-Retman Signed-off-by: Borislav Petkov (AMD) Link: https://patch.msgid.link/9653d8690ec7093c8190b12d1fa8c689c4da50fe.1780506200.git.m.wieczorretman@pm.me

x86/cpuid: Introduce a centralized CPUID parser

2026-05-11T14:05:50Z

Introduce a CPUID parser for populating the system's CPUID tables. Since accessing a leaf within the CPUID table requires compile time tokenization, split the parser into two stages: (a) Compile-time macros for tokenizing the leaf/subleaf offsets within the CPUID table. (b) Generic runtime code to fill the CPUID data, using a parsing table which collects these compile-time offsets. For actual CPUID output parsing, support both generic and leaf-specific read functions. To ensure CPUID data early availability, invoke the parser during early boot, early Xen boot, and at early secondary CPUs bring up. Provide call site APIs to refresh a single leaf, or a leaf range, within the CPUID tables. This is for sites issuing MSR writes that partially change the CPU's CPUID layout. Doing full CPUID table rescans in such cases will be destructive since the CPUID tables will host all of the kernel's X86_FEATURE flags at a later stage. Suggested-by: Thomas Gleixner Signed-off-by: Ahmed S. Darwish Signed-off-by: Borislav Petkov (AMD) Link: https://lore.kernel.org/all/20260327021645.555257-1-darwi@linutronix.de

x86/cpu: Introduce a centralized CPUID data model

2026-05-11T11:09:30Z

** Context The x86-cpuid-db project generates a C header file with full C99 bitfield listings for all known CPUID leaf/subleaf query outputs. That header is now merged by parent commits at , and is of the form: struct leaf_0x0_0 { /* CPUID(0x0).0 C99 bitfields */ }; ... struct leaf_0x4_n { /* CPUID(0x4).n C99 bitfields */ }; ... struct leaf_0xd_0 { /* CPUID(0xd).0 C99 bitfields */ }; struct leaf_0xd_1 { /* CPUID(0xd).1 C99 bitfields */ }; struct leaf_0xd_n { /* CPUID(0xd).n C99 bitfields */ }; ... ** Goal Introduce a structured, size-efficient, per-CPU, CPUID data repository. Use the x86-cpuid-db auto-generated data types, and custom CPUID leaf parsers, to build that repository. Given a leaf, subleaf, and index, provide direct memory access to the parsed and cached per-CPU CPUID output. ** Long-term goal Remove the need for drivers and other areas in the kernel to invoke direct CPUID queries. Only one place in the kernel should be allowed to use the CPUID instruction: the CPUID parser code. ** Implementation Introduce CPUID_LEAF()/CPUID_LEAF_N() to build a compact CPUID storage layout in the form: struct leaf_0x0_0 leaf_0x0_0[1]; struct leaf_parse_info leaf_0x0_0_info; struct leaf_0x1_0 leaf_0x1_0[1]; struct leaf_parse_info leaf_0x0_0_info; struct leaf_0x4_n leaf_0x4_n[8]; struct leaf_parse_info leaf_0x4_n_info; ... where each CPUID query stores its output at the designated leaf/subleaf array and has an associated "CPUID query info" structure. Embed the CPUID tables inside "struct cpuinfo_x86" to ensure early-boot and per-CPU access through the CPUs capability structures. Use an array of CPUID output storage entries for each leaf/subleaf combination to accommodate leaves which produce the same output format for a large subleaf range. This is typical for CPUID leaves enumerating hierarchical objects; e.g. CPUID(0x4) cache topology enumeration, CPUID(0xd) XSAVE enumeration, and CPUID(0x12) SGX Enclave Page Cache enumeration. ** New CPUID APIs Assuming a CPU capability structure 'c', provide macros to access the parsed and cached CPUID leaf/subleaf output. These macros resolve to a compile-time tokenization that ensures type-safety: const struct leaf_0x7_0 *l7_0; l7_0 = cpuid_subleaf(c, 0x7, 0); | | └────────┐ | └─────────┐ | * * * &c.cpuid.leaf_0x7_0[0] For CPUID leaves with multiple subleaves having the same output format, provide the APIs: const struct leaf_0x4_n *l4_0, *l4_1; l4_0 = cpuid_subleaf_n(c, 0x4, 0); | | └──────────┐ | └─────────┐ | * * v &c.cpuid.leaf_0x4_n[0] l4_1 = cpuid_subleaf_n(c, 0x4, 1); | | └──────────┐ | └─────────┐ | * * v &c.cpuid.leaf_0x4_n[1] where the indices 0, 1, n above can be passed dynamically; e.g., in an enumeration for loop. Add a clear rationale on why call sites should use the these new APIs instead of directly invoking CPUID. ** Next steps For now, define cached parse entries for CPUID(0x0) and CPUID(0x1). Generic parser logic to fill the CPUID tables, along with more CPUID leaves support, will be added next. Suggested-by: Thomas Gleixner # CPUID data model Suggested-by: Andrew Cooper # x86-cpuid-db schema Suggested-by: Borislav Petkov # Early CPUID centralization drafts Suggested-by: Ingo Molnar # CPUID headers restructuring Suggested-by: Sean Christopherson # cpuid_subleaf_n() APIs Signed-off-by: Ahmed S. Darwish Signed-off-by: Borislav Petkov (AMD) Link: https://lore.kernel.org/all/20260327021645.555257-1-darwi@linutronix.de Link: https://lore.kernel.org/all/874ixernra.ffs@tglx Link: https://gitlab.com/x86-cpuid.org/x86-cpuid-db Link: https://lore.kernel.org/all/aBnSgu_JyEi8fvog@gmail.com Link: https://lore.kernel.org/all/aJ9TbaNMgaplKSbH@google.com

x86/cpuid: Introduce

2026-05-08T21:10:17Z

To centralize all CPUID access across the x86 subsystem, introduce . It is generated by the x86-cpuid-db project¹ and provides C99 bitfield listings for all publicly known CPUID leaves. ¹ https://gitlab.com/x86-cpuid.org/x86-cpuid-db/-/blob/v3.0/CHANGELOG.rst Suggested-by: Thomas Gleixner Signed-off-by: Ahmed S. Darwish Signed-off-by: Borislav Petkov (AMD) Link: https://lore.kernel.org/20260327021645.555257-1-darwi@linutronix.de

x86/cpuid: Rename cpuid_leaf()/cpuid_subleaf() APIs

2026-05-08T21:10:14Z

A new CPUID model will be added where its APIs will be designated as the official CPUID API. Free the cpuid_leaf() and cpuid_subleaf() function names for that API. Rename them accordingly to cpuid_read() and cpuid_read_subleaf(). For kernel/cpuid.c, rename its local file operations read function from cpuid_read() to cpuid_read_f() so that it does not conflict with the new API. No functional change. Signed-off-by: Ahmed S. Darwish Signed-off-by: Borislav Petkov (AMD) Link: https://lore.kernel.org/20260327021645.555257-1-darwi@linutronix.de

x86/cpuid: Rename hypervisor_cpuid_base()/for_each_possible_hypervisor_cpuid_base() to cpuid_base_hypervisor()/for_each_possible_cpuid_base_hypervisor()

2025-05-16T08:54:47Z

In order to let all the APIs under have a shared "cpuid_" namespace, rename hypervisor_cpuid_base() to cpuid_base_hypervisor(). To align with the new style, also rename: for_each_possible_hypervisor_cpuid_base(function) to: for_each_possible_cpuid_base_hypervisor(function) Adjust call-sites accordingly. Suggested-by: Ingo Molnar Signed-off-by: Ahmed S. Darwish Signed-off-by: Ingo Molnar Cc: Andrew Cooper Cc: Dave Hansen Cc: David Woodhouse Cc: H. Peter Anvin Cc: John Ogness Cc: Paolo Bonzini Cc: Sean Christopherson Cc: Vitaly Kuznetsov Cc: x86-cpuid@lists.linux.dev Link: https://lore.kernel.org/r/aCZOi0Oohc7DpgTo@lx-t490

x86/cpuid: Rename cpuid_get_leaf_0x2_regs() to cpuid_leaf_0x2()

2025-05-16T08:49:48Z

Rename the CPUID(0x2) register accessor function: cpuid_get_leaf_0x2_regs(regs) to: cpuid_leaf_0x2(regs) for consistency with other accessors that return full CPUID registers outputs like: cpuid_leaf(regs) cpuid_subleaf(regs) In the same vein, rename the CPUID(0x2) iteration macro: for_each_leaf_0x2_entry() to: for_each_cpuid_0x2_desc() to include "cpuid" in the macro name, and since what is iterated upon is CPUID(0x2) cache and TLB "descriptos", not "entries". Prefix an underscore to that iterator macro parameters, so that the newly renamed 'desc' parameter do not get mixed with "union leaf_0x2_regs :: desc[]" in the macro's implementation. Adjust all the affected call-sites accordingly. While at it, use "CPUID(0x2)" instead of "CPUID leaf 0x2" as this is the recommended style. No change in functionality intended. Signed-off-by: Ahmed S. Darwish Signed-off-by: Ingo Molnar Cc: H. Peter Anvin Cc: Andrew Cooper Cc: John Ogness Cc: x86-cpuid@lists.linux.dev Link: https://lore.kernel.org/r/20250508150240.172915-6-darwi@linutronix.de

x86/cpuid: Rename have_cpuid_p() to cpuid_feature()

2025-05-15T16:23:55Z

In order to let all the APIs under have a shared "cpuid_" namespace, rename have_cpuid_p() to cpuid_feature(). Adjust all call-sites accordingly. Suggested-by: Ingo Molnar Signed-off-by: Ahmed S. Darwish Signed-off-by: Ingo Molnar Cc: H. Peter Anvin Cc: Andrew Cooper Cc: John Ogness Cc: x86-cpuid@lists.linux.dev Link: https://lore.kernel.org/r/20250508150240.172915-4-darwi@linutronix.de

x86/cpuid: Move CPUID(0x2) APIs into

2025-05-15T16:23:54Z

Move all of the CPUID(0x2) APIs at into , in order centralize all CPUID APIs into the latter. While at it, separate the different CPUID leaf parsing APIs using header comments like "CPUID(0xN) parsing: ". Suggested-by: Ingo Molnar Signed-off-by: Ahmed S. Darwish Signed-off-by: Ingo Molnar Cc: H. Peter Anvin Cc: Andrew Cooper Cc: John Ogness Cc: x86-cpuid@lists.linux.dev Link: https://lore.kernel.org/r/20250508150240.172915-2-darwi@linutronix.de

x86/cpuid: Align macro linebreaks vertically

2025-04-14T10:25:50Z

Align the backspaces vertically again, after recent cleanups. No functional changes. Signed-off-by: Borislav Petkov (AMD) Signed-off-by: Ingo Molnar Cc: Ahmed S. Darwish Cc: H. Peter Anvin Cc: Linus Torvalds Link: https://lore.kernel.org/r/20250414094130.6768-1-bp@kernel.org