<feed xmlns='http://www.w3.org/2005/Atom'>
<title>wireguard-linux/drivers/acpi/riscv, branch stable</title>
<subtitle>WireGuard for the Linux kernel</subtitle>
<id>https://git.zx2c4.com/wireguard-linux/atom/drivers/acpi/riscv?h=stable</id>
<link rel='self' href='https://git.zx2c4.com/wireguard-linux/atom/drivers/acpi/riscv?h=stable'/>
<link rel='alternate' type='text/html' href='https://git.zx2c4.com/wireguard-linux/'/>
<updated>2026-07-09T13:30:18Z</updated>
<entry>
<title>ACPI: irq: Move RISC-V interrupt controllers autodep to ACPI IRQ code</title>
<updated>2026-07-09T13:30:18Z</updated>
<author>
<name>Lorenzo Pieralisi</name>
<email>lpieralisi@kernel.org</email>
</author>
<published>2026-07-09T08:40:15Z</published>
<link rel='alternate' type='text/html' href='https://git.zx2c4.com/wireguard-linux/commit/?id=704ce0039a629739753551a69132f783eb9912f5'/>
<id>urn:sha1:704ce0039a629739753551a69132f783eb9912f5</id>
<content type='text'>
RISC-V implements arch code to detect probe dependencies for devices and
the interrupt controller the devices GSIs are routed to.

The code itself is arch agnostic apart from an arch specific helper
function required to retrieve the acpi_handle of the interrupt controller
that manages the device GSI interrupt.

In order to enable IRQ probe dependencies detection on other architectures,
move RISC-V IRQ probe dependency detection code to generic ACPI IRQ code.

Allow interrupt controller drivers to register an arch specific function to
determine the acpi_handle for a specific GSI number to use the mechanism if
needed by the respective interrupt controller drivers.

Signed-off-by: Lorenzo Pieralisi &lt;lpieralisi@kernel.org&gt;
Reviewed-by: Sunil V L &lt;sunilvl@oss.qualcomm.com&gt;
Tested-by: Sunil V L &lt;sunilvl@oss.qualcomm.com&gt;
Link: https://patch.msgid.link/20260709-gic-v5-acpi-iwb-probe-deferral-v4-5-48dae790f871@kernel.org
Signed-off-by: Rafael J. Wysocki &lt;rafael.j.wysocki@intel.com&gt;
</content>
</entry>
<entry>
<title>ACPI: RISC-V: Fix riscv_acpi_add_prt_dep() loop handling</title>
<updated>2026-07-09T13:30:18Z</updated>
<author>
<name>Lorenzo Pieralisi</name>
<email>lpieralisi@kernel.org</email>
</author>
<published>2026-07-09T08:40:14Z</published>
<link rel='alternate' type='text/html' href='https://git.zx2c4.com/wireguard-linux/commit/?id=3a56321d0aceee2a0bd80d23366401c131ff8350'/>
<id>urn:sha1:3a56321d0aceee2a0bd80d23366401c131ff8350</id>
<content type='text'>
The loop in riscv_acpi_add_prt_dep() includes error conditions that are
handled in a dubious - if not outright wrong - way, by continuining the
loop (which skips and misses the entry pointer update to point to the next
entry).

Rewrite the loop as a for loop (that handles the continuation correctly)
and wrap the condition and update statements using helper functions to make
it cleaner.

Fixes: 1b173cc4bfcd ("ACPI: RISC-V: Implement function to add implicit dependencies")
Signed-off-by: Lorenzo Pieralisi &lt;lpieralisi@kernel.org&gt;
Tested-by: Sunil V L &lt;sunilvl@oss.qualcomm.com&gt;
Reviewed-by: Sunil V L &lt;sunilvl@oss.qualcomm.com&gt;
Link: https://patch.msgid.link/20260709-gic-v5-acpi-iwb-probe-deferral-v4-4-48dae790f871@kernel.org
Signed-off-by: Rafael J. Wysocki &lt;rafael.j.wysocki@intel.com&gt;
</content>
</entry>
<entry>
<title>ACPI: RISC-V: Check acpi_get_handle() status in riscv_acpi_add_prt_dep()</title>
<updated>2026-07-09T13:30:18Z</updated>
<author>
<name>Lorenzo Pieralisi</name>
<email>lpieralisi@kernel.org</email>
</author>
<published>2026-07-09T08:40:13Z</published>
<link rel='alternate' type='text/html' href='https://git.zx2c4.com/wireguard-linux/commit/?id=20435bda13f1219891ed0ce41207e320a916ff9c'/>
<id>urn:sha1:20435bda13f1219891ed0ce41207e320a916ff9c</id>
<content type='text'>
In riscv_acpi_add_prt_dep(), the acpi_get_handle() call can fail which
would leave link_handle uninitialized.

Fix it by checking the acpi_get_handle() return status and skip the entry
if it fails.

Fixes: 1b173cc4bfcd ("ACPI: RISC-V: Implement function to add implicit dependencies")
Signed-off-by: Lorenzo Pieralisi &lt;lpieralisi@kernel.org&gt;
Tested-by: Sunil V L &lt;sunilvl@oss.qualcomm.com&gt;
Reviewed-by: Sunil V L &lt;sunilvl@oss.qualcomm.com&gt;
Link: https://patch.msgid.link/20260709-gic-v5-acpi-iwb-probe-deferral-v4-3-48dae790f871@kernel.org
Signed-off-by: Rafael J. Wysocki &lt;rafael.j.wysocki@intel.com&gt;
</content>
</entry>
<entry>
<title>ACPI: RISC-V: Fix riscv_acpi_irq_get_dep() loop termination</title>
<updated>2026-07-09T13:30:18Z</updated>
<author>
<name>Lorenzo Pieralisi</name>
<email>lpieralisi@kernel.org</email>
</author>
<published>2026-07-09T08:40:12Z</published>
<link rel='alternate' type='text/html' href='https://git.zx2c4.com/wireguard-linux/commit/?id=64ae310bffa477cd11029c818bec489f4b8a845e'/>
<id>urn:sha1:64ae310bffa477cd11029c818bec489f4b8a845e</id>
<content type='text'>
In riscv_acpi_add_irq_dep() the main loop condition would currently stop
the loop if an interrupt descriptor contains an interrupt for which the
respective GSI handle is NULL, which is not correct because subsequent
interrupts in the interrupt descriptor might still have a GSI dependency
that must not be skipped.

Rework riscv_acpi_add_irq_dep() and the riscv_acpi_irq_get_dep() call chain
to fix it - by not forcing the loop to stop in order to guarantee
dependency detection for all the interrupt entries in the CRS descriptor.

Fixes: 1b173cc4bfcd ("ACPI: RISC-V: Implement function to add implicit dependencies")
Signed-off-by: Lorenzo Pieralisi &lt;lpieralisi@kernel.org&gt;
Tested-by: Sunil V L &lt;sunilvl@oss.qualcomm.com&gt;
Reviewed-by: Sunil V L &lt;sunilvl@oss.qualcomm.com&gt;
Link: https://patch.msgid.link/20260709-gic-v5-acpi-iwb-probe-deferral-v4-2-48dae790f871@kernel.org
Signed-off-by: Rafael J. Wysocki &lt;rafael.j.wysocki@intel.com&gt;
</content>
</entry>
<entry>
<title>Merge tag 'riscv-for-linus-7.2-rc2' of git://git.kernel.org/pub/scm/linux/kernel/git/riscv/linux</title>
<updated>2026-07-04T01:07:24Z</updated>
<author>
<name>Linus Torvalds</name>
<email>torvalds@linux-foundation.org</email>
</author>
<published>2026-07-04T01:07:24Z</published>
<link rel='alternate' type='text/html' href='https://git.zx2c4.com/wireguard-linux/commit/?id=590cae7152cab2dd954b8db20522769e1c62deec'/>
<id>urn:sha1:590cae7152cab2dd954b8db20522769e1c62deec</id>
<content type='text'>
Pull RISC-V fixes from Paul Walmsley:

 - Fix a crash when a kretprobe reads from the stack

 - Fix an issue with the build-time mcount sorter that broke ftrace

 - Fix the rv32 IRQ stack frame padding to match the ABI

 - Only defer IOMMU configuration during initialization. This avoids an
   issue where IOMMU configuration could be indefinitely deferred

 - Add the missing build salt to the vDSO

 - Now that RISC-V systems with higher numbers of cores are starting to
   become available, raise NR_CPUS for RISC-V to 256

 - Clean up some warnings from sparse caused by the RISC-V-optimized
   RAID6 code

 - Clean up our __cpu_up() code with a few minor fixes

* tag 'riscv-for-linus-7.2-rc2' of git://git.kernel.org/pub/scm/linux/kernel/git/riscv/linux:
  riscv: probes: save original sp in rethook trampoline
  riscv: Fix 32-bit call_on_irq_stack() frame pointer ABI
  scripts/sorttable: Handle RISC-V patchable ftrace entries
  riscv: smp: use secs_to_jiffies in __cpu_up
  ACPI: RIMT: Only defer the IOMMU configuration in init stage
  riscv: Add build salt to the vDSO
  raid6: fix raid6_recov_rvv symbol undeclared warning
  raid6: fix riscv symbol undeclared warnigns
  riscv: Raise default NR_CPUS for 64BIT to 256
</content>
</entry>
<entry>
<title>ACPI: RIMT: Only defer the IOMMU configuration in init stage</title>
<updated>2026-06-25T18:18:05Z</updated>
<author>
<name>Yicong Yang</name>
<email>yang.yicong@picoheart.com</email>
</author>
<published>2026-06-25T09:47:02Z</published>
<link rel='alternate' type='text/html' href='https://git.zx2c4.com/wireguard-linux/commit/?id=b8f62414fa05144924257db283c5c35f74d21121'/>
<id>urn:sha1:b8f62414fa05144924257db283c5c35f74d21121</id>
<content type='text'>
The IOMMU configuration will be deferred if the IOMMU driver
isn't probed by the time. Make this deferral only in the
initialization stage with driver_deferred_probe_check_state().
Otherwise the devices depends on IOMMU will be deferred forever
in case the IOMMU device probe failed or it doesn't appear in
the ACPI namespace.

Fixes: 8f7729552582 ("ACPI: RISC-V: Add support for RIMT")
Signed-off-by: Yicong Yang &lt;yang.yicong@picoheart.com&gt;
Link: https://patch.msgid.link/20260625094702.11558-1-yang.yicong@picoheart.com
[pjw@kernel.org: added Fixes line]
Signed-off-by: Paul Walmsley &lt;pjw@kernel.org&gt;</content>
</entry>
<entry>
<title>ACPI: processor_idle: Mark LPI enter functions as __cpuidle</title>
<updated>2026-06-24T13:15:53Z</updated>
<author>
<name>Li RongQing</name>
<email>lirongqing@baidu.com</email>
</author>
<published>2026-06-16T07:26:17Z</published>
<link rel='alternate' type='text/html' href='https://git.zx2c4.com/wireguard-linux/commit/?id=956ca5d72c76504824c8eb601879da9476973e15'/>
<id>urn:sha1:956ca5d72c76504824c8eb601879da9476973e15</id>
<content type='text'>
When function tracing or Kprobes is enabled, entering an ACPI Low
Power Idle (LPI) state triggers the following RCU splat:

  RCU not on for: acpi_idle_lpi_enter+0x4/0xd8
  WARNING: CPU: 8 PID: 0 at include/linux/trace_recursion.h:162 function_trace_call+0x1e8/0x228

The acpi_idle_lpi_enter() function is invoked within the cpuidle
path after RCU has already been disabled for the current local CPU.
Consequently, ftrace's function_trace_call() expects RCU to be
actively watching before recording trace data, emitting a warning
if it is not.

Fix this by annotating acpi_idle_lpi_enter(), the generic __weak
stub, and the RISC-V implementation of acpi_processor_ffh_lpi_enter()
with __cpuidle. This moves these functions into the '.cpuidle.text'
section, implicitly disabling ftrace instrumentation (notrace) along
this sensitive path and preventing trace-induced RCU warnings during
idle entry.

Fixes: a36a7fecfe60 ("ACPI / processor_idle: Add support for Low Power Idle(LPI) states")
Signed-off-by: Li RongQing &lt;lirongqing@baidu.com&gt;
Acked-by: lihuisong@huawei.com
Link: https://patch.msgid.link/20260616072617.2272-1-lirongqing@baidu.com
Signed-off-by: Rafael J. Wysocki &lt;rafael.j.wysocki@intel.com&gt;
</content>
</entry>
<entry>
<title>RISC-V: ACPI: Add acpi_get_cpu_uid() for unified ACPI CPU UID retrieval</title>
<updated>2026-04-06T14:55:15Z</updated>
<author>
<name>Chengwen Feng</name>
<email>fengchengwen@huawei.com</email>
</author>
<published>2026-04-01T08:16:35Z</published>
<link rel='alternate' type='text/html' href='https://git.zx2c4.com/wireguard-linux/commit/?id=0c8231994e43f445597166e8b342459079244d25'/>
<id>urn:sha1:0c8231994e43f445597166e8b342459079244d25</id>
<content type='text'>
As a step towards unifying the interface for retrieving ACPI CPU UID
across architectures, introduce a new function acpi_get_cpu_uid() for
riscv. While at it, add input validation to make the code more robust.

And also update acpi_numa.c and rhct.c to use the new interface instead
of the legacy get_acpi_id_for_cpu().

Signed-off-by: Chengwen Feng &lt;fengchengwen@huawei.com&gt;
Reviewed-by: Jonathan Cameron &lt;jonathan.cameron@huawei.com&gt;
Link: https://patch.msgid.link/20260401081640.26875-4-fengchengwen@huawei.com
Signed-off-by: Rafael J. Wysocki &lt;rafael.j.wysocki@intel.com&gt;
</content>
</entry>
<entry>
<title>ACPI: RIMT: Add dependency between iommu and devices</title>
<updated>2026-04-05T00:38:03Z</updated>
<author>
<name>Sunil V L</name>
<email>sunilvl@oss.qualcomm.com</email>
</author>
<published>2026-03-03T06:16:05Z</published>
<link rel='alternate' type='text/html' href='https://git.zx2c4.com/wireguard-linux/commit/?id=9156585280f161fc1c3552cf1860559edb2bb7e3'/>
<id>urn:sha1:9156585280f161fc1c3552cf1860559edb2bb7e3</id>
<content type='text'>
EPROBE_DEFER ensures IOMMU devices are probed before the devices that
depend on them. During shutdown, however, the IOMMU may be removed
first, leading to issues. To avoid this, a device link is added
which enforces the correct removal order.

Fixes: 8f7729552582 ("ACPI: RISC-V: Add support for RIMT")
Signed-off-by: Sunil V L &lt;sunilvl@oss.qualcomm.com&gt;
Link: https://patch.msgid.link/20260303061605.722949-1-sunilvl@oss.qualcomm.com
Signed-off-by: Paul Walmsley &lt;pjw@kernel.org&gt;</content>
</entry>
<entry>
<title>Convert remaining multi-line kmalloc_obj/flex GFP_KERNEL uses</title>
<updated>2026-02-22T16:26:33Z</updated>
<author>
<name>Kees Cook</name>
<email>kees@kernel.org</email>
</author>
<published>2026-02-22T07:46:04Z</published>
<link rel='alternate' type='text/html' href='https://git.zx2c4.com/wireguard-linux/commit/?id=189f164e573e18d9f8876dbd3ad8fcbe11f93037'/>
<id>urn:sha1:189f164e573e18d9f8876dbd3ad8fcbe11f93037</id>
<content type='text'>
Conversion performed via this Coccinelle script:

  // SPDX-License-Identifier: GPL-2.0-only
  // Options: --include-headers-for-types --all-includes --include-headers --keep-comments
  virtual patch

  @gfp depends on patch &amp;&amp; !(file in "tools") &amp;&amp; !(file in "samples")@
  identifier ALLOC = {kmalloc_obj,kmalloc_objs,kmalloc_flex,
 		    kzalloc_obj,kzalloc_objs,kzalloc_flex,
		    kvmalloc_obj,kvmalloc_objs,kvmalloc_flex,
		    kvzalloc_obj,kvzalloc_objs,kvzalloc_flex};
  @@

  	ALLOC(...
  -		, GFP_KERNEL
  	)

  $ make coccicheck MODE=patch COCCI=gfp.cocci

Build and boot tested x86_64 with Fedora 42's GCC and Clang:

Linux version 6.19.0+ (user@host) (gcc (GCC) 15.2.1 20260123 (Red Hat 15.2.1-7), GNU ld version 2.44-12.fc42) #1 SMP PREEMPT_DYNAMIC 1970-01-01
Linux version 6.19.0+ (user@host) (clang version 20.1.8 (Fedora 20.1.8-4.fc42), LLD 20.1.8) #1 SMP PREEMPT_DYNAMIC 1970-01-01

Signed-off-by: Kees Cook &lt;kees@kernel.org&gt;
Signed-off-by: Linus Torvalds &lt;torvalds@linux-foundation.org&gt;
</content>
</entry>
</feed>
