<feed xmlns='http://www.w3.org/2005/Atom'>
<title>wireguard-linux/drivers/bus, branch stable</title>
<subtitle>WireGuard for the Linux kernel</subtitle>
<id>https://git.zx2c4.com/wireguard-linux/atom/drivers/bus?h=stable</id>
<link rel='self' href='https://git.zx2c4.com/wireguard-linux/atom/drivers/bus?h=stable'/>
<link rel='alternate' type='text/html' href='https://git.zx2c4.com/wireguard-linux/'/>
<updated>2025-10-04T23:26:32Z</updated>
<entry>
<title>Merge tag 'char-misc-6.18-rc1' of git://git.kernel.org/pub/scm/linux/kernel/git/gregkh/char-misc</title>
<updated>2025-10-04T23:26:32Z</updated>
<author>
<name>Linus Torvalds</name>
<email>torvalds@linux-foundation.org</email>
</author>
<published>2025-10-04T23:26:32Z</published>
<link rel='alternate' type='text/html' href='https://git.zx2c4.com/wireguard-linux/commit/?id=6093a688a07da07808f0122f9aa2a3eed250d853'/>
<id>urn:sha1:6093a688a07da07808f0122f9aa2a3eed250d853</id>
<content type='text'>
Pull Char/Misc/IIO/Binder updates from Greg KH:
 "Here is the big set of char/misc/iio and other driver subsystem
  changes for 6.18-rc1.

  Loads of different stuff in here, it was a busy development cycle in
  lots of different subsystems, with over 27k new lines added to the
  tree.

  Included in here are:

   - IIO updates including new drivers, reworking of existing apis, and
     other goodness in the sensor subsystems

   - MEI driver updates and additions

   - NVMEM driver updates

   - slimbus removal for an unused driver and some other minor updates

   - coresight driver updates and additions

   - MHI driver updates

   - comedi driver updates and fixes

   - extcon driver updates

   - interconnect driver additions

   - eeprom driver updates and fixes

   - minor UIO driver updates

   - tiny W1 driver updates

  But the majority of new code is in the rust bindings and additions,
  which includes:

   - misc driver rust binding updates for read/write support, we can now
     write "normal" misc drivers in rust fully, and the sample driver
     shows how this can be done.

   - Initial framework for USB driver rust bindings, which are disabled
     for now in the build, due to limited support, but coming in through
     this tree due to dependencies on other rust binding changes that
     were in here. I'll be enabling these back on in the build in the
     usb.git tree after -rc1 is out so that developers can continue to
     work on these in linux-next over the next development cycle.

   - Android Binder driver implemented in Rust.

     This is the big one, and was driving a huge majority of the rust
     binding work over the past years. Right now there are two binder
     drivers in the kernel, selected only at build time as to which one
     to use as binder wants to be included in the system at boot time.

     The binder C maintainers all agreed on this, as eventually, they
     want the C code to be removed from the tree, but it will take a few
     releases to get there while both are maintained to ensure that the
     rust implementation is fully stable and compliant with the existing
     userspace apis.

  All of these have been in linux-next for a while"

* tag 'char-misc-6.18-rc1' of git://git.kernel.org/pub/scm/linux/kernel/git/gregkh/char-misc: (320 commits)
  rust: usb: keep usb::Device private for now
  rust: usb: don't retain device context for the interface parent
  USB: disable rust bindings from the build for now
  samples: rust: add a USB driver sample
  rust: usb: add basic USB abstractions
  coresight: Add label sysfs node support
  dt-bindings: arm: Add label in the coresight components
  coresight: tnoc: add new AMBA ID to support Trace Noc V2
  coresight: Fix incorrect handling for return value of devm_kzalloc
  coresight: tpda: fix the logic to setup the element size
  coresight: trbe: Return NULL pointer for allocation failures
  coresight: Refactor runtime PM
  coresight: Make clock sequence consistent
  coresight: Refactor driver data allocation
  coresight: Consolidate clock enabling
  coresight: Avoid enable programming clock duplicately
  coresight: Appropriately disable trace bus clocks
  coresight: Appropriately disable programming clocks
  coresight: etm4x: Support atclk
  coresight: catu: Support atclk
  ...
</content>
</entry>
<entry>
<title>bus: mhi: host: pci_generic: Set DMA mask for VFs</title>
<updated>2025-09-19T07:40:49Z</updated>
<author>
<name>Vivek Pernamitta</name>
<email>quic_vpernami@quicinc.com</email>
</author>
<published>2025-09-12T12:48:10Z</published>
<link rel='alternate' type='text/html' href='https://git.zx2c4.com/wireguard-linux/commit/?id=54c67740fff7360b6607d02b8499d09b944b3fda'/>
<id>urn:sha1:54c67740fff7360b6607d02b8499d09b944b3fda</id>
<content type='text'>
VFs in devices like QDU100 are capable of accessing host memory up to 40
bits, compared to 32 bits used by PFs and other non-SR-IOV capable MHI
devices.

To support this, configure `dma_mask` independently for PFs and VFs, by
introducing a new 'vf_dma_data_width' member in 'mhi_pci_dev_info' struct
and set it to 40 for QDU100.

Signed-off-by: Vivek Pernamitta &lt;quic_vpernami@quicinc.com&gt;
[mani: reworded subject and description]
Signed-off-by: Manivannan Sadhasivam &lt;manivannan.sadhasivam@oss.qualcomm.com&gt;
Link: https://patch.msgid.link/20250912-uevent_vdev_next-20250911-v4-6-fa2f6ccd301b@quicinc.com
</content>
</entry>
<entry>
<title>bus: mhi: core: Improve mhi_sync_power_up handling for SYS_ERR state</title>
<updated>2025-09-19T05:54:45Z</updated>
<author>
<name>Vivek Pernamitta</name>
<email>quic_vpernami@quicinc.com</email>
</author>
<published>2025-09-12T12:48:09Z</published>
<link rel='alternate' type='text/html' href='https://git.zx2c4.com/wireguard-linux/commit/?id=aa1a0e93ed21a06acb7ca9d4a4a9fce75ea53d0c'/>
<id>urn:sha1:aa1a0e93ed21a06acb7ca9d4a4a9fce75ea53d0c</id>
<content type='text'>
Allow mhi_sync_power_up to handle SYS_ERR during power-up, reboot,
or recovery. This is to avoid premature exit when MHI_PM_IN_ERROR_STATE is
observed during above mentioned system states.

To achieve this, treat SYS_ERR as a valid state and let its handler process
the error and queue the next transition to Mission Mode instead of aborting
early.

Signed-off-by: Vivek Pernamitta &lt;quic_vpernami@quicinc.com&gt;
[mani: reworded description]
Signed-off-by: Manivannan Sadhasivam &lt;manivannan.sadhasivam@oss.qualcomm.com&gt;
Link: https://patch.msgid.link/20250912-uevent_vdev_next-20250911-v4-5-fa2f6ccd301b@quicinc.com
</content>
</entry>
<entry>
<title>bus: mhi: host: pci_generic: Reset QDU100 while the MHI driver is removed</title>
<updated>2025-09-19T05:53:08Z</updated>
<author>
<name>Vivek Pernamitta</name>
<email>quic_vpernami@quicinc.com</email>
</author>
<published>2025-09-12T12:48:08Z</published>
<link rel='alternate' type='text/html' href='https://git.zx2c4.com/wireguard-linux/commit/?id=12543f4405887da9f3e401e708ca0ff796a7b866'/>
<id>urn:sha1:12543f4405887da9f3e401e708ca0ff796a7b866</id>
<content type='text'>
So, When the MHI driver is removed from the host side, it is essential to
ensure a clean and stable recovery of the device. This commit introduces
the following steps to achieve that:

1. Disable SR-IOV for any SR-IOV-enabled devices on the Physical Function.
2. Perform a SOC_RESET on the PF to fully reset the device.

Disabling SR-IOV ensures all Virtual Functions (VFs) are properly shutdown,
preventing issues during the reset process. The SOC_RESET guarantees that
the PF is restored to a known good state.

If soc_reset is not performed device at driver remove, device will be
stuck in mission mode state and subsequent driver insert/power_up will not
proceed further.

Signed-off-by: Vivek Pernamitta &lt;quic_vpernami@quicinc.com&gt;
[mani: reworded subject]
Signed-off-by: Manivannan Sadhasivam &lt;manivannan.sadhasivam@oss.qualcomm.com&gt;
Link: https://patch.msgid.link/20250912-uevent_vdev_next-20250911-v4-4-fa2f6ccd301b@quicinc.com
</content>
</entry>
<entry>
<title>bus: mhi: host: pci_generic: Add SRIOV support</title>
<updated>2025-09-19T05:53:05Z</updated>
<author>
<name>Vivek Pernamitta</name>
<email>quic_vpernami@quicinc.com</email>
</author>
<published>2025-09-12T12:48:07Z</published>
<link rel='alternate' type='text/html' href='https://git.zx2c4.com/wireguard-linux/commit/?id=fd6e0509d0e86059f9a1c25b0b91ef5d0021701f'/>
<id>urn:sha1:fd6e0509d0e86059f9a1c25b0b91ef5d0021701f</id>
<content type='text'>
pci_sriov_configure_simple() will enable or disable SR-IOV for devices
that don't require any specific PF setup before enabling SR-IOV.

Signed-off-by: Vivek Pernamitta &lt;quic_vpernami@quicinc.com&gt;
Signed-off-by: Manivannan Sadhasivam &lt;manivannan.sadhasivam@oss.qualcomm.com&gt;
Reviewed-by: Krishna Chaitanya Chundru &lt;krishna.chundru@oss.qualcomm.com&gt;
Link: https://patch.msgid.link/20250912-uevent_vdev_next-20250911-v4-3-fa2f6ccd301b@quicinc.com
</content>
</entry>
<entry>
<title>bus: mhi: host: pci_generic: Read SUBSYSTEM_VENDOR_ID for VF's to check status</title>
<updated>2025-09-19T05:52:58Z</updated>
<author>
<name>Vivek Pernamitta</name>
<email>quic_vpernami@quicinc.com</email>
</author>
<published>2025-09-12T12:48:06Z</published>
<link rel='alternate' type='text/html' href='https://git.zx2c4.com/wireguard-linux/commit/?id=b4d01c5b9a9d2dc39f52be22809e845cc4c46f03'/>
<id>urn:sha1:b4d01c5b9a9d2dc39f52be22809e845cc4c46f03</id>
<content type='text'>
In SR-IOV enabled devices, reading the VF DEVICE/VENDOR ID register
returns `FFFFh`, as specified in section 3.4.1.1 of the PCIe SR-IOV spec.
To accurately determine device activity, read the PCIe VENDOR_ID of
the Physical Function (PF) instead.
Health check monitoring for Virtual Functions (VFs) has been disabled,
since VFs are not physical functions and lack direct hardware control.
This change prevents unnecessary CPU cycles from being consumed by VF
health checks, which are both unintended and non-functional.

Signed-off-by: Vivek Pernamitta &lt;quic_vpernami@quicinc.com&gt;
Signed-off-by: Manivannan Sadhasivam &lt;manivannan.sadhasivam@oss.qualcomm.com&gt;
Reviewed-by: Krishna Chaitanya Chundru &lt;krishna.chundru@oss.qualcomm.com&gt;
Link: https://patch.msgid.link/20250912-uevent_vdev_next-20250911-v4-2-fa2f6ccd301b@quicinc.com
</content>
</entry>
<entry>
<title>bus: mhi: host: Add support for separate controller configurations for VF and PF</title>
<updated>2025-09-19T05:52:29Z</updated>
<author>
<name>Vivek Pernamitta</name>
<email>quic_vpernami@quicinc.com</email>
</author>
<published>2025-09-12T12:48:05Z</published>
<link rel='alternate' type='text/html' href='https://git.zx2c4.com/wireguard-linux/commit/?id=a9e3d5a69cf8d1a73733c52f593a3f803f576391'/>
<id>urn:sha1:a9e3d5a69cf8d1a73733c52f593a3f803f576391</id>
<content type='text'>
Implement support for separate controller configurations for both
Virtual Functions (VF) and Physical Functions (PF).

This enhancement allows for more flexible and efficient management of
resources. The PF takes on a supervisory role and will have bootup
information such as SAHARA, DIAG, and NDB (for file system sync data,
etc.). VFs can handle resources associated with the main data movement
of the Function are available to the SI (system image) as per PCIe SRIOV
spec (rev 0.9 1.Architectural overview)

Signed-off-by: Vivek Pernamitta &lt;quic_vpernami@quicinc.com&gt;
Reviewed-by: Krishna Chaitanya Chundru &lt;krishna.chundru@oss.qualcomm.com&gt;
Signed-off-by: Manivannan Sadhasivam &lt;manivannan.sadhasivam@oss.qualcomm.com&gt;
Link: https://patch.msgid.link/20250912-uevent_vdev_next-20250911-v4-1-fa2f6ccd301b@quicinc.com
</content>
</entry>
<entry>
<title>bus: mhi: ep: Fix chained transfer handling in read path</title>
<updated>2025-09-12T10:38:41Z</updated>
<author>
<name>Sumit Kumar</name>
<email>sumit.kumar@oss.qualcomm.com</email>
</author>
<published>2025-09-10T12:41:09Z</published>
<link rel='alternate' type='text/html' href='https://git.zx2c4.com/wireguard-linux/commit/?id=f5225a34bd8f9f64eec37f6ae1461289aaa3eb86'/>
<id>urn:sha1:f5225a34bd8f9f64eec37f6ae1461289aaa3eb86</id>
<content type='text'>
The mhi_ep_read_channel function incorrectly assumes the End of Transfer
(EOT) bit is present for each packet in a chained transactions, causing
it to advance mhi_chan-&gt;rd_offset beyond wr_offset during host-to-device
transfers when EOT has not yet arrived. This leads to access of unmapped
host memory, causing IOMMU faults and processing of stale TREs.

Modify the loop condition to ensure mhi_queue is not empty, allowing the
function to process only valid TREs up to the current write pointer to
prevent premature reads and ensure safe traversal of chained TREs.

Due to this change, buf_left needs to be removed from the while loop
condition to avoid exiting prematurely before reading the ring completely,
and also remove write_offset since it will always be zero because the new
cache buffer is allocated every time.

Fixes: 5301258899773 ("bus: mhi: ep: Add support for reading from the host")
Co-developed-by: Akhil Vinod &lt;akhil.vinod@oss.qualcomm.com&gt;
Signed-off-by: Akhil Vinod &lt;akhil.vinod@oss.qualcomm.com&gt;
Signed-off-by: Sumit Kumar &lt;sumit.kumar@oss.qualcomm.com&gt;
[mani: reworded description slightly]
Signed-off-by: Manivannan Sadhasivam &lt;manivannan.sadhasivam@oss.qualcomm.com&gt;
Reviewed-by: Krishna Chaitanya Chundru &lt;krishna.chundru@oss.qualcomm.com&gt;
Cc: stable@vger.kernel.org
Link: https://patch.msgid.link/20250910-final_chained-v3-1-ec77c9d88ace@oss.qualcomm.com
</content>
</entry>
<entry>
<title>bus: mhi: host: Notify EE change via uevent</title>
<updated>2025-09-12T10:02:22Z</updated>
<author>
<name>Vivek Pernamitta</name>
<email>quic_vpernami@quicinc.com</email>
</author>
<published>2025-09-12T04:59:16Z</published>
<link rel='alternate' type='text/html' href='https://git.zx2c4.com/wireguard-linux/commit/?id=d5411ed6cabd376468f76584b1fe75235325966c'/>
<id>urn:sha1:d5411ed6cabd376468f76584b1fe75235325966c</id>
<content type='text'>
Notify the MHI device's Execution Environment (EE) state via uevent,
enabling applications to receive real-time updates and take appropriate
actions based on the current state of MHI.

Signed-off-by: Vivek Pernamitta &lt;quic_vpernami@quicinc.com&gt;
[mani: Reworded subject, removed error print, fixed indentation]
Signed-off-by: Manivannan Sadhasivam &lt;manivannan.sadhasivam@oss.qualcomm.com&gt;
Link: https://patch.msgid.link/20250912-b4-uevent_vdev_next-20250911-v2-1-89440407bf7e@quicinc.com
</content>
</entry>
<entry>
<title>bus: mhi: host: Do not use uninitialized 'dev' pointer in mhi_init_irq_setup()</title>
<updated>2025-09-08T12:39:54Z</updated>
<author>
<name>Adam Xue</name>
<email>zxue@semtech.com</email>
</author>
<published>2025-09-05T17:41:18Z</published>
<link rel='alternate' type='text/html' href='https://git.zx2c4.com/wireguard-linux/commit/?id=d0856a6dff57f95cc5d2d74e50880f01697d0cc4'/>
<id>urn:sha1:d0856a6dff57f95cc5d2d74e50880f01697d0cc4</id>
<content type='text'>
In mhi_init_irq_setup, the device pointer used for dev_err() was not
initialized. Use the pointer from mhi_cntrl instead.

Fixes: b0fc0167f254 ("bus: mhi: core: Allow shared IRQ for event rings")
Fixes: 3000f85b8f47 ("bus: mhi: core: Add support for basic PM operations")
Signed-off-by: Adam Xue &lt;zxue@semtech.com&gt;
[mani: reworded subject/description and CCed stable]
Signed-off-by: Manivannan Sadhasivam &lt;manivannan.sadhasivam@oss.qualcomm.com&gt;
Reviewed-by: Krishna Chaitanya Chundru &lt;krishna.chundru@oss.qualcomm.com&gt;
Cc: stable@vger.kernel.org
Link: https://patch.msgid.link/20250905174118.38512-1-zxue@semtech.com
</content>
</entry>
</feed>
