<feed xmlns='http://www.w3.org/2005/Atom'>
<title>wireguard-linux/drivers/clk/imx/Makefile, branch jd/orphan-parallel</title>
<subtitle>WireGuard for the Linux kernel</subtitle>
<id>https://git.zx2c4.com/wireguard-linux/atom/drivers/clk/imx/Makefile?h=jd%2Forphan-parallel</id>
<link rel='self' href='https://git.zx2c4.com/wireguard-linux/atom/drivers/clk/imx/Makefile?h=jd%2Forphan-parallel'/>
<link rel='alternate' type='text/html' href='https://git.zx2c4.com/wireguard-linux/'/>
<updated>2020-09-22T06:09:19Z</updated>
<entry>
<title>clk: imx: imx21: Remove clock driver</title>
<updated>2020-09-22T06:09:19Z</updated>
<author>
<name>Fabio Estevam</name>
<email>festevam@gmail.com</email>
</author>
<published>2020-09-17T00:41:25Z</published>
<link rel='alternate' type='text/html' href='https://git.zx2c4.com/wireguard-linux/commit/?id=805837740d0142c38ab94b2269ca28da3890ae68'/>
<id>urn:sha1:805837740d0142c38ab94b2269ca28da3890ae68</id>
<content type='text'>
As i.MX21 support has been removed, get rid of its clock driver too.

Signed-off-by: Fabio Estevam &lt;festevam@gmail.com&gt;
Acked-by: Arnd Bergmann &lt;arnd@arndb.de&gt;
Signed-off-by: Shawn Guo &lt;shawnguo@kernel.org&gt;
</content>
</entry>
<entry>
<title>clk: imx8qxp: Support building i.MX8QXP clock driver as module</title>
<updated>2020-08-22T04:38:29Z</updated>
<author>
<name>Anson Huang</name>
<email>Anson.Huang@nxp.com</email>
</author>
<published>2020-07-30T01:22:54Z</published>
<link rel='alternate' type='text/html' href='https://git.zx2c4.com/wireguard-linux/commit/?id=e0d0d4d86c766335066d7c241fbe42fbd67d4198'/>
<id>urn:sha1:e0d0d4d86c766335066d7c241fbe42fbd67d4198</id>
<content type='text'>
Change configuration to "tristate", add module author, description and
license to support building i.MX8QXP clock drivers as module.

Signed-off-by: Anson Huang &lt;Anson.Huang@nxp.com&gt;
Reviewed-by: Stephen Boyd &lt;sboyd@kernel.org&gt;
Signed-off-by: Shawn Guo &lt;shawnguo@kernel.org&gt;
</content>
</entry>
<entry>
<title>clk: imx: Add clock configuration for ARMv7 platforms</title>
<updated>2020-08-22T04:38:23Z</updated>
<author>
<name>Anson Huang</name>
<email>Anson.Huang@nxp.com</email>
</author>
<published>2020-07-30T01:22:52Z</published>
<link rel='alternate' type='text/html' href='https://git.zx2c4.com/wireguard-linux/commit/?id=f1f018dc030edfeca54373053cf02dee4561bb0c'/>
<id>urn:sha1:f1f018dc030edfeca54373053cf02dee4561bb0c</id>
<content type='text'>
Add CONFIG_CLK_xxx for i.MX ARMv7 platforms, and use it as build option
instead of CONFIG_SOC_xxx, the CONFIG_CLK_xxx will be selected by default
according to CONFIG_SOC_xxx.

Signed-off-by: Anson Huang &lt;Anson.Huang@nxp.com&gt;
Reviewed-by: Dong Aisheng &lt;aisheng.dong@nxp.com&gt;
Reviewed-by: Stephen Boyd &lt;sboyd@kernel.org&gt;
Signed-off-by: Shawn Guo &lt;shawnguo@kernel.org&gt;
</content>
</entry>
<entry>
<title>clk: imx: Support building i.MX common clock driver as module</title>
<updated>2020-08-22T04:38:20Z</updated>
<author>
<name>Anson Huang</name>
<email>Anson.Huang@nxp.com</email>
</author>
<published>2020-07-30T01:22:51Z</published>
<link rel='alternate' type='text/html' href='https://git.zx2c4.com/wireguard-linux/commit/?id=870ed5e22ae18b63751140b4050050ca2115ba60'/>
<id>urn:sha1:870ed5e22ae18b63751140b4050050ca2115ba60</id>
<content type='text'>
There are more and more requirements of building SoC specific drivers
as modules, add support for building i.MX common clock driver as module
to meet the requirement.

Signed-off-by: Anson Huang &lt;Anson.Huang@nxp.com&gt;
Reviewed-by: Stephen Boyd &lt;sboyd@kernel.org&gt;
Signed-off-by: Shawn Guo &lt;shawnguo@kernel.org&gt;
</content>
</entry>
<entry>
<title>clk: imx: Add support for i.MX8MP clock driver</title>
<updated>2020-01-12T06:07:36Z</updated>
<author>
<name>Anson Huang</name>
<email>Anson.Huang@nxp.com</email>
</author>
<published>2020-01-08T01:53:36Z</published>
<link rel='alternate' type='text/html' href='https://git.zx2c4.com/wireguard-linux/commit/?id=9c140d9926761b0f5d329ff6c09a1540f3d5e1d3'/>
<id>urn:sha1:9c140d9926761b0f5d329ff6c09a1540f3d5e1d3</id>
<content type='text'>
Add clock driver support for i.MX8MP which is a new SoC of i.MX8M
family.

Signed-off-by: Anson Huang &lt;Anson.Huang@nxp.com&gt;
Reviewed-by: Abel Vesa &lt;abel.vesa@nxp.com&gt;
Signed-off-by: Shawn Guo &lt;shawnguo@kernel.org&gt;
</content>
</entry>
<entry>
<title>clk: imx: Rename the SCCG to SSCG</title>
<updated>2019-12-11T11:19:35Z</updated>
<author>
<name>Abel Vesa</name>
<email>abel.vesa@nxp.com</email>
</author>
<published>2019-12-11T09:25:41Z</published>
<link rel='alternate' type='text/html' href='https://git.zx2c4.com/wireguard-linux/commit/?id=ba7928d9d71f15e15e7ba300426422f928440eb5'/>
<id>urn:sha1:ba7928d9d71f15e15e7ba300426422f928440eb5</id>
<content type='text'>
According to the manual the acronym stands for
Spread Sprectum Clock Generator.

Signed-off-by: Abel Vesa &lt;abel.vesa@nxp.com&gt;
Signed-off-by: Shawn Guo &lt;shawnguo@kernel.org&gt;
</content>
</entry>
<entry>
<title>clk: imx: Add support for i.MX8MN clock driver</title>
<updated>2019-08-03T07:16:02Z</updated>
<author>
<name>Anson Huang</name>
<email>Anson.Huang@nxp.com</email>
</author>
<published>2019-06-19T05:52:46Z</published>
<link rel='alternate' type='text/html' href='https://git.zx2c4.com/wireguard-linux/commit/?id=96d6392b54dbb1ff2b39448a2516fa6abb33114b'/>
<id>urn:sha1:96d6392b54dbb1ff2b39448a2516fa6abb33114b</id>
<content type='text'>
This patch adds i.MX8MN clock driver support.

Signed-off-by: Anson Huang &lt;Anson.Huang@nxp.com&gt;
Signed-off-by: Shawn Guo &lt;shawnguo@kernel.org&gt;
</content>
</entry>
<entry>
<title>clk: imx: rename clk-imx51-imx53.c to clk-imx5.c</title>
<updated>2019-04-15T09:09:23Z</updated>
<author>
<name>Shawn Guo</name>
<email>shawnguo@kernel.org</email>
</author>
<published>2019-04-03T09:11:25Z</published>
<link rel='alternate' type='text/html' href='https://git.zx2c4.com/wireguard-linux/commit/?id=de348df5b389f7ddab388934e84f24d8a9f3c961'/>
<id>urn:sha1:de348df5b389f7ddab388934e84f24d8a9f3c961</id>
<content type='text'>
As the driver is handling all i.MX5 series SoCs inlcuding i.MX50, rather
than just i.MX51 and i.MX53, let's rename it to clk-imx5.c.

Signed-off-by: Shawn Guo &lt;shawnguo@kernel.org&gt;
Reviewed-by: Stephen Boyd &lt;sboyd@kernel.org&gt;
</content>
</entry>
<entry>
<title>clk: imx: Add clock driver support for imx8mm</title>
<updated>2019-02-21T20:41:16Z</updated>
<author>
<name>Bai Ping</name>
<email>ping.bai@nxp.com</email>
</author>
<published>2019-01-22T09:31:51Z</published>
<link rel='alternate' type='text/html' href='https://git.zx2c4.com/wireguard-linux/commit/?id=ba5625c3e272c77014687d44e12d2649eec4ddee'/>
<id>urn:sha1:ba5625c3e272c77014687d44e12d2649eec4ddee</id>
<content type='text'>
Add clock driver support for i.MX8MM SOC.

Signed-off-by: Bai Ping &lt;ping.bai@nxp.com&gt;
Signed-off-by: Stephen Boyd &lt;sboyd@kernel.org&gt;
</content>
</entry>
<entry>
<title>clk: imx: Add PLLs driver for imx8mm soc</title>
<updated>2019-02-21T20:41:16Z</updated>
<author>
<name>Bai Ping</name>
<email>ping.bai@nxp.com</email>
</author>
<published>2019-01-22T09:31:41Z</published>
<link rel='alternate' type='text/html' href='https://git.zx2c4.com/wireguard-linux/commit/?id=8646d4dcc7fb2e6e771f8cee500950f3f69aa1ea'/>
<id>urn:sha1:8646d4dcc7fb2e6e771f8cee500950f3f69aa1ea</id>
<content type='text'>
New PLLs are introduced on i.MX8M Mini SOC.
PLL1416X is Integer PLL, PLL1443X is a Frac PLL.

Signed-off-by: Bai Ping &lt;ping.bai@nxp.com&gt;
Signed-off-by: Stephen Boyd &lt;sboyd@kernel.org&gt;
</content>
</entry>
</feed>
