<feed xmlns='http://www.w3.org/2005/Atom'>
<title>wireguard-linux/drivers/clk/qcom/Kconfig, branch stable</title>
<subtitle>WireGuard for the Linux kernel</subtitle>
<id>https://git.zx2c4.com/wireguard-linux/atom/drivers/clk/qcom/Kconfig?h=stable</id>
<link rel='self' href='https://git.zx2c4.com/wireguard-linux/atom/drivers/clk/qcom/Kconfig?h=stable'/>
<link rel='alternate' type='text/html' href='https://git.zx2c4.com/wireguard-linux/'/>
<updated>2026-07-31T03:37:12Z</updated>
<entry>
<title>clk: qcom: Add support for videocc driver on Qualcomm Maili SoC</title>
<updated>2026-07-31T03:37:12Z</updated>
<author>
<name>Jagadeesh Kona</name>
<email>jagadeesh.kona@oss.qualcomm.com</email>
</author>
<published>2026-07-17T04:14:45Z</published>
<link rel='alternate' type='text/html' href='https://git.zx2c4.com/wireguard-linux/commit/?id=778149217dc01becdca9df2b004ba1b6dd939e27'/>
<id>urn:sha1:778149217dc01becdca9df2b004ba1b6dd939e27</id>
<content type='text'>
Add support for Qualcomm Maili video clock controller driver for
video clients to be able to request for videocc clocks.

Reviewed-by: Konrad Dybcio &lt;konrad.dybcio@oss.qualcomm.com&gt;
Reviewed-by: Taniya Das &lt;taniya.das@oss.qualcomm.com&gt;
Signed-off-by: Jagadeesh Kona &lt;jagadeesh.kona@oss.qualcomm.com&gt;
Link: https://lore.kernel.org/r/20260717-maili_videocc-v3-2-6656694b06a7@oss.qualcomm.com
Signed-off-by: Bjorn Andersson &lt;andersson@kernel.org&gt;
</content>
</entry>
<entry>
<title>clk: qcom: Add Audio Core clock controller support on Qualcomm Shikra SoC</title>
<updated>2026-07-31T03:33:53Z</updated>
<author>
<name>Imran Shaik</name>
<email>imran.shaik@oss.qualcomm.com</email>
</author>
<published>2026-07-24T17:15:33Z</published>
<link rel='alternate' type='text/html' href='https://git.zx2c4.com/wireguard-linux/commit/?id=3e7b00804665c8d2e87faaf3ca8e170bc0246896'/>
<id>urn:sha1:3e7b00804665c8d2e87faaf3ca8e170bc0246896</id>
<content type='text'>
Add support for Audio Core Clock Controller (AUDIOCORECC) and Audio Core
CSR resets on Qualcomm Shikra SoC.

Reviewed-by: Konrad Dybcio &lt;konrad.dybcio@oss.qualcomm.com&gt;
Reviewed-by: Dmitry Baryshkov &lt;dmitry.baryshkov@oss.qualcomm.com&gt;
Signed-off-by: Imran Shaik &lt;imran.shaik@oss.qualcomm.com&gt;
Link: https://lore.kernel.org/r/20260724-shikra-audiocorecc-v4-2-0a89bb13d817@oss.qualcomm.com
Signed-off-by: Bjorn Andersson &lt;andersson@kernel.org&gt;
</content>
</entry>
<entry>
<title>clk: qcom: gpucc: Add Nord graphics clock controller support</title>
<updated>2026-07-31T03:32:40Z</updated>
<author>
<name>Taniya Das</name>
<email>taniya.das@oss.qualcomm.com</email>
</author>
<published>2026-07-24T10:55:10Z</published>
<link rel='alternate' type='text/html' href='https://git.zx2c4.com/wireguard-linux/commit/?id=47f2e6e1cee19f29d2581a216a9e4c80fd6a34dd'/>
<id>urn:sha1:47f2e6e1cee19f29d2581a216a9e4c80fd6a34dd</id>
<content type='text'>
Add support for the GPU clock controllers (GPUCC) on the Qualcomm
Nord platform.

The platform includes two GPU clock controller instances,GPUCC
and GPU2CC. Register support for both controllers, which provide
clocks required for the graphics subsystem.

Reviewed-by: Alexandre Mergnat &lt;amergnat@baylibre.com&gt;
Reviewed-by: Shawn Guo &lt;shengchao.guo@oss.qualcomm.com&gt;
Signed-off-by: Taniya Das &lt;taniya.das@oss.qualcomm.com&gt;
Link: https://lore.kernel.org/r/20260724-nords_mm_v1-v3-6-32b45232217f@oss.qualcomm.com
Signed-off-by: Bjorn Andersson &lt;andersson@kernel.org&gt;
</content>
</entry>
<entry>
<title>clk: qcom: Add Nord display clock controller support</title>
<updated>2026-07-31T03:32:18Z</updated>
<author>
<name>Taniya Das</name>
<email>taniya.das@oss.qualcomm.com</email>
</author>
<published>2026-07-24T10:55:08Z</published>
<link rel='alternate' type='text/html' href='https://git.zx2c4.com/wireguard-linux/commit/?id=9dcc782e208251471cade8ac36c7717a7345ecb4'/>
<id>urn:sha1:9dcc782e208251471cade8ac36c7717a7345ecb4</id>
<content type='text'>
Add support for the display clock controllers (DISPCC) on the
Qualcomm Nord platform.

The platform includes two display clock controller instances,
display0 and display1. Register support for both controllers.

Reviewed-by: Konrad Dybcio &lt;konrad.dybcio@oss.qualcomm.com&gt;
Reviewed-by: Shawn Guo &lt;shengchao.guo@oss.qualcomm.com&gt;
Signed-off-by: Taniya Das &lt;taniya.das@oss.qualcomm.com&gt;
Reviewed-by: Alexandre Mergnat &lt;amergnat@baylibre.com&gt;
Link: https://lore.kernel.org/r/20260724-nords_mm_v1-v3-4-32b45232217f@oss.qualcomm.com
Signed-off-by: Bjorn Andersson &lt;andersson@kernel.org&gt;
</content>
</entry>
<entry>
<title>clk: qcom: Add defaults for desired arm64 drivers</title>
<updated>2026-07-11T17:16:50Z</updated>
<author>
<name>Krzysztof Kozlowski</name>
<email>krzysztof.kozlowski@oss.qualcomm.com</email>
</author>
<published>2026-07-03T10:04:03Z</published>
<link rel='alternate' type='text/html' href='https://git.zx2c4.com/wireguard-linux/commit/?id=6b150572bb76dc508b0d9fbe2c5a56a67429e376'/>
<id>urn:sha1:6b150572bb76dc508b0d9fbe2c5a56a67429e376</id>
<content type='text'>
Clock controller drivers are essential for booting up SoCs and are not
really optional for a given platform.  Kernel should not ask users
choice of drivers when that choice is obvious and known to the
developers that answer should be 'yes' or 'module'.

Enable drivers for upstreamed or being upstreamed SoCs, which are not
yed enabled in defconfig: Glymur, Hawi, Nord, MSM8976, MSM8998 (GPU CC),
SC7180, SC8180X, SC8280XP, SC7280, SDM660, QDU1000, SM4450, SM7150,
SM8150, SM8450, SM6125, SM6375.  Note that main GCC clock controller
drivers are usually already enabled for these.

Reviewed-by: Konrad Dybcio &lt;konrad.dybcio@oss.qualcomm.com&gt;
Signed-off-by: Krzysztof Kozlowski &lt;krzysztof.kozlowski@oss.qualcomm.com&gt;
Link: https://lore.kernel.org/r/20260703-clk-qcom-defaults-v3-5-78894525e54a@oss.qualcomm.com
Signed-off-by: Bjorn Andersson &lt;andersson@kernel.org&gt;
</content>
</entry>
<entry>
<title>clk: qcom: Make important ARM32 drivers default</title>
<updated>2026-07-11T17:16:35Z</updated>
<author>
<name>Krzysztof Kozlowski</name>
<email>krzysztof.kozlowski@oss.qualcomm.com</email>
</author>
<published>2026-07-03T10:04:02Z</published>
<link rel='alternate' type='text/html' href='https://git.zx2c4.com/wireguard-linux/commit/?id=d643934c275d83470a195a115cd16ac13d1ebbd6'/>
<id>urn:sha1:d643934c275d83470a195a115cd16ac13d1ebbd6</id>
<content type='text'>
Clock controller drivers are essential for booting up SoCs and are not
really optional for a given platform.  Kernel should not ask users
choice of drivers when that choice is obvious and known to the
developers that answer should be 'yes' or 'module'.

Switch all Qualcomm clock controller drivers which are chosen in
ARM 32-bit qcom defconfig to a default 'yes'.

This has no impact on ARM32 qcom defconfig and ARM64 defconfig
include/generated/autoconf.h, however enables a few drivers for ARM32
multi_v7 defconfig: IPQ_GCC_4019, QCOM_CLK_APCS_SDX55, MSM_LCC_8960,
SDX_GCC_55, QCOM_CLK_RPMH as module, IPQ_GCC_806X, IPQ_LCC_806X and
QCOM_A7PLL.  Enabling these on multi_v7 is expected to properly boot
these SoCs with defconfig.

Signed-off-by: Krzysztof Kozlowski &lt;krzysztof.kozlowski@oss.qualcomm.com&gt;
Reviewed-by: Konrad Dybcio &lt;konrad.dybcio@oss.qualcomm.com&gt;
Link: https://lore.kernel.org/r/20260703-clk-qcom-defaults-v3-4-78894525e54a@oss.qualcomm.com
Signed-off-by: Bjorn Andersson &lt;andersson@kernel.org&gt;
</content>
</entry>
<entry>
<title>clk: qcom: Make important ARM64 drivers default</title>
<updated>2026-07-11T17:16:35Z</updated>
<author>
<name>Krzysztof Kozlowski</name>
<email>krzysztof.kozlowski@oss.qualcomm.com</email>
</author>
<published>2026-07-03T10:04:01Z</published>
<link rel='alternate' type='text/html' href='https://git.zx2c4.com/wireguard-linux/commit/?id=5c38f9b7df7716c2ff54418d6a0aa4328133a58e'/>
<id>urn:sha1:5c38f9b7df7716c2ff54418d6a0aa4328133a58e</id>
<content type='text'>
Clock controller drivers are essential for booting up SoCs and are not
really optional for a given platform.  Kernel should not ask users
choice of drivers when that choice is obvious and known to the
developers that answer should be 'yes' or 'module'.

Switch all Qualcomm clock controller drivers which are chosen in
defconfig to respective default 'yes' or 'module'.

This has no impact on ARM64 defconfig include/generated/autoconf.h,
however changes few drivers for ARM 32-bit:

1. multi_v7_defconfig: Enable QCOM_CLK_RPMH as module, because SDX55
   (ARM 32-bit) uses it.

2. qcom_defconfig: Enable QCOM_A53PLL, QCOM_CLK_APCS_MSM8916 and
   MSM_GCC_8916 as built-in, because MSM8916 is also used ARM 32-bit.

Reviewed-by: Konrad Dybcio &lt;konrad.dybcio@oss.qualcomm.com&gt;
Signed-off-by: Krzysztof Kozlowski &lt;krzysztof.kozlowski@oss.qualcomm.com&gt;
Link: https://lore.kernel.org/r/20260703-clk-qcom-defaults-v3-3-78894525e54a@oss.qualcomm.com
Signed-off-by: Bjorn Andersson &lt;andersson@kernel.org&gt;
</content>
</entry>
<entry>
<title>clk: qcom: Restrict A7PLL and IPQ4019 GCC to ARM</title>
<updated>2026-07-11T17:16:35Z</updated>
<author>
<name>Krzysztof Kozlowski</name>
<email>krzysztof.kozlowski@oss.qualcomm.com</email>
</author>
<published>2026-07-03T10:04:00Z</published>
<link rel='alternate' type='text/html' href='https://git.zx2c4.com/wireguard-linux/commit/?id=9904402cf417140f0dbdd0b9b3b5f5fd0527a447'/>
<id>urn:sha1:9904402cf417140f0dbdd0b9b3b5f5fd0527a447</id>
<content type='text'>
IPQ4019 is ARM 32-bit only SoC and QCOM_A7PLL is used only on SDX55 and
SDX65, which are 32-bit as well.

Do not allow building them for ARM64 to make built kernels smaller and
user choices easier.

Reviewed-by: Konrad Dybcio &lt;konrad.dybcio@oss.qualcomm.com&gt;
Reviewed-by: Dmitry Baryshkov &lt;dmitry.baryshkov@oss.qualcomm.com&gt;
Signed-off-by: Krzysztof Kozlowski &lt;krzysztof.kozlowski@oss.qualcomm.com&gt;
Link: https://lore.kernel.org/r/20260703-clk-qcom-defaults-v3-2-78894525e54a@oss.qualcomm.com
Signed-off-by: Bjorn Andersson &lt;andersson@kernel.org&gt;
</content>
</entry>
<entry>
<title>clk: qcom: Restrict IPQ5424, IPQ6018,IPQ9574, QCM2290 and others to ARM64</title>
<updated>2026-07-11T17:16:35Z</updated>
<author>
<name>Krzysztof Kozlowski</name>
<email>krzysztof.kozlowski@oss.qualcomm.com</email>
</author>
<published>2026-07-03T10:03:59Z</published>
<link rel='alternate' type='text/html' href='https://git.zx2c4.com/wireguard-linux/commit/?id=2ce505b437e98adc3c009d22762f491cd2cb15ee'/>
<id>urn:sha1:2ce505b437e98adc3c009d22762f491cd2cb15ee</id>
<content type='text'>
Some clock drivers for IPQ5424, IPQ9574, QCM2290, QDU1000 and SA8775
already depend on ARM64.  IPQ6018 is ARM64 only SoC (at least upstream)
so should not be a choice for ARM 32-bit builds, to make kernels smaller
and user choices easier.

IPQ_CMN_PLL is used only by the SoCs already having clock controllers
restricted to ARM64

Reviewed-by: Dmitry Baryshkov &lt;dmitry.baryshkov@oss.qualcomm.com&gt;
Reviewed-by: Konrad Dybcio &lt;konrad.dybcio@oss.qualcomm.com&gt;
Signed-off-by: Krzysztof Kozlowski &lt;krzysztof.kozlowski@oss.qualcomm.com&gt;
Link: https://lore.kernel.org/r/20260703-clk-qcom-defaults-v3-1-78894525e54a@oss.qualcomm.com
Signed-off-by: Bjorn Andersson &lt;andersson@kernel.org&gt;
</content>
</entry>
<entry>
<title>clk: qcom: camcc-glymur: Add camera clock controller driver</title>
<updated>2026-07-11T15:20:18Z</updated>
<author>
<name>Jagadeesh Kona</name>
<email>jagadeesh.kona@oss.qualcomm.com</email>
</author>
<published>2026-06-24T14:50:30Z</published>
<link rel='alternate' type='text/html' href='https://git.zx2c4.com/wireguard-linux/commit/?id=97255eedd6905980c85eb93b438edcb91277f831'/>
<id>urn:sha1:97255eedd6905980c85eb93b438edcb91277f831</id>
<content type='text'>
Add support for the camera clock controller for camera clients
to be able to request for camcc clocks on Glymur platform.

Reviewed-by: Taniya Das &lt;taniya.das@oss.qualcomm.com&gt;
Reviewed-by: Konrad Dybcio &lt;konrad.dybcio@oss.qualcomm.com&gt;
Reviewed-by: Vladimir Zapolskiy &lt;vladimir.zapolskiy@linaro.org&gt;
Signed-off-by: Jagadeesh Kona &lt;jagadeesh.kona@oss.qualcomm.com&gt;
Link: https://lore.kernel.org/r/20260624-glymur_camcc-v5-2-a321df74b1a1@oss.qualcomm.com
Signed-off-by: Bjorn Andersson &lt;andersson@kernel.org&gt;
</content>
</entry>
</feed>
