<feed xmlns='http://www.w3.org/2005/Atom'>
<title>wireguard-linux/drivers/clk/qcom/Makefile, branch update-toolchain</title>
<subtitle>WireGuard for the Linux kernel</subtitle>
<id>https://git.zx2c4.com/wireguard-linux/atom/drivers/clk/qcom/Makefile?h=update-toolchain</id>
<link rel='self' href='https://git.zx2c4.com/wireguard-linux/atom/drivers/clk/qcom/Makefile?h=update-toolchain'/>
<link rel='alternate' type='text/html' href='https://git.zx2c4.com/wireguard-linux/'/>
<updated>2024-06-26T02:49:46Z</updated>
<entry>
<title>Merge branch '20240602114439.1611-1-quic_jkona@quicinc.com' into clk-for-6.11</title>
<updated>2024-06-26T02:49:46Z</updated>
<author>
<name>Bjorn Andersson</name>
<email>andersson@kernel.org</email>
</author>
<published>2024-06-25T23:06:44Z</published>
<link rel='alternate' type='text/html' href='https://git.zx2c4.com/wireguard-linux/commit/?id=03675e398b30b544887836518a071a16c29204fd'/>
<id>urn:sha1:03675e398b30b544887836518a071a16c29204fd</id>
<content type='text'>
Merge SM8650 video and camera clock drivers through topic branch, to
make available the DeviceTree binding includes to the DeviceTree source
branches as well.
</content>
</entry>
<entry>
<title>clk: qcom: camcc-sm8650: Add SM8650 camera clock controller driver</title>
<updated>2024-06-26T02:47:52Z</updated>
<author>
<name>Jagadeesh Kona</name>
<email>quic_jkona@quicinc.com</email>
</author>
<published>2024-06-02T11:44:38Z</published>
<link rel='alternate' type='text/html' href='https://git.zx2c4.com/wireguard-linux/commit/?id=09ea421652a832083ea380a72addf383965f3682'/>
<id>urn:sha1:09ea421652a832083ea380a72addf383965f3682</id>
<content type='text'>
Add support for the camera clock controller for camera clients to
be able to request for camcc clocks on SM8650 platform.

Signed-off-by: Jagadeesh Kona &lt;quic_jkona@quicinc.com&gt;
Reviewed-by: Bryan O'Donoghue &lt;bryan.odonoghue@linaro.org&gt;
Reviewed-by: Dmitry Baryshkov &lt;dmitry.baryshkov@linaro.org&gt;
Reviewed-by: Vladimir Zapolskiy &lt;vladimir.zapolskiy@linaro.org&gt;
Tested-by: Vladimir Zapolskiy &lt;vladimir.zapolskiy@linaro.org&gt;
Link: https://lore.kernel.org/r/20240602114439.1611-8-quic_jkona@quicinc.com
Signed-off-by: Bjorn Andersson &lt;andersson@kernel.org&gt;
</content>
</entry>
<entry>
<title>clk: qcom: Add QCM2290 GPU clock controller driver</title>
<updated>2024-06-13T23:03:02Z</updated>
<author>
<name>Konrad Dybcio</name>
<email>konrad.dybcio@linaro.org</email>
</author>
<published>2024-06-06T11:36:02Z</published>
<link rel='alternate' type='text/html' href='https://git.zx2c4.com/wireguard-linux/commit/?id=8cab033628b12c6f55aea4170dfe565761336a95'/>
<id>urn:sha1:8cab033628b12c6f55aea4170dfe565761336a95</id>
<content type='text'>
Add a driver for the GPU clock controller block found on the QCM2290 SoC.

Reviewed-by: Dmitry Baryshkov &lt;dmitry.baryshkov@linaro.org&gt;
Signed-off-by: Konrad Dybcio &lt;konrad.dybcio@linaro.org&gt;
Link: https://lore.kernel.org/r/20240606-topic-rb1_gpu-v4-3-4bc0c19da4af@linaro.org
Signed-off-by: Bjorn Andersson &lt;andersson@kernel.org&gt;
</content>
</entry>
<entry>
<title>clk: qcom: add clock controller driver for qca8386/qca8084</title>
<updated>2024-06-13T04:04:26Z</updated>
<author>
<name>Luo Jie</name>
<email>quic_luoj@quicinc.com</email>
</author>
<published>2024-06-05T12:45:41Z</published>
<link rel='alternate' type='text/html' href='https://git.zx2c4.com/wireguard-linux/commit/?id=2441b965c4c7adae0b4a7825f7acb67d44c3cd38'/>
<id>urn:sha1:2441b965c4c7adae0b4a7825f7acb67d44c3cd38</id>
<content type='text'>
The clock controller driver of qca8386/qca8084 is registered
as the MDIO device, the hardware register is accessed by MDIO bus
that is normally used to access general PHY device, which is
different from the current existed qcom clock controller drivers
using ioremap to access hardware clock registers, nsscc-qca8k is
accessed via an MDIO bus.

MDIO bus is commonly utilized by both qca8386/qca8084 and other
PHY devices, so the mutex lock mdio_bus-&gt;mdio_lock should be
used instead of using the mutex lock of remap.

To access the hardware clock registers of qca8386/qca8084, there
is a special MDIO frame sequence, which needs to be sent to the
device.

Enable the reference clock before resetting the clock controller,
the reference clock rate is fixed to 50MHZ.

Reviewed-by: Bryan O'Donoghue &lt;bryan.odonoghue@linaro.org&gt;
Signed-off-by: Luo Jie &lt;quic_luoj@quicinc.com&gt;
Link: https://lore.kernel.org/r/20240605124541.2711467-5-quic_luoj@quicinc.com
Signed-off-by: Bjorn Andersson &lt;andersson@kernel.org&gt;
</content>
</entry>
<entry>
<title>clk: qcom: Add Video Clock Controller driver for SM7150</title>
<updated>2024-05-27T17:01:56Z</updated>
<author>
<name>Danila Tikhonov</name>
<email>danila@jiaxyga.com</email>
</author>
<published>2024-05-05T20:10:38Z</published>
<link rel='alternate' type='text/html' href='https://git.zx2c4.com/wireguard-linux/commit/?id=aa9fc5c90814fcb9ecabbb505e097ff05abf962e'/>
<id>urn:sha1:aa9fc5c90814fcb9ecabbb505e097ff05abf962e</id>
<content type='text'>
Add support for the video clock controller found on SM7150.

Signed-off-by: Danila Tikhonov &lt;danila@jiaxyga.com&gt;
Link: https://lore.kernel.org/r/20240505201038.276047-9-danila@jiaxyga.com
Signed-off-by: Bjorn Andersson &lt;andersson@kernel.org&gt;
</content>
</entry>
<entry>
<title>clk: qcom: Add Camera Clock Controller driver for SM7150</title>
<updated>2024-05-27T17:01:56Z</updated>
<author>
<name>Danila Tikhonov</name>
<email>danila@jiaxyga.com</email>
</author>
<published>2024-05-05T20:10:36Z</published>
<link rel='alternate' type='text/html' href='https://git.zx2c4.com/wireguard-linux/commit/?id=9f0532da42261476561c0a683097f6de82e7c3ed'/>
<id>urn:sha1:9f0532da42261476561c0a683097f6de82e7c3ed</id>
<content type='text'>
Add support for the camera clock controller found on SM7150.

Signed-off-by: Danila Tikhonov &lt;danila@jiaxyga.com&gt;
Link: https://lore.kernel.org/r/20240505201038.276047-7-danila@jiaxyga.com
Signed-off-by: Bjorn Andersson &lt;andersson@kernel.org&gt;
</content>
</entry>
<entry>
<title>clk: qcom: Add Display Clock Controller driver for SM7150</title>
<updated>2024-05-27T17:01:56Z</updated>
<author>
<name>Danila Tikhonov</name>
<email>danila@jiaxyga.com</email>
</author>
<published>2024-05-05T20:10:34Z</published>
<link rel='alternate' type='text/html' href='https://git.zx2c4.com/wireguard-linux/commit/?id=3829c412197e14b8cac445d0e3a76c7cd5fff064'/>
<id>urn:sha1:3829c412197e14b8cac445d0e3a76c7cd5fff064</id>
<content type='text'>
Add support for the display clock controller found on SM7150.

Co-developed-by: David Wronek &lt;david@mainlining.org&gt;
Signed-off-by: David Wronek &lt;david@mainlining.org&gt;
Signed-off-by: Danila Tikhonov &lt;danila@jiaxyga.com&gt;
Link: https://lore.kernel.org/r/20240505201038.276047-5-danila@jiaxyga.com
Signed-off-by: Bjorn Andersson &lt;andersson@kernel.org&gt;
</content>
</entry>
<entry>
<title>clk: qcom: drop the SC7180 Modem subsystem clock driver</title>
<updated>2024-02-16T17:17:16Z</updated>
<author>
<name>Dmitry Baryshkov</name>
<email>dmitry.baryshkov@linaro.org</email>
</author>
<published>2024-02-16T11:14:58Z</published>
<link rel='alternate' type='text/html' href='https://git.zx2c4.com/wireguard-linux/commit/?id=c630cf8f3a6cc3048f8c78b130a9ce9749b81b30'/>
<id>urn:sha1:c630cf8f3a6cc3048f8c78b130a9ce9749b81b30</id>
<content type='text'>
This driver has never been used in the DT files merged to the kernel.
According to Sibi, it only worked on the pre-production devices. For the
production devices this functionality has been moved to the firmware.

Drop the driver to remove possible confusion.

Cc: Sibi Sankar &lt;quic_sibis@quicinc.com&gt;
Signed-off-by: Dmitry Baryshkov &lt;dmitry.baryshkov@linaro.org&gt;
Reviewed-by: Konrad Dybcio &lt;konrad.dybcio@linaro.org&gt;
Link: https://lore.kernel.org/r/20240216-drop-sc7180-mss-v1-1-0a8dc8d71c0c@linaro.org
Signed-off-by: Bjorn Andersson &lt;andersson@kernel.org&gt;
</content>
</entry>
<entry>
<title>clk: qcom: Add camcc clock driver for x1e80100</title>
<updated>2024-02-06T17:13:19Z</updated>
<author>
<name>Rajendra Nayak</name>
<email>quic_rjendra@quicinc.com</email>
</author>
<published>2024-02-02T18:34:45Z</published>
<link rel='alternate' type='text/html' href='https://git.zx2c4.com/wireguard-linux/commit/?id=76126a5129b57a705a621c2711eed149c5be5873'/>
<id>urn:sha1:76126a5129b57a705a621c2711eed149c5be5873</id>
<content type='text'>
Add the camcc clock driver for x1e80100

Signed-off-by: Rajendra Nayak &lt;quic_rjendra@quicinc.com&gt;
Reviewed-by: Bryan O'Donoghue &lt;bryan.odonoghue@linaro.org&gt;
Tested-by: Bryan O'Donoghue &lt;bryan.odonoghue@linaro.org&gt;
Signed-off-by: Abel Vesa &lt;abel.vesa@linaro.org&gt;
Link: https://lore.kernel.org/r/20240202-x1e80100-clock-controllers-v4-10-7fb08c861c7c@linaro.org
Signed-off-by: Bjorn Andersson &lt;andersson@kernel.org&gt;
</content>
</entry>
<entry>
<title>clk: qcom: Add TCSR clock driver for x1e80100</title>
<updated>2024-02-06T17:13:19Z</updated>
<author>
<name>Abel Vesa</name>
<email>abel.vesa@linaro.org</email>
</author>
<published>2024-02-02T18:34:44Z</published>
<link rel='alternate' type='text/html' href='https://git.zx2c4.com/wireguard-linux/commit/?id=06aff116199c1b7e57e1c796fa0a8bebeac8beea'/>
<id>urn:sha1:06aff116199c1b7e57e1c796fa0a8bebeac8beea</id>
<content type='text'>
The TCSR clock controller found on X1E80100 provides refclks
for PCIE, USB and UFS. Add clock driver for it.

Signed-off-by: Abel Vesa &lt;abel.vesa@linaro.org&gt;
Reviewed-by: Konrad Dybcio &lt;konrad.dybcio@linaro.org&gt;
Link: https://lore.kernel.org/r/20240202-x1e80100-clock-controllers-v4-9-7fb08c861c7c@linaro.org
Signed-off-by: Bjorn Andersson &lt;andersson@kernel.org&gt;
</content>
</entry>
</feed>
