wireguard-linux/drivers/clk/sunxi-ng, branch jd/orphan-parallel

clk: sunxi-ng: sun8i: r40: Use sigma delta modulation for audio PLL

2020-08-25T14:42:55Z

Audio cores need specific clock rates which can't be simply obtained by adjusting integer multipliers and dividers. HW for such cases supports delta-sigma modulation which enables fractional multipliers. Port H3 delta-sigma table to R40. They have identical audio PLLs. Signed-off-by: Jernej Skrabec Signed-off-by: Maxime Ripard Link: https://lore.kernel.org/r/20200825131049.1277596-1-jernej.skrabec@siol.net

clk: sunxi-ng: add support for the Allwinner A100 CCU

2020-08-25T08:52:18Z

Add support for a100 in the sunxi-ng CCU framework. Signed-off-by: Yangtao Li Signed-off-by: Maxime Ripard Acked-by: Rob Herring Link: https://lore.kernel.org/r/1eb41bf6c966a0e54820200650d27a5d4f2ac160.1595572867.git.frank@allwinnertech.com

clk: sunxi-ng: sun8i-de2: Sort structures

2020-02-12T18:01:16Z

V3s quirks are not in right place. Move it. Signed-off-by: Jernej Skrabec Signed-off-by: Maxime Ripard

clk: sunxi-ng: sun8i-de2: Add R40 specific quirks

2020-02-12T18:01:11Z

R40 is actually very similar to A64, but it doesn't have mixer1 reset. This means it's clocks and resets combination is unique and R40 specific quirks are needed. Signed-off-by: Jernej Skrabec Signed-off-by: Maxime Ripard

clk: sunxi-ng: sun8i-de2: Add rotation core clocks and reset for A83T

2020-02-12T18:01:07Z

A83T structures don't have clocks and reset for rotation core. Add them. Fixes: 763c5bd045b1 ("clk: sunxi-ng: add support for DE2 CCU") Signed-off-by: Jernej Skrabec Signed-off-by: Maxime Ripard

clk: sunxi-ng: sun8i-de2: Don't reuse A83T resets

2020-02-12T18:01:04Z

Currently, V3s and H3 reuse A83T reset structure. However, A83T contains additional core for rotation, which is not present in V3s and H3. Make new reset structure for H3 and let V3s reuse it. A83T reset structure will be amended in subsequent commit. Signed-off-by: Jernej Skrabec Signed-off-by: Maxime Ripard

clk: sunxi-ng: sun8i-de2: H6 doesn't have rotate core

2020-02-12T18:01:02Z

DE3 documentation regarding presence of rotate core in H6 is a bit confusing. Register descriptions mention bits for enabling rotate core clocks and reset, but general overview doesn't list it as feature of H6 display engine, BSP kernel doesn't support it and there is no interrupt listed for it. Manual poking registers also didn't reveal presence of rotate core. Let's assume there isn't any rotate core on H6 present and remove related clocks. With that done, structures are same as those for H5, so just reuse H5 structure. Fixes: 56808da9f97f ("clk: sunxi-ng: Add support for H6 DE3 clocks") Signed-off-by: Jernej Skrabec Signed-off-by: Maxime Ripard

clk: sunxi-ng: sun8i-de2: Add rotation core clocks and reset for A64

2020-02-12T18:01:00Z

A64 has rotation core which needs clocks and reset. Because there is no appropriate structures available, make a separate, A64 specific structures. Fixes: cf4881c12935 ("clk: sunxi-ng: fix the A64/H5 clock description of DE2 CCU") Signed-off-by: Jernej Skrabec Signed-off-by: Maxime Ripard

clk: sunxi-ng: sun8i-de2: Split out H5 definitions

2020-02-12T18:00:58Z

H5 has less clocks and resets than A64. Currently that's not obvious because A64 is missing rotation core related clocks and reset. Split out H5 definition. A64 structures will be fixed in subsequent commit. Note that this patch depends on commit 19368d99746e ("clk: sunxi-ng: add support for Allwinner H3 DE2 CCU") for the H3 clock list. Fixes: 763c5bd045b1 ("clk: sunxi-ng: add support for DE2 CCU") Signed-off-by: Jernej Skrabec Signed-off-by: Maxime Ripard

clk: sunxi-ng: a64: Export MBUS clock

2020-02-11T06:49:14Z

MBUS clock will be referenced in MBUS controller node. Export it. Signed-off-by: Jernej Skrabec Signed-off-by: Maxime Ripard