wireguard-linux/drivers/clk/ti/clock.h, branch jd/unified-crypt-queue

clk: let init callback return an error code

2019-12-24T02:53:13Z

If the init callback is allowed to request resources, it needs a return value to report the outcome of such a request. Signed-off-by: Jerome Brunet Link: https://lkml.kernel.org/r/20190924123954.31561-3-jbrunet@baylibre.com Reviewed-by: Andrew Lunn Acked-by: Heiko Stuebner Signed-off-by: Stephen Boyd

clk: ti: divider: convert to use min,max,mask instead of width

2019-10-31T13:32:36Z

The existing width field used to check divider validity does not provide enough protection against bad values. For example, if max divider value is 4, the smallest all-1 bitmask that can hold this value is 7, which allows values higher than 4 to be used. This typically causes unpredictable results with hardware. So far this issue hasn't been noticed as most of the dividers actually have maximum values which fit the whole bitfield, but there are certain clocks for which this is a problem, like dpll4_m4 divider on omap3 devices. Thus, convert the whole validity logic to use min,max and mask values for determining if a specific divider is valid or not. This prevents the odd cases where bad value would otherwise be written to a divider config register. Signed-off-by: Tero Kristo Tested-by: Adam Ford

clk: ti: divider: cleanup ti_clk_parse_divider_data API

2019-10-31T13:32:34Z

Cleanup the ti_clk_parse_divider_data to pass the divider data struct directly instead of individual values of it. This makes it easier to modify the implementation later on. Signed-off-by: Tero Kristo Tested-by: Adam Ford

clk: ti: dra7: disable the RNG and TIMER12 clkctrl clocks on HS devices

2019-04-25T17:51:36Z

RNG and TIMER12 are reserved for secure side usage only on HS devices, so disable their clkctrl clocks on HS SoCs also. Signed-off-by: Tero Kristo Tested-by: Andrew F. Davis Signed-off-by: Stephen Boyd

clk: ti: dra7x: prevent non-existing clkctrl clocks from registering

2019-04-25T17:51:33Z

Certain clkctrl clocks (like the USB_OTG_SS4) do not exist on some variants of the dra7x SoC. Append a flag for these clocks and skip the registration in cases where the clocks do not exist. Reported-by: Peter Ujfalusi Signed-off-by: Tero Kristo Signed-off-by: Stephen Boyd

clk: ti: export the omap2_clk_is_hw_omap call

2019-04-25T17:51:12Z

There is one instance outside the TI clock driver that needs the info whether a clock is an OMAP HW clock or not. Thus, move the function declaration into the public header. Signed-off-by: Tero Kristo Signed-off-by: Stephen Boyd

clk: ti: generalize the init sequence of clk_hw_omap clocks

2019-02-15T14:46:22Z

Add a generic API for initializing clocks of clk_hw_omap type clocks, and convert the whole TI clock driver suite to use this for registering the clocks. Also, get rid of the now redundant API for adding the clocks to the OMAP HW clocks list; instead this is used directly from the register API. Signed-off-by: Tero Kristo Acked-by: Tony Lindgren Tested-by: Keerthy

clk: ti: add new API for checking if a provided clock is an OMAP clock

2019-02-15T14:46:21Z

omap2_clk_is_hw_omap can now be used to verify if the provided clk_hw is an omap HW clock or not. This is done to replace the usage of CLK_IS_BASIC flag within the TI clock drivers. Signed-off-by: Tero Kristo Acked-by: Tony Lindgren Tested-by: Keerthy

clk: ti: move clk_hw_omap list handling under generic part of the driver

2019-02-15T14:46:21Z

Currently the clk_hw_omap list is handled under the autoidle code, but it should be accessible generically. Add a few APIs towards this, and update the autoidle code to use the generic implementations. Signed-off-by: Tero Kristo Acked-by: Tony Lindgren Tested-by: Keerthy

clk: ti: Add functions to save/restore clk context

2018-10-03T12:29:19Z

SoCs like AM43XX lose clock registers context during RTC-only suspend. Hence add functions to save/restore the clock registers context. Signed-off-by: Keerthy Signed-off-by: Russ Dill Acked-by: Tony Lindgren Signed-off-by: Tero Kristo