<feed xmlns='http://www.w3.org/2005/Atom'>
<title>wireguard-linux/drivers/cpufreq/Kconfig.arm, branch jd/orphan-parallel</title>
<subtitle>WireGuard for the Linux kernel</subtitle>
<id>https://git.zx2c4.com/wireguard-linux/atom/drivers/cpufreq/Kconfig.arm?h=jd%2Forphan-parallel</id>
<link rel='self' href='https://git.zx2c4.com/wireguard-linux/atom/drivers/cpufreq/Kconfig.arm?h=jd%2Forphan-parallel'/>
<link rel='alternate' type='text/html' href='https://git.zx2c4.com/wireguard-linux/'/>
<updated>2020-09-16T08:42:18Z</updated>
<entry>
<title>cpufreq: arm: Kconfig: add CPUFREQ_DT depend for STI CPUFREQ</title>
<updated>2020-09-16T08:42:18Z</updated>
<author>
<name>Alain Volmat</name>
<email>avolmat@me.com</email>
</author>
<published>2020-08-31T06:10:13Z</published>
<link rel='alternate' type='text/html' href='https://git.zx2c4.com/wireguard-linux/commit/?id=a0d698d8c21aaa71b2a2fc6c938d658797e31911'/>
<id>urn:sha1:a0d698d8c21aaa71b2a2fc6c938d658797e31911</id>
<content type='text'>
The sti cpufreq driver is relying on the CPUFREQ_DT driver
hence add the depends within the Kconfig.arm

Signed-off-by: Alain Volmat &lt;avolmat@me.com&gt;
Signed-off-by: Viresh Kumar &lt;viresh.kumar@linaro.org&gt;
</content>
</entry>
<entry>
<title>cpufreq: Add Tegra194 cpufreq driver</title>
<updated>2020-07-30T05:27:51Z</updated>
<author>
<name>Sumit Gupta</name>
<email>sumitg@nvidia.com</email>
</author>
<published>2020-07-16T08:30:01Z</published>
<link rel='alternate' type='text/html' href='https://git.zx2c4.com/wireguard-linux/commit/?id=df320f89359c0cc22ff552da3ffd07171f7754a6'/>
<id>urn:sha1:df320f89359c0cc22ff552da3ffd07171f7754a6</id>
<content type='text'>
Add support for CPU frequency scaling on Tegra194. The frequency
of each core can be adjusted by writing a clock divisor value to
a MSR on the core. The range of valid divisors is queried from
the BPMP.

Signed-off-by: Mikko Perttunen &lt;mperttunen@nvidia.com&gt;
Signed-off-by: Sumit Gupta &lt;sumitg@nvidia.com&gt;
Signed-off-by: Viresh Kumar &lt;viresh.kumar@linaro.org&gt;
</content>
</entry>
<entry>
<title>cpufreq: imx: Select NVMEM_IMX_OCOTP</title>
<updated>2020-07-30T05:27:50Z</updated>
<author>
<name>Walter Lozano</name>
<email>walter.lozano@collabora.com</email>
</author>
<published>2020-07-14T18:43:56Z</published>
<link rel='alternate' type='text/html' href='https://git.zx2c4.com/wireguard-linux/commit/?id=2782ef34ed230e1b8dbea9ad46e5fc2ca6cfecfb'/>
<id>urn:sha1:2782ef34ed230e1b8dbea9ad46e5fc2ca6cfecfb</id>
<content type='text'>
When probing cpufreq for iMX6 the values in the efuse needs to be
read which requires NVMEM_IMX_OCOTP. If this option is not enabled,
the probe will be deferred forever and cpufreq won't be available.

This patch forces the selection of the required configuration option.

Signed-off-by: Walter Lozano &lt;walter.lozano@collabora.com&gt;
Signed-off-by: Viresh Kumar &lt;viresh.kumar@linaro.org&gt;
</content>
</entry>
<entry>
<title>cpufreq: ap806: fix cpufreq driver needs ap cpu clk</title>
<updated>2020-07-30T05:27:46Z</updated>
<author>
<name>Sven Auhagen</name>
<email>sven.auhagen@voleatech.de</email>
</author>
<published>2020-06-22T12:01:23Z</published>
<link rel='alternate' type='text/html' href='https://git.zx2c4.com/wireguard-linux/commit/?id=8c37ad2f523396e15cf002b29f8f796447c71932'/>
<id>urn:sha1:8c37ad2f523396e15cf002b29f8f796447c71932</id>
<content type='text'>
The Armada 8K cpufreq driver needs the Armada AP CPU CLK
to work. This dependency is currently not satisfied and
the ARMADA_AP_CPU_CLK can not be selected independently.

Add it to the cpufreq Armada8k driver.

Fixes: f525a670533d ("cpufreq: ap806: add cpufreq driver for Armada 8K")
Signed-off-by: Sven Auhagen &lt;sven.auhagen@voleatech.de&gt;
Signed-off-by: Viresh Kumar &lt;viresh.kumar@linaro.org&gt;
</content>
</entry>
<entry>
<title>Merge tag 'arm-drivers-5.8' of git://git.kernel.org/pub/scm/linux/kernel/git/soc/soc</title>
<updated>2020-06-05T02:56:20Z</updated>
<author>
<name>Linus Torvalds</name>
<email>torvalds@linux-foundation.org</email>
</author>
<published>2020-06-05T02:56:20Z</published>
<link rel='alternate' type='text/html' href='https://git.zx2c4.com/wireguard-linux/commit/?id=828f3e18e1cb98c68fc6db4d5113513d4a267775'/>
<id>urn:sha1:828f3e18e1cb98c68fc6db4d5113513d4a267775</id>
<content type='text'>
Pull ARM/SoC driver updates from Arnd Bergmann:
 "These are updates to SoC specific drivers that did not have another
  subsystem maintainer tree to go through for some reason:

   - Some bus and memory drivers for the MIPS P5600 based Baikal-T1 SoC
     that is getting added through the MIPS tree.

   - There are new soc_device identification drivers for TI K3, Qualcomm
     MSM8939

   - New reset controller drivers for NXP i.MX8MP, Renesas RZ/G1H, and
     Hisilicon hi6220

   - The SCMI firmware interface can now work across ARM SMC/HVC as a
     transport.

   - Mediatek platforms now use a new driver for their "MMSYS" hardware
     block that controls clocks and some other aspects in behalf of the
     media and gpu drivers.

   - Some Tegra processors have improved power management support,
     including getting woken up by the PMIC and cluster power down
     during idle.

   - A new v4l staging driver for Tegra is added.

   - Cleanups and minor bugfixes for TI, NXP, Hisilicon, Mediatek, and
     Tegra"

* tag 'arm-drivers-5.8' of git://git.kernel.org/pub/scm/linux/kernel/git/soc/soc: (155 commits)
  clk: sprd: fix compile-testing
  bus: bt1-axi: Build the driver into the kernel
  bus: bt1-apb: Build the driver into the kernel
  bus: bt1-axi: Use sysfs_streq instead of strncmp
  bus: bt1-axi: Optimize the return points in the driver
  bus: bt1-apb: Use sysfs_streq instead of strncmp
  bus: bt1-apb: Use PTR_ERR_OR_ZERO to return from request-regs method
  bus: bt1-apb: Fix show/store callback identations
  bus: bt1-apb: Include linux/io.h
  dt-bindings: memory: Add Baikal-T1 L2-cache Control Block binding
  memory: Add Baikal-T1 L2-cache Control Block driver
  bus: Add Baikal-T1 APB-bus driver
  bus: Add Baikal-T1 AXI-bus driver
  dt-bindings: bus: Add Baikal-T1 APB-bus binding
  dt-bindings: bus: Add Baikal-T1 AXI-bus binding
  staging: tegra-video: fix V4L2 dependency
  tee: fix crypto select
  drivers: soc: ti: knav_qmss_queue: Make knav_gp_range_ops static
  soc: ti: add k3 platforms chipid module driver
  dt-bindings: soc: ti: add binding for k3 platforms chipid module
  ...
</content>
</entry>
<entry>
<title>cpufreq: tegra20: Use generic cpufreq-dt driver (Tegra30 supported now)</title>
<updated>2020-05-06T16:59:38Z</updated>
<author>
<name>Dmitry Osipenko</name>
<email>digetx@gmail.com</email>
</author>
<published>2020-03-19T19:02:26Z</published>
<link rel='alternate' type='text/html' href='https://git.zx2c4.com/wireguard-linux/commit/?id=9ce274630495c731257fb1b569dd7b84a2fdba14'/>
<id>urn:sha1:9ce274630495c731257fb1b569dd7b84a2fdba14</id>
<content type='text'>
Re-parenting to intermediate clock is supported now by the clock driver
and thus there is no need in a customized CPUFreq driver, all that code
is common for both Tegra20 and Tegra30. The available CPU freqs are now
specified in device-tree in a form of OPPs, all users should update their
device-trees.

Acked-by: Viresh Kumar &lt;viresh.kumar@linaro.org&gt;
Acked-by: Peter De Schrijver &lt;pdeschrijver@nvidia.com&gt;
Tested-by: Peter Geis &lt;pgwipeout@gmail.com&gt;
Tested-by: Marcel Ziswiler &lt;marcel@ziswiler.com&gt;
Tested-by: Jasper Korten &lt;jja2000@gmail.com&gt;
Tested-by: David Heidelberg &lt;david@ixit.cz&gt;
Tested-by: Nicolas Chauvet &lt;kwizart@gmail.com&gt;
Signed-off-by: Dmitry Osipenko &lt;digetx@gmail.com&gt;
Signed-off-by: Thierry Reding &lt;treding@nvidia.com&gt;
</content>
</entry>
<entry>
<title>cpufreq: omap: Build driver by default for ARCH_OMAP2PLUS</title>
<updated>2020-04-28T04:15:54Z</updated>
<author>
<name>Anders Roxell</name>
<email>anders.roxell@linaro.org</email>
</author>
<published>2020-04-15T08:15:59Z</published>
<link rel='alternate' type='text/html' href='https://git.zx2c4.com/wireguard-linux/commit/?id=59b55c1f204608cdc2a767c8c969d9ccfd820ec7'/>
<id>urn:sha1:59b55c1f204608cdc2a767c8c969d9ccfd820ec7</id>
<content type='text'>
When building the mult_v7_defconfig, ARM_TI_CPUFREQ doesn't get enabled
evenwhen ARCH_OMAP(3|4) is selected. Build ARM_TI_CPUFREQ by default for
ARCH_OMAP2PLUS.

Signed-off-by: Anders Roxell &lt;anders.roxell@linaro.org&gt;
Signed-off-by: Viresh Kumar &lt;viresh.kumar@linaro.org&gt;
</content>
</entry>
<entry>
<title>cpufreq: qcom: Add support for krait based socs</title>
<updated>2020-03-20T04:29:57Z</updated>
<author>
<name>Ansuel Smith</name>
<email>ansuelsmth@gmail.com</email>
</author>
<published>2020-03-13T17:52:13Z</published>
<link rel='alternate' type='text/html' href='https://git.zx2c4.com/wireguard-linux/commit/?id=a8811ec764f95a04ba82f6f457e28c5e9e36e36b'/>
<id>urn:sha1:a8811ec764f95a04ba82f6f457e28c5e9e36e36b</id>
<content type='text'>
In Certain QCOM SoCs like ipq8064, apq8064, msm8960, msm8974
that has KRAIT processors the voltage/current value of each OPP
varies based on the silicon variant in use.

The required OPP related data is determined based on
the efuse value. This is similar to the existing code for
kryo cores. So adding support for krait cores here.

Signed-off-by: Sricharan R &lt;sricharan@codeaurora.org&gt;
Signed-off-by: Ansuel Smith &lt;ansuelsmth@gmail.com&gt;
Signed-off-by: Viresh Kumar &lt;viresh.kumar@linaro.org&gt;
</content>
</entry>
<entry>
<title>cpufreq: merge arm_big_little and vexpress-spc</title>
<updated>2019-10-21T10:53:58Z</updated>
<author>
<name>Sudeep Holla</name>
<email>sudeep.holla@arm.com</email>
</author>
<published>2019-10-21T10:20:34Z</published>
<link rel='alternate' type='text/html' href='https://git.zx2c4.com/wireguard-linux/commit/?id=a0f950d3a0addc9552233aa2ffbdc086aa02106a'/>
<id>urn:sha1:a0f950d3a0addc9552233aa2ffbdc086aa02106a</id>
<content type='text'>
arm_big_little cpufreq driver was designed as a generic big little
driver that could be used by any platform and make use of bL switcher.
Over years alternate solutions have been designed and merged to deal
with bL/HMP systems like EAS.

Also since no other driver made use of generic arm_big_little cpufreq
driver except Vexpress SPC, we can merge them together as vexpress-spc
driver used only on Vexpress TC2(CA15_CA7) platform.

Acked-by: Nicolas Pitre &lt;nico@fluxnic.net&gt;
Signed-off-by: Sudeep Holla &lt;sudeep.holla@arm.com&gt;
Signed-off-by: Viresh Kumar &lt;viresh.kumar@linaro.org&gt;
</content>
</entry>
<entry>
<title>Merge branch 'cpufreq/qcom-updates' into cpufreq/arm/linux-next</title>
<updated>2019-09-03T02:25:22Z</updated>
<author>
<name>Viresh Kumar</name>
<email>viresh.kumar@linaro.org</email>
</author>
<published>2019-09-03T02:25:22Z</published>
<link rel='alternate' type='text/html' href='https://git.zx2c4.com/wireguard-linux/commit/?id=f75d2accca7785657311653c125bb22f342dc5d9'/>
<id>urn:sha1:f75d2accca7785657311653c125bb22f342dc5d9</id>
<content type='text'>
</content>
</entry>
</feed>
