<feed xmlns='http://www.w3.org/2005/Atom'>
<title>wireguard-linux/drivers/cpufreq, branch stable</title>
<subtitle>WireGuard for the Linux kernel</subtitle>
<id>https://git.zx2c4.com/wireguard-linux/atom/drivers/cpufreq?h=stable</id>
<link rel='self' href='https://git.zx2c4.com/wireguard-linux/atom/drivers/cpufreq?h=stable'/>
<link rel='alternate' type='text/html' href='https://git.zx2c4.com/wireguard-linux/'/>
<updated>2025-10-15T13:21:16Z</updated>
<entry>
<title>cpufreq/amd-pstate: Fix a regression leading to EPP 0 after hibernate</title>
<updated>2025-10-15T13:21:16Z</updated>
<author>
<name>Mario Limonciello (AMD)</name>
<email>superm1@kernel.org</email>
</author>
<published>2025-09-23T15:29:29Z</published>
<link rel='alternate' type='text/html' href='https://git.zx2c4.com/wireguard-linux/commit/?id=85d7dda5a9f665ea579741ec873a8841f37e8943'/>
<id>urn:sha1:85d7dda5a9f665ea579741ec873a8841f37e8943</id>
<content type='text'>
After resuming from S4, all CPUs except the boot CPU have the wrong EPP
hint programmed.  This is because when the CPUs were offlined the EPP value
was reset to 0.

This is a similar problem as fixed by
commit ba3319e590571 ("cpufreq/amd-pstate: Fix a regression leading to EPP
0 after resume") and the solution is also similar.  When offlining rather
than reset the values to zero, reset them to match those chosen by the
policy. When the CPUs are onlined again these values will be restored.

Closes: https://community.frame.work/t/increased-power-usage-after-resuming-from-suspend-on-ryzen-7040-kernel-6-15-regression/74531/20?u=mario_limonciello
Fixes: 608a76b65288 ("cpufreq/amd-pstate: Add support for the "Requested CPU Min frequency" BIOS option")
Reviewed-by: Gautham R. Shenoy &lt;gautham.shenoy@amd.com&gt;
Signed-off-by: Mario Limonciello (AMD) &lt;superm1@kernel.org&gt;
</content>
</entry>
<entry>
<title>Merge tag 'cpufreq-arm-updates-6.18-rc' of git://git.kernel.org/pub/scm/linux/kernel/git/vireshk/pm</title>
<updated>2025-10-01T11:59:28Z</updated>
<author>
<name>Rafael J. Wysocki</name>
<email>rafael.j.wysocki@intel.com</email>
</author>
<published>2025-10-01T11:59:28Z</published>
<link rel='alternate' type='text/html' href='https://git.zx2c4.com/wireguard-linux/commit/?id=fa06c482790ce425dd090c051934023c0b49dcc2'/>
<id>urn:sha1:fa06c482790ce425dd090c051934023c0b49dcc2</id>
<content type='text'>
Merge CPUFreq fixes for 6.18 from Viresh Kumar:

"- Update frequency for all tegra CPUs (Aaron Kling).

 - Fix device leak in mediatek driver (Johan Hovold).

 - Rust cpufreq helper cleanup (Thorsten Blum)."

* tag 'cpufreq-arm-updates-6.18-rc' of git://git.kernel.org/pub/scm/linux/kernel/git/vireshk/pm:
  cpufreq: tegra186: Initialize all cores to max frequencies
  cpufreq: tegra186: Set target frequency for all cpus in policy
  rust: cpufreq: streamline find_supply_names
  cpufreq: mediatek: fix device leak on probe failure
</content>
</entry>
<entry>
<title>ACPI: CPPC: Do not use CPUFREQ_ETERNAL as an error value</title>
<updated>2025-10-01T11:57:13Z</updated>
<author>
<name>Rafael J. Wysocki</name>
<email>rafael.j.wysocki@intel.com</email>
</author>
<published>2025-09-26T10:29:50Z</published>
<link rel='alternate' type='text/html' href='https://git.zx2c4.com/wireguard-linux/commit/?id=c28a280bd465690981099cd6e43dfcfa5c28b133'/>
<id>urn:sha1:c28a280bd465690981099cd6e43dfcfa5c28b133</id>
<content type='text'>
Instead of using CPUFREQ_ETERNAL for signaling an error condition
in cppc_get_transition_latency(), change the return value type of
that function to int and make it return a proper negative error
code on failures.

No intentional functional impact.

Reviewed-by: Mario Limonciello (AMD) &lt;superm1@kernel.org&gt;
Reviewed-by: Jie Zhan &lt;zhanjie9@hisilicon.com&gt;
Signed-off-by: Rafael J. Wysocki &lt;rafael.j.wysocki@intel.com&gt;
Acked-by: Viresh Kumar &lt;viresh.kumar@linaro.org&gt;
Reviewed-by: Qais Yousef &lt;qyousef@layalina.io&gt;
</content>
</entry>
<entry>
<title>cpufreq: CPPC: Avoid using CPUFREQ_ETERNAL as transition delay</title>
<updated>2025-10-01T11:56:57Z</updated>
<author>
<name>Rafael J. Wysocki</name>
<email>rafael.j.wysocki@intel.com</email>
</author>
<published>2025-09-26T10:19:41Z</published>
<link rel='alternate' type='text/html' href='https://git.zx2c4.com/wireguard-linux/commit/?id=f965d111e68f4a993cc44d487d416e3d954eea11'/>
<id>urn:sha1:f965d111e68f4a993cc44d487d416e3d954eea11</id>
<content type='text'>
If cppc_get_transition_latency() returns CPUFREQ_ETERNAL to indicate a
failure to retrieve the transition latency value from the platform
firmware, the CPPC cpufreq driver will use that value (converted to
microseconds) as the policy transition delay, but it is way too large
for any practical use.

Address this by making the driver use the cpufreq's default
transition latency value (in microseconds) as the transition delay
if CPUFREQ_ETERNAL is returned by cppc_get_transition_latency().

Fixes: d4f3388afd48 ("cpufreq / CPPC: Set platform specific transition_delay_us")
Cc: 5.19+ &lt;stable@vger.kernel.org&gt; # 5.19
Signed-off-by: Rafael J. Wysocki &lt;rafael.j.wysocki@intel.com&gt;
Reviewed-by: Mario Limonciello (AMD) &lt;superm1@kernel.org&gt;
Reviewed-by: Jie Zhan &lt;zhanjie9@hisilicon.com&gt;
Acked-by: Viresh Kumar &lt;viresh.kumar@linaro.org&gt;
Reviewed-by: Qais Yousef &lt;qyousef@layalina.io&gt;
</content>
</entry>
<entry>
<title>cpufreq: Make drivers using CPUFREQ_ETERNAL specify transition latency</title>
<updated>2025-10-01T11:56:24Z</updated>
<author>
<name>Rafael J. Wysocki</name>
<email>rafael.j.wysocki@intel.com</email>
</author>
<published>2025-09-26T10:12:37Z</published>
<link rel='alternate' type='text/html' href='https://git.zx2c4.com/wireguard-linux/commit/?id=f97aef092e199c10a3da96ae79b571edd5362faa'/>
<id>urn:sha1:f97aef092e199c10a3da96ae79b571edd5362faa</id>
<content type='text'>
Commit a755d0e2d41b ("cpufreq: Honour transition_latency over
transition_delay_us") caused platforms where cpuinfo.transition_latency
is CPUFREQ_ETERNAL to get a very large transition latency whereas
previously it had been capped at 10 ms (and later at 2 ms).

This led to a user-observable regression between 6.6 and 6.12 as
described by Shawn:

"The dbs sampling_rate was 10000 us on 6.6 and suddently becomes
 6442450 us (4294967295 / 1000 * 1.5) on 6.12 for these platforms
 because the default transition delay was dropped [...].

 It slows down dbs governor's reacting to CPU loading change
 dramatically.  Also, as transition_delay_us is used by schedutil
 governor as rate_limit_us, it shows a negative impact on device
 idle power consumption, because the device gets slightly less time
 in the lowest OPP."

Evidently, the expectation of the drivers using CPUFREQ_ETERNAL as
cpuinfo.transition_latency was that it would be capped by the core,
but they may as well return a default transition latency value instead
of CPUFREQ_ETERNAL and the core need not do anything with it.

Accordingly, introduce CPUFREQ_DEFAULT_TRANSITION_LATENCY_NS and make
all of the drivers in question use it instead of CPUFREQ_ETERNAL.  Also
update the related Rust binding.

Fixes: a755d0e2d41b ("cpufreq: Honour transition_latency over transition_delay_us")
Closes: https://lore.kernel.org/linux-pm/20250922125929.453444-1-shawnguo2@yeah.net/
Reported-by: Shawn Guo &lt;shawnguo@kernel.org&gt;
Reviewed-by: Mario Limonciello (AMD) &lt;superm1@kernel.org&gt;
Reviewed-by: Jie Zhan &lt;zhanjie9@hisilicon.com&gt;
Acked-by: Viresh Kumar &lt;viresh.kumar@linaro.org&gt;
Cc: 6.6+ &lt;stable@vger.kernel.org&gt; # 6.6+
Signed-off-by: Rafael J. Wysocki &lt;rafael.j.wysocki@intel.com&gt;
Link: https://patch.msgid.link/2264949.irdbgypaU6@rafael.j.wysocki
[ rjw: Fix typo in new symbol name, drop redundant type cast from Rust binding ]
Tested-by: Shawn Guo &lt;shawnguo@kernel.org&gt; # with cpufreq-dt driver
Reviewed-by: Qais Yousef &lt;qyousef@layalina.io&gt;
Signed-off-by: Rafael J. Wysocki &lt;rafael.j.wysocki@intel.com&gt;
</content>
</entry>
<entry>
<title>cpufreq: tegra186: Initialize all cores to max frequencies</title>
<updated>2025-09-29T09:25:50Z</updated>
<author>
<name>Aaron Kling</name>
<email>webgeek1234@gmail.com</email>
</author>
<published>2025-08-29T02:48:13Z</published>
<link rel='alternate' type='text/html' href='https://git.zx2c4.com/wireguard-linux/commit/?id=ba6018929165fc914c665f071f8e8cdbac844a49'/>
<id>urn:sha1:ba6018929165fc914c665f071f8e8cdbac844a49</id>
<content type='text'>
During initialization, the EDVD_COREx_VOLT_FREQ registers for some cores
are still at reset values and not reflecting the actual frequency. This
causes get calls to fail. Set all cores to their respective max
frequency during probe to initialize the registers to working values.

Suggested-by: Mikko Perttunen &lt;mperttunen@nvidia.com&gt;
Signed-off-by: Aaron Kling &lt;webgeek1234@gmail.com&gt;
Reviewed-by: Mikko Perttunen &lt;mperttunen@nvidia.com&gt;
Signed-off-by: Viresh Kumar &lt;viresh.kumar@linaro.org&gt;
</content>
</entry>
<entry>
<title>cpufreq: tegra186: Set target frequency for all cpus in policy</title>
<updated>2025-09-29T09:25:35Z</updated>
<author>
<name>Aaron Kling</name>
<email>webgeek1234@gmail.com</email>
</author>
<published>2025-08-29T02:48:12Z</published>
<link rel='alternate' type='text/html' href='https://git.zx2c4.com/wireguard-linux/commit/?id=0b1bb980fd7cae126ee3d59f817068a13e321b07'/>
<id>urn:sha1:0b1bb980fd7cae126ee3d59f817068a13e321b07</id>
<content type='text'>
The original commit set all cores in a cluster to a shared policy, but
did not update set_target to apply a frequency change to all cores for
the policy. This caused most cores to remain stuck at their boot
frequency.

Fixes: be4ae8c19492 ("cpufreq: tegra186: Share policy per cluster")
Signed-off-by: Aaron Kling &lt;webgeek1234@gmail.com&gt;
Reviewed-by: Mikko Perttunen &lt;mperttunen@nvidia.com&gt;
Signed-off-by: Viresh Kumar &lt;viresh.kumar@linaro.org&gt;
</content>
</entry>
<entry>
<title>rust: cpufreq: streamline find_supply_names</title>
<updated>2025-09-29T09:10:46Z</updated>
<author>
<name>Thorsten Blum</name>
<email>thorsten.blum@linux.dev</email>
</author>
<published>2025-09-15T13:59:54Z</published>
<link rel='alternate' type='text/html' href='https://git.zx2c4.com/wireguard-linux/commit/?id=24287f902095d845c6af9c2c369ba96877f5eb79'/>
<id>urn:sha1:24287f902095d845c6af9c2c369ba96877f5eb79</id>
<content type='text'>
Remove local variables from find_supply_names() and use .and_then() with
the more concise kernel::kvec![] macro, instead of KVec::with_capacity()
followed by .push() and Some().

No functional changes intended.

Signed-off-by: Thorsten Blum &lt;thorsten.blum@linux.dev&gt;
Signed-off-by: Viresh Kumar &lt;viresh.kumar@linaro.org&gt;
</content>
</entry>
<entry>
<title>cpufreq: mediatek: fix device leak on probe failure</title>
<updated>2025-09-29T09:10:46Z</updated>
<author>
<name>Johan Hovold</name>
<email>johan@kernel.org</email>
</author>
<published>2025-09-09T07:38:19Z</published>
<link rel='alternate' type='text/html' href='https://git.zx2c4.com/wireguard-linux/commit/?id=ebc4ed14a4dbf51307102bb7ffc82ed6c16a37c2'/>
<id>urn:sha1:ebc4ed14a4dbf51307102bb7ffc82ed6c16a37c2</id>
<content type='text'>
Make sure to drop the reference to the cci device taken by
of_find_device_by_node() on probe failure (e.g. probe deferral).

Fixes: 0daa47325bae ("cpufreq: mediatek: Link CCI device to CPU")
Cc: Jia-Wei Chang &lt;jia-wei.chang@mediatek.com&gt;
Cc: Rex-BC Chen &lt;rex-bc.chen@mediatek.com&gt;
Signed-off-by: Johan Hovold &lt;johan@kernel.org&gt;
Reviewed-by: AngeloGioacchino Del Regno &lt;angelogioacchino.delregno@collabora.com&gt;
Reviewed-by: Chen-Yu Tsai &lt;wenst@chromium.org&gt;
Signed-off-by: Viresh Kumar &lt;viresh.kumar@linaro.org&gt;
</content>
</entry>
<entry>
<title>Merge back earlier cpufreq material for 6.18</title>
<updated>2025-09-24T19:32:28Z</updated>
<author>
<name>Rafael J. Wysocki</name>
<email>rafael.j.wysocki@intel.com</email>
</author>
<published>2025-09-24T19:32:28Z</published>
<link rel='alternate' type='text/html' href='https://git.zx2c4.com/wireguard-linux/commit/?id=c51f0d3b6ef1d1e40b6d7a5db76fadc034a98109'/>
<id>urn:sha1:c51f0d3b6ef1d1e40b6d7a5db76fadc034a98109</id>
<content type='text'>
</content>
</entry>
</feed>
