wireguard-linux/drivers/crypto/hisilicon/sec2, branch jd/unified-crypt-queue

crypto: hisilicon/sec2 - Add new create qp process

2020-03-20T03:36:50Z

Combine found device and created qp into one operation instead of found device and create qp both are independent operations. when execute multiple tasks, the different threads may find same device at the same time, but the number of queues is insufficient on the device. causing one of threads fail to create a qp. Now fix this, First find device then create qp, if result failure. the current thread will find next device. Signed-off-by: Kai Ye Signed-off-by: Shukun Tan Reviewed-by: Zhou Wang Reviewed-by: Zaibo Xu Signed-off-by: Herbert Xu

crypto: hisilicon/sec2 - Add pbuffer mode for SEC driver

2020-03-12T12:00:14Z

In the scenario of SMMU translation, the SEC performance of short messages (<512Bytes) cannot meet our expectations. To avoid this, we reserve the plat buffer (PBUF) memory for small packets when creating TFM. Signed-off-by: Longfang Liu Signed-off-by: Zaibo Xu Reviewed-by: Jonathan Cameron Signed-off-by: Herbert Xu

crypto: hisilicon/sec2 - Update IV and MAC operation

2020-03-12T12:00:14Z

We have updated the operation method of IV and MAC address to prepare for pbuf patch and fixed coding style. Signed-off-by: Longfang Liu Signed-off-by: Zaibo Xu Reviewed-by: Jonathan Cameron Signed-off-by: Herbert Xu

crypto: hisilicon/sec2 - Add iommu status check

2020-03-12T12:00:14Z

In order to improve performance of small packets (<512Bytes) in SMMU translation scenario, we need to identify the type of IOMMU in the SEC probe to process small packets by a different method. Signed-off-by: Longfang Liu Signed-off-by: Zaibo Xu Reviewed-by: Jonathan Cameron Signed-off-by: Herbert Xu

crypto: hisilicon/sec2 - Add workqueue for SEC driver.

2020-03-12T12:00:14Z

Allocate one workqueue for each QM instead of one for all QMs, we found the throughput of SEC engine can be increased to the hardware limit throughput during testing sec2 performance. so we added this scheme. Signed-off-by: Ye Kai Signed-off-by: Longfang Liu Signed-off-by: Zaibo Xu Reviewed-by: Jonathan Cameron Signed-off-by: Herbert Xu

crypto: hisilicon - remove redundant assignment of pointer ctx

2020-02-28T00:43:21Z

Pointer ctx is being re-assigned with the same value as it was initialized with. The second assignment is redundant and can be removed. Addresses-Coverity: ("Unused value") Signed-off-by: Colin Ian King Signed-off-by: Herbert Xu

crypto: hisilicon - Unify error detect process into qm

2020-02-13T08:58:08Z

In error detect process, a lot of duplicate code can put into qm. We add two callback(get_dev_hw_err_status and log_dev_hw_err) into struct hisi_qm_err_ini to handle device error detect, meanwhile the qm error detect not changed. Signed-off-by: Shukun Tan Signed-off-by: Zaibo Xu Reviewed-by: Zhou Wang Signed-off-by: Herbert Xu

crypto: hisilicon - Unify hardware error init/uninit into QM

2020-02-13T08:58:08Z

The initialization and uninitialization of zip/hpre/sec/qm hardware error is processed in respective drivers, which could be unified into qm.c. We add struct hisi_qm_err_ini into struct hisi_qm, which involve all error handlers of device and assignment should be done in driver probe. Signed-off-by: Shukun Tan Signed-off-by: Zaibo Xu Reviewed-by: Zhou Wang Signed-off-by: Herbert Xu

crypto: hisilicon - fix spelling mistake "disgest" -> "digest"

2020-01-22T08:21:11Z

There is a spelling mistake in an error message. Fix it. Signed-off-by: Colin Ian King Signed-off-by: Herbert Xu

crypto: hisilicon - Add aead support on SEC2

2020-01-16T07:18:15Z

authenc(hmac(sha1),cbc(aes)), authenc(hmac(sha256),cbc(aes)), and authenc(hmac(sha512),cbc(aes)) support are added for SEC v2. Signed-off-by: Zaibo Xu Signed-off-by: Herbert Xu