<feed xmlns='http://www.w3.org/2005/Atom'>
<title>wireguard-linux/drivers/dma, branch stable</title>
<subtitle>WireGuard for the Linux kernel</subtitle>
<id>https://git.zx2c4.com/wireguard-linux/atom/drivers/dma?h=stable</id>
<link rel='self' href='https://git.zx2c4.com/wireguard-linux/atom/drivers/dma?h=stable'/>
<link rel='alternate' type='text/html' href='https://git.zx2c4.com/wireguard-linux/'/>
<updated>2025-10-06T17:37:06Z</updated>
<entry>
<title>Merge tag 'dmaengine-6.18-rc1' of git://git.kernel.org/pub/scm/linux/kernel/git/vkoul/dmaengine</title>
<updated>2025-10-06T17:37:06Z</updated>
<author>
<name>Linus Torvalds</name>
<email>torvalds@linux-foundation.org</email>
</author>
<published>2025-10-06T17:37:06Z</published>
<link rel='alternate' type='text/html' href='https://git.zx2c4.com/wireguard-linux/commit/?id=e4c0fdd5af4c590ca07880b97e286c6532437658'/>
<id>urn:sha1:e4c0fdd5af4c590ca07880b97e286c6532437658</id>
<content type='text'>
Pull dmaengine updates from Vinod Koul:
 "A couple of new device support and small driver updates for this
  round.

  New support:
   - Intel idxd Wildcat Lake family support
   - SpacemiT K1 PDMA controller support
   - Renesas RZ/G3E family support

  Updates:
   - Xilinx shutdown support and dma client properties update
   - Designware edma callback_result support"

* tag 'dmaengine-6.18-rc1' of git://git.kernel.org/pub/scm/linux/kernel/git/vkoul/dmaengine:
  dt-bindings: dma: rz-dmac: Document RZ/G3E family of SoCs
  dmaengine: dw-edma: Set status for callback_result
  dmaengine: mv_xor: match alloc_wc and free_wc
  dmaengine: mmp_pdma: Add SpacemiT K1 PDMA support with 64-bit addressing
  dmaengine: mmp_pdma: Add operations structure for controller abstraction
  dmaengine: mmp_pdma: Add reset controller support
  dmaengine: mmp_pdma: Add clock support
  dt-bindings: dma: Add SpacemiT K1 PDMA controller
  dt-bindings: dmaengine: xilinx_dma: Remove DMA client properties
  dmaengine: Fix dma_async_tx_descriptor-&gt;tx_submit documentation
  dmaengine: xilinx_dma: Support descriptor setup from dma_vecs
  dmaengine: sh: setup_xref error handling
  dmaengine: Replace zero-length array with flexible-array
  dmaengine: ppc4xx: Remove space before newline
  dmaengine: idxd: Add a new IAA device ID for Wildcat Lake family platforms
  dmaengine: idxd: Replace memset(0) + strscpy() with strscpy_pad()
  dt-bindings: dma: nvidia,tegra20-apbdma: Add undocumented compatibles and "clock-names"
  dmaengine: zynqmp_dma: Add shutdown operation support
</content>
</entry>
<entry>
<title>Merge tag 'vfio-v6.18-rc1' of https://github.com/awilliam/linux-vfio</title>
<updated>2025-10-04T15:24:54Z</updated>
<author>
<name>Linus Torvalds</name>
<email>torvalds@linux-foundation.org</email>
</author>
<published>2025-10-04T15:24:54Z</published>
<link rel='alternate' type='text/html' href='https://git.zx2c4.com/wireguard-linux/commit/?id=55a42f78ffd386e01a5404419f8c5ded7db70a21'/>
<id>urn:sha1:55a42f78ffd386e01a5404419f8c5ded7db70a21</id>
<content type='text'>
Pull VFIO updates from Alex Williamson:

 - Use fdinfo to expose the sysfs path of a device represented by a vfio
   device file (Alex Mastro)

 - Mark vfio-fsl-mc, vfio-amba, and the reset functions for
   vfio-platform for removal as these are either orphaned or believed to
   be unused (Alex Williamson)

 - Add reviewers for vfio-platform to save it from also being marked for
   removal (Mostafa Saleh, Pranjal Shrivastava)

 - VFIO selftests, including basic sanity testing and minimal userspace
   drivers for testing against real hardware. This is also expected to
   provide integration with KVM selftests for KVM-VFIO interfaces (David
   Matlack, Josh Hilke)

 - Fix drivers/cdx and vfio/cdx to build without CONFIG_GENERIC_MSI_IRQ
   (Nipun Gupta)

 - Fix reference leak in hisi_acc (Miaoqian Lin)

 - Use consistent return for unsupported device feature (Alex Mastro)

 - Unwind using the correct memory free callback in vfio/pds (Zilin
   Guan)

 - Use IRQ_DISABLE_LAZY flag to improve handling of pre-PCI2.3 INTx and
   resolve stalled interrupt on ppc64 (Timothy Pearson)

 - Enable GB300 in nvgrace-gpu vfio-pci variant driver (Tushar Dave)

 - Misc:
    - Drop unnecessary ternary conversion in vfio/pci (Xichao Zhao)
    - Grammatical fix in nvgrace-gpu (Morduan Zang)
    - Update Shameer's email address (Shameer Kolothum)
    - Fix document build warning (Alex Williamson)

* tag 'vfio-v6.18-rc1' of https://github.com/awilliam/linux-vfio: (48 commits)
  vfio/nvgrace-gpu: Add GB300 SKU to the devid table
  vfio/pci: Fix INTx handling on legacy non-PCI 2.3 devices
  vfio/pds: replace bitmap_free with vfree
  vfio: return -ENOTTY for unsupported device feature
  hisi_acc_vfio_pci: Fix reference leak in hisi_acc_vfio_debug_init
  vfio/platform: Mark reset drivers for removal
  vfio/amba: Mark for removal
  MAINTAINERS: Add myself as VFIO-platform reviewer
  MAINTAINERS: Add myself as VFIO-platform reviewer
  docs: proc.rst: Fix VFIO Device title formatting
  vfio: selftests: Fix .gitignore for already tracked files
  vfio/cdx: update driver to build without CONFIG_GENERIC_MSI_IRQ
  cdx: don't select CONFIG_GENERIC_MSI_IRQ
  MAINTAINERS: Update Shameer Kolothum's email address
  vfio: selftests: Add a script to help with running VFIO selftests
  vfio: selftests: Make iommufd the default iommu_mode
  vfio: selftests: Add iommufd mode
  vfio: selftests: Add iommufd_compat_type1{,v2} modes
  vfio: selftests: Add vfio_type1v2_mode
  vfio: selftests: Replicate tests across all iommu_modes
  ...
</content>
</entry>
<entry>
<title>dmaengine: dw: dmamux: Fix device reference leak in rzn1_dmamux_route_allocate</title>
<updated>2025-09-02T09:31:51Z</updated>
<author>
<name>Miaoqian Lin</name>
<email>linmq006@gmail.com</email>
</author>
<published>2025-09-02T09:03:58Z</published>
<link rel='alternate' type='text/html' href='https://git.zx2c4.com/wireguard-linux/commit/?id=aa2e1e4563d3ab689ffa86ca1412ecbf9fd3b308'/>
<id>urn:sha1:aa2e1e4563d3ab689ffa86ca1412ecbf9fd3b308</id>
<content type='text'>
The reference taken by of_find_device_by_node()
must be released when not needed anymore.
Add missing put_device() call to fix device reference leaks.

Fixes: 134d9c52fca2 ("dmaengine: dw: dmamux: Introduce RZN1 DMA router support")
Cc: stable@vger.kernel.org
Signed-off-by: Miaoqian Lin &lt;linmq006@gmail.com&gt;
Reviewed-by: Miquel Raynal &lt;miquel.raynal@bootlin.com&gt;
Link: https://lore.kernel.org/r/20250902090358.2423285-1-linmq006@gmail.com
Signed-off-by: Vinod Koul &lt;vkoul@kernel.org&gt;
</content>
</entry>
<entry>
<title>dmaengine: dw-edma: Set status for callback_result</title>
<updated>2025-09-02T07:14:45Z</updated>
<author>
<name>Devendra K Verma</name>
<email>devverma@amd.com</email>
</author>
<published>2025-08-21T12:15:05Z</published>
<link rel='alternate' type='text/html' href='https://git.zx2c4.com/wireguard-linux/commit/?id=5e742de97c806a4048418237ef1283e7d71eaf4b'/>
<id>urn:sha1:5e742de97c806a4048418237ef1283e7d71eaf4b</id>
<content type='text'>
DMA Engine has support for the callback_result which provides
the status of the request and the residue. This helps in
determining the correct status of the request and in
efficient resource management of the request.
The 'callback_result' method is preferred over the deprecated
'callback' method.

Signed-off-by: Devendra K Verma &lt;devverma@amd.com&gt;
Link: https://lore.kernel.org/r/20250821121505.318179-1-devverma@amd.com
Signed-off-by: Vinod Koul &lt;vkoul@kernel.org&gt;
</content>
</entry>
<entry>
<title>dmaengine: mv_xor: match alloc_wc and free_wc</title>
<updated>2025-09-02T07:11:17Z</updated>
<author>
<name>Rosen Penev</name>
<email>rosenp@gmail.com</email>
</author>
<published>2025-08-21T22:09:42Z</published>
<link rel='alternate' type='text/html' href='https://git.zx2c4.com/wireguard-linux/commit/?id=a33e3b667d2f004fdfae6b442bd4676f6c510abb'/>
<id>urn:sha1:a33e3b667d2f004fdfae6b442bd4676f6c510abb</id>
<content type='text'>
dma_alloc_wc is used but not dma_free_wc.

Signed-off-by: Rosen Penev &lt;rosenp@gmail.com&gt;
Link: https://lore.kernel.org/r/20250821220942.10578-1-rosenp@gmail.com
Signed-off-by: Vinod Koul &lt;vkoul@kernel.org&gt;
</content>
</entry>
<entry>
<title>dmaengine: mmp_pdma: Add SpacemiT K1 PDMA support with 64-bit addressing</title>
<updated>2025-09-02T07:07:42Z</updated>
<author>
<name>Guodong Xu</name>
<email>guodong@riscstar.com</email>
</author>
<published>2025-08-22T03:06:31Z</published>
<link rel='alternate' type='text/html' href='https://git.zx2c4.com/wireguard-linux/commit/?id=5cfe585d8624f7482505183dd0e4c534b061e822'/>
<id>urn:sha1:5cfe585d8624f7482505183dd0e4c534b061e822</id>
<content type='text'>
Add support for SpacemiT K1 PDMA controller which features 64-bit
addressing capabilities.

The SpacemiT K1 PDMA extends the descriptor format with additional
32-bit words for high address bits, enabling access to memory beyond
4GB boundaries. The new spacemit_k1_pdma_ops provides necessary 64-bit
address handling functions and k1 specific controller configurations.

Key changes:
- Add ARCH_SPACEMIT dependency to Kconfig
- Define new high 32-bit address registers (DDADRH, DSADRH, DTADRH)
- Add DCSR_LPAEEN bit for Long Physical Address Extension Enable
- Implement 64-bit operations for SpacemiT K1 PDMA

Signed-off-by: Guodong Xu &lt;guodong@riscstar.com&gt;
Link: https://lore.kernel.org/r/20250822-working_dma_0701_v2-v5-5-f5c0eda734cc@riscstar.com
Signed-off-by: Vinod Koul &lt;vkoul@kernel.org&gt;
</content>
</entry>
<entry>
<title>dmaengine: mmp_pdma: Add operations structure for controller abstraction</title>
<updated>2025-09-02T07:07:42Z</updated>
<author>
<name>Guodong Xu</name>
<email>guodong@riscstar.com</email>
</author>
<published>2025-08-22T03:06:30Z</published>
<link rel='alternate' type='text/html' href='https://git.zx2c4.com/wireguard-linux/commit/?id=35e40bf761fcb24b1355d6a8d48b5b10683fe1a3'/>
<id>urn:sha1:35e40bf761fcb24b1355d6a8d48b5b10683fe1a3</id>
<content type='text'>
Introduce mmp_pdma_ops structure to abstract 32-bit addressing operations
and enable support for different controller variants. This prepares for
adding 64-bit addressing support.

The ops structure includes:
- Hardware register operations (read/write DDADR, DSADR, DTADR)
- Descriptor memory operations (manipulate descriptor structs)
- Controller configuration (run bits, DMA mask)

Convert existing 32-bit operations to use the new abstraction layer
while maintaining backward compatibility.

Cc: Dan Carpenter &lt;dan.carpenter@linaro.org&gt;
Signed-off-by: Guodong Xu &lt;guodong@riscstar.com&gt;
Link: https://lore.kernel.org/r/20250822-working_dma_0701_v2-v5-4-f5c0eda734cc@riscstar.com
Signed-off-by: Vinod Koul &lt;vkoul@kernel.org&gt;
</content>
</entry>
<entry>
<title>dmaengine: mmp_pdma: Add reset controller support</title>
<updated>2025-09-02T07:07:42Z</updated>
<author>
<name>Guodong Xu</name>
<email>guodong@riscstar.com</email>
</author>
<published>2025-08-22T03:06:29Z</published>
<link rel='alternate' type='text/html' href='https://git.zx2c4.com/wireguard-linux/commit/?id=fc72462bc6107b8babda05cad5bf8f7daf8bec20'/>
<id>urn:sha1:fc72462bc6107b8babda05cad5bf8f7daf8bec20</id>
<content type='text'>
Add support to acquire and deassert an optional hardware reset controller
during mmp_pdma_probe(). It is optional because in Marvell devices
such as "marvell,pdma-1.0" the resets property is not a required
property. But in SpacemiT K1 PDMA, "spacemit,k1-pdma" as the dt
binding schema file stated, resets is required.

Signed-off-by: Guodong Xu &lt;guodong@riscstar.com&gt;
Link: https://lore.kernel.org/r/20250822-working_dma_0701_v2-v5-3-f5c0eda734cc@riscstar.com
Signed-off-by: Vinod Koul &lt;vkoul@kernel.org&gt;
</content>
</entry>
<entry>
<title>dmaengine: mmp_pdma: Add clock support</title>
<updated>2025-09-02T07:07:41Z</updated>
<author>
<name>Guodong Xu</name>
<email>guodong@riscstar.com</email>
</author>
<published>2025-08-22T03:06:28Z</published>
<link rel='alternate' type='text/html' href='https://git.zx2c4.com/wireguard-linux/commit/?id=e73a9a13c99c5a55abfdb8c273651509be1eb5bb'/>
<id>urn:sha1:e73a9a13c99c5a55abfdb8c273651509be1eb5bb</id>
<content type='text'>
Add support for retrieving and enabling an optional clock during
mmp_pdma_probe(). It is optional because in Marvell devices
such as "marvell,pdma-1.0" the clocks property is not a required
property. But in SpacemiT K1 PDMA, "spacemit,k1-pdma" as the dt
binding schema file stated, clocks is required.

Signed-off-by: Guodong Xu &lt;guodong@riscstar.com&gt;
Link: https://lore.kernel.org/r/20250822-working_dma_0701_v2-v5-2-f5c0eda734cc@riscstar.com
Signed-off-by: Vinod Koul &lt;vkoul@kernel.org&gt;
</content>
</entry>
<entry>
<title>dmaengine: xilinx_dma: Support descriptor setup from dma_vecs</title>
<updated>2025-09-02T07:04:19Z</updated>
<author>
<name>Folker Schwesinger</name>
<email>dev@folker-schwesinger.de</email>
</author>
<published>2025-08-26T18:21:10Z</published>
<link rel='alternate' type='text/html' href='https://git.zx2c4.com/wireguard-linux/commit/?id=38433a6fdfb75d12a90ffff262705e1ecfe88556'/>
<id>urn:sha1:38433a6fdfb75d12a90ffff262705e1ecfe88556</id>
<content type='text'>
The DMAEngine provides an interface for obtaining DMA transaction
descriptors from an array of scatter gather buffers represented by
struct dma_vec. This interface is used in the DMABUF API of the IIO
framework [1][2].
To enable DMABUF support through the IIO framework for the Xilinx DMA,
implement callback .device_prep_peripheral_dma_vec() of struct
dma_device in the driver.

[1]: 7a86d469983a ("iio: buffer-dmaengine: Support new DMABUF based userspace API")
[2]: 5878853fc938 ("dmaengine: Add API function dmaengine_prep_peripheral_dma_vec()")

Signed-off-by: Folker Schwesinger &lt;dev@folker-schwesinger.de&gt;
Reviewed-by: Suraj Gupta &lt;suraj.gupta2@amd.com&gt;
Reviewed-by: Radhey Shyam Pandey &lt;radhey.shyam.pandey@amd.com&gt;
Link: https://lore.kernel.org/r/DCCKQLKOZC06.2H6LJ8RJQJNV2@folker-schwesinger.de
Signed-off-by: Vinod Koul &lt;vkoul@kernel.org&gt;
</content>
</entry>
</feed>
