wireguard-linux/drivers/gpu/drm/amd/amdgpu/amdgpu_ras_eeprom.c, branch jd/bump-compilersWireGuard for the Linux kernelhttps://git.zx2c4.com/wireguard-linux/atom/drivers/gpu/drm/amd/amdgpu/amdgpu_ras_eeprom.c?h=jd%2Fbump-compilers2024-07-24T21:30:23Zdrm/amdgpu: Fix eeprom max record count2024-07-24T21:30:23ZStanley.YangStanley.Yang@amd.com2024-07-18T02:58:04Zurn:sha1:1a8825259a9ccc53faddcdec24cf94e0a36b32cc
The eeprom table is empty before initializing,
set eeprom table version first before initializing.
Changed from V1:
Reuse amdgpu_ras_set_eeprom_table_version function
Signed-off-by: Stanley.Yang <Stanley.Yang@amd.com>
Reviewed-by: Hawking Zhang <Hawking.Zhang@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
(cherry picked from commit 015b8a2fdf39a4c288ff24e7b715b8d9198e56dc)
drm/amdgpu: add RAS is_rma flag2024-06-05T15:25:14ZTao Zhoutao.zhou1@amd.com2024-05-23T03:23:20Zurn:sha1:b95fa494d6b74c30eeb4a50481aa1041c631754e
Set the flag to true if bad page number reaches threshold.
Signed-off-by: Tao Zhou <tao.zhou1@amd.com>
Reviewed-by: Hawking Zhang <Hawking.Zhang@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
drm/amdgpu: Add smu v13_0_14 ip block2024-05-02T19:49:11ZHawking ZhangHawking.Zhang@amd.com2024-04-30T16:12:34Zurn:sha1:a6bcffa596770b0c54b3ddccbc115bdab4df08e9
Add smu v13_0_14 ip block support
Signed-off-by: Hawking Zhang <Hawking.Zhang@amd.com>
Reviewed-by: Le Ma <Le.Ma@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
drm/amdgpu: Update setting EEPROM table version2024-03-20T17:38:15ZCandice Licandice.li@amd.com2024-03-18T03:23:39Zurn:sha1:f26c4e3fc999fd90d65ef5bc517a0323b27c43fb
Use helper function instead of umc callback to set
EEPROM table version.
Signed-off-by: Candice Li <candice.li@amd.com>
Reviewed-by: Hawking Zhang <Hawking.Zhang@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
drm/amdgpu: send smu rma reason event in ras eeprom driver2024-02-12T21:08:27ZYang Wangkevinyang.wang@amd.com2024-02-07T01:56:34Zurn:sha1:f579c06bdc9b49a4c70e57683690aacf6eb0e877
send smu rma reason event to smu in ras eeprom driver.
Signed-off-by: Yang Wang <kevinyang.wang@amd.com>
Reviewed-by: Tao Zhou <tao.zhou1@amd.com>
Reviewed-by: Hawking Zhang <Hawking.Zhang@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
drm/amdgpu: Update EEPROM I2C address for smu v13_0_02023-11-29T21:49:23ZCandice Licandice.li@amd.com2023-11-24T01:33:47Zurn:sha1:ca0ad76089a8171d7a075e50b7beecf092f8fd0c
Check smu v13_0_0 SKU type to select EEPROM I2C address.
Signed-off-by: Candice Li <candice.li@amd.com>
Reviewed-by: Hawking Zhang <Hawking.Zhang@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
drm/amdgpu: Fix complex macros error2023-10-05T21:59:35ZSrinivasan Shanmugamsrinivasan.shanmugam@amd.com2023-09-30T06:25:11Zurn:sha1:2b6b29f33fddc8d61527d5f5cf1dec9e1821b16c
Fixes the below:
ERROR: Macros with complex values should be enclosed in parentheses
WARNING: macros should not use a trailing semicolon
+#define amdgpu_inc_vram_lost(adev) atomic_inc(&((adev)->vram_lost_counter));
Cc: Christian König <christian.koenig@amd.com>
Cc: Alex Deucher <alexander.deucher@amd.com>
Cc: "Pan, Xinhui" <Xinhui.Pan@amd.com>
Signed-off-by: Srinivasan Shanmugam <srinivasan.shanmugam@amd.com>
Reviewed-by: Christian König <christian.koenig@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
drm/amdgpu: change if condition for bad channel bitmap update2023-09-26T20:54:52ZTao Zhoutao.zhou1@amd.com2023-09-19T08:00:19Zurn:sha1:8c14a67bdfab8e52e016a51fb2c34d26edb520ae
The amdgpu_ras_eeprom_control.bad_channel_bitmap is u32 type, but the
channel index could be larger than 32. For the ASICs whose channel
number is more than 32, the amdgpu_dpm_send_hbm_bad_channel_flag
interface is not supported, so we simply bypass channel bitmap update under
this condition.
v2: replace sizeof with BITS_PER_TYPE, we should check bit number
instead of byte number.
Signed-off-by: Tao Zhou <tao.zhou1@amd.com>
Reviewed-by: Hawking Zhang <Hawking.Zhang@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
drm/amdgpu: Use function for IP version check2023-09-20T16:23:28ZLijo Lazarlijo.lazar@amd.com2023-09-11T08:18:11Zurn:sha1:4e8303cf2c4dd27374a16a8881ec1a1cd5baf86f
Use an inline function for version check. Gives more flexibility to
handle any format changes.
Signed-off-by: Lijo Lazar <lijo.lazar@amd.com>
Reviewed-by: Alex Deucher <alexander.deucher@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
drm/amdgpu: Only support RAS EEPROM on dGPU platform2023-08-30T18:57:26ZCandice Licandice.li@amd.com2023-08-16T13:33:04Zurn:sha1:46963ed58545284ada1b73e63f1eab73c87ceb24
RAS EEPROM device is only supported on dGPU platform for smu v13_0_6.
Signed-off-by: Candice Li <candice.li@amd.com>
Reviewed-by: Hawking Zhang <Hawking.Zhang@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>