<feed xmlns='http://www.w3.org/2005/Atom'>
<title>wireguard-linux/drivers/gpu/drm/amd/amdgpu/si_dma.c, branch jd/bump-compilers</title>
<subtitle>WireGuard for the Linux kernel</subtitle>
<id>https://git.zx2c4.com/wireguard-linux/atom/drivers/gpu/drm/amd/amdgpu/si_dma.c?h=jd%2Fbump-compilers</id>
<link rel='self' href='https://git.zx2c4.com/wireguard-linux/atom/drivers/gpu/drm/amd/amdgpu/si_dma.c?h=jd%2Fbump-compilers'/>
<link rel='alternate' type='text/html' href='https://git.zx2c4.com/wireguard-linux/'/>
<updated>2024-04-26T21:22:39Z</updated>
<entry>
<title>drm/amdgpu: add protype for print ip state</title>
<updated>2024-04-26T21:22:39Z</updated>
<author>
<name>Sunil Khatri</name>
<email>sunil.khatri@amd.com</email>
</author>
<published>2024-04-16T11:00:50Z</published>
<link rel='alternate' type='text/html' href='https://git.zx2c4.com/wireguard-linux/commit/?id=40356542c36160bddee9fdf25b9248e0c9e6503b'/>
<id>urn:sha1:40356542c36160bddee9fdf25b9248e0c9e6503b</id>
<content type='text'>
Add the protoype for print ip state to be used
to print the registers in devcoredump during
a gpu reset.

Signed-off-by: Sunil Khatri &lt;sunil.khatri@amd.com&gt;
Reviewed-by: Alex Deucher &lt;alexander.deucher@amd.com&gt;
Reviewed-by: Christian König &lt;christian.koenig@amd.com&gt;
Signed-off-by: Alex Deucher &lt;alexander.deucher@amd.com&gt;
</content>
</entry>
<entry>
<title>drm/amdgpu: add prototype for ip dump</title>
<updated>2024-04-26T21:22:39Z</updated>
<author>
<name>Sunil Khatri</name>
<email>sunil.khatri@amd.com</email>
</author>
<published>2024-04-01T10:28:38Z</published>
<link rel='alternate' type='text/html' href='https://git.zx2c4.com/wireguard-linux/commit/?id=e21d253bd74bd422347d202ea2205cdc7623eed2'/>
<id>urn:sha1:e21d253bd74bd422347d202ea2205cdc7623eed2</id>
<content type='text'>
Add the prototype to dump ip registers
for all ips of different asics and set
them to NULL for now. Based on the
requirement add a function pointer for
each of them.

Signed-off-by: Sunil Khatri &lt;sunil.khatri@amd.com&gt;
Reviewed-by: Alex Deucher &lt;alexander.deucher@amd.com&gt;
Reviewed-by: Christian König &lt;christian.koenig@amd.com&gt;
Signed-off-by: Alex Deucher &lt;alexander.deucher@amd.com&gt;
</content>
</entry>
<entry>
<title>drm/amdgpu: replace tmz flag into buffer flag</title>
<updated>2024-04-26T21:22:38Z</updated>
<author>
<name>Frank Min</name>
<email>Frank.Min@amd.com</email>
</author>
<published>2024-04-10T13:13:25Z</published>
<link rel='alternate' type='text/html' href='https://git.zx2c4.com/wireguard-linux/commit/?id=ea9238a81b3ab8dcec99b1322bab5a30043b320a'/>
<id>urn:sha1:ea9238a81b3ab8dcec99b1322bab5a30043b320a</id>
<content type='text'>
Replace tmz flag into buffer flag to make it easier to understand
and extend

Signed-off-by: Likun Gao &lt;Likun.Gao@amd.com&gt;
Signed-off-by: Frank Min &lt;Frank.Min@amd.com&gt;
Reviewed-by: Alex Deucher &lt;alexander.deucher@amd.com&gt;
Reviewed-by: Christian König &lt;christian.koenig@amd.com&gt;
Signed-off-by: Alex Deucher &lt;alexander.deucher@amd.com&gt;
</content>
</entry>
<entry>
<title>drm/amdgpu: move buffer funcs setting up a level</title>
<updated>2023-10-26T20:04:24Z</updated>
<author>
<name>Alex Deucher</name>
<email>alexander.deucher@amd.com</email>
</author>
<published>2023-10-25T17:19:28Z</published>
<link rel='alternate' type='text/html' href='https://git.zx2c4.com/wireguard-linux/commit/?id=b70438004a14f4d0f9890b3297cd66248728546c'/>
<id>urn:sha1:b70438004a14f4d0f9890b3297cd66248728546c</id>
<content type='text'>
Rather than doing this in the IP code for the SDMA paging
engine, move it up to the core device level init level.
This should fix the scheduler init ordering.

v2: drop extra parens
v3: drop SDMA helpers
v4: Added a Fixes tag because amdgpu dereferences an uninitialized
    scheduler without this patch, and this patch fixes this. (Luben)

Tested-by: Luben Tuikov &lt;luben.tuikov@amd.com&gt;
Signed-off-by: Alex Deucher &lt;alexander.deucher@amd.com&gt;
Link: https://lore.kernel.org/r/20231025171928.3318505-1-alexander.deucher@amd.com
Acked-by: Christian König &lt;christian.koenig@amd.com&gt;
Fixes: 56e449603f0ac5 ("drm/sched: Convert the GPU scheduler to variable number of run-queues")
Signed-off-by: Luben Tuikov &lt;ltuikov89@gmail.com&gt;
</content>
</entry>
<entry>
<title>drm/amdgpu/sdma: set sched.ready status after ring/IB test in sdma</title>
<updated>2023-06-09T14:57:07Z</updated>
<author>
<name>Guchun Chen</name>
<email>guchun.chen@amd.com</email>
</author>
<published>2023-05-12T08:04:56Z</published>
<link rel='alternate' type='text/html' href='https://git.zx2c4.com/wireguard-linux/commit/?id=61c31b8b6c5e386a9c2ddc4e2cf9d8ae46c8a1f9'/>
<id>urn:sha1:61c31b8b6c5e386a9c2ddc4e2cf9d8ae46c8a1f9</id>
<content type='text'>
sched.ready is nothing with ring initialization, it needs to set
to be true after ring/IB test in amdgpu_ring_test_helper to tell
the ring is ready for submission.

Signed-off-by: Guchun Chen &lt;guchun.chen@amd.com&gt;
Acked-by: Alex Deucher &lt;alexander.deucher@amd.com&gt;
Signed-off-by: Alex Deucher &lt;alexander.deucher@amd.com&gt;
</content>
</entry>
<entry>
<title>drm/amdgpu/si_dma: remove unused variable in si_dma_stop()</title>
<updated>2022-10-17T21:41:20Z</updated>
<author>
<name>Yang Yingliang</name>
<email>yangyingliang@huawei.com</email>
</author>
<published>2022-10-12T07:37:07Z</published>
<link rel='alternate' type='text/html' href='https://git.zx2c4.com/wireguard-linux/commit/?id=7fe441d8b77a1e4fe09099092945d27607dda69b'/>
<id>urn:sha1:7fe441d8b77a1e4fe09099092945d27607dda69b</id>
<content type='text'>
After commit 571c05365892 ("drm/amdgpu: switch sdma buffer function
tear down to a helper"), the variable 'ring' is not used anymore, it
can be removed.

Signed-off-by: Yang Yingliang &lt;yangyingliang@huawei.com&gt;
Signed-off-by: Alex Deucher &lt;alexander.deucher@amd.com&gt;
</content>
</entry>
<entry>
<title>drm/amdgpu: switch sdma buffer function tear down to a helper</title>
<updated>2022-10-10T21:32:56Z</updated>
<author>
<name>Alex Deucher</name>
<email>alexander.deucher@amd.com</email>
</author>
<published>2022-10-06T19:31:40Z</published>
<link rel='alternate' type='text/html' href='https://git.zx2c4.com/wireguard-linux/commit/?id=571c053658926df3321633b7133f574d3e656c81'/>
<id>urn:sha1:571c053658926df3321633b7133f574d3e656c81</id>
<content type='text'>
Switch all of the SDMA implementations to use the helper to
tear down the ttm buffer manager.

Tested-by: Bokun Zhang &lt;Bokun.Zhang@amd.com&gt;
Signed-off-by: Alex Deucher &lt;alexander.deucher@amd.com&gt;
</content>
</entry>
<entry>
<title>drm/amdgpu: use ring structure to access rptr/wptr v2</title>
<updated>2022-05-04T14:03:27Z</updated>
<author>
<name>Jack Xiao</name>
<email>Jack.Xiao@amd.com</email>
</author>
<published>2020-03-20T02:54:45Z</published>
<link rel='alternate' type='text/html' href='https://git.zx2c4.com/wireguard-linux/commit/?id=3748424ba9f1241a532c57372806ecfdda894449'/>
<id>urn:sha1:3748424ba9f1241a532c57372806ecfdda894449</id>
<content type='text'>
Use ring structure to access the cpu/gpu address of rptr/wptr.

v2: merge gfx10/sdma5/sdma5.2 patches

Signed-off-by: Jack Xiao &lt;Jack.Xiao@amd.com&gt;
Reviewed-by: Christian König &lt;christian.koenig@amd.com&gt;
Reviewed-by: Hawking Zhang &lt;Hawking.Zhang@amd.com&gt;
Signed-off-by: Alex Deucher &lt;alexander.deucher@amd.com&gt;
</content>
</entry>
<entry>
<title>drm/amdgpu/sdma: Remove redundant lower_32_bits() calls when settings SDMA doorbell</title>
<updated>2022-04-26T15:44:06Z</updated>
<author>
<name>Haohui Mai</name>
<email>ricetons@gmail.com</email>
</author>
<published>2022-04-25T12:23:38Z</published>
<link rel='alternate' type='text/html' href='https://git.zx2c4.com/wireguard-linux/commit/?id=ca5d251b3b6e3aabf2d1bb7261c6b8e156b7ee16'/>
<id>urn:sha1:ca5d251b3b6e3aabf2d1bb7261c6b8e156b7ee16</id>
<content type='text'>
Updated the patch for the pre-vega hardware. I kept the clamping code
to be safe.

Reviewed-by: Christian König &lt;christian.koenig@amd.com&gt;
Signed-off-by: Haohui Mai &lt;ricetons@gmail.com&gt;
Signed-off-by: Alex Deucher &lt;alexander.deucher@amd.com&gt;
</content>
</entry>
<entry>
<title>drm/amd/amdgpu/si_dma: Fix some function name disparity</title>
<updated>2021-05-21T14:32:14Z</updated>
<author>
<name>Lee Jones</name>
<email>lee.jones@linaro.org</email>
</author>
<published>2021-05-20T12:02:26Z</published>
<link rel='alternate' type='text/html' href='https://git.zx2c4.com/wireguard-linux/commit/?id=57f671cd2caf0a8b034d809c46fa2ece9a757482'/>
<id>urn:sha1:57f671cd2caf0a8b034d809c46fa2ece9a757482</id>
<content type='text'>
Fixes the following W=1 kernel build warning(s):

 drivers/gpu/drm/amd/amdgpu/si_dma.c:320: warning: expecting prototype for cik_dma_vm_copy_pte(). Prototype was for si_dma_vm_copy_pte() instead
 drivers/gpu/drm/amd/amdgpu/si_dma.c:412: warning: expecting prototype for si_dma_pad_ib(). Prototype was for si_dma_ring_pad_ib() instead
 drivers/gpu/drm/amd/amdgpu/si_dma.c:425: warning: expecting prototype for cik_sdma_ring_emit_pipeline_sync(). Prototype was for si_dma_ring_emit_pipeline_sync() instead

Cc: Alex Deucher &lt;alexander.deucher@amd.com&gt;
Cc: "Christian König" &lt;christian.koenig@amd.com&gt;
Cc: David Airlie &lt;airlied@linux.ie&gt;
Cc: Daniel Vetter &lt;daniel@ffwll.ch&gt;
Cc: Sumit Semwal &lt;sumit.semwal@linaro.org&gt;
Cc: amd-gfx@lists.freedesktop.org
Cc: dri-devel@lists.freedesktop.org
Cc: linux-media@vger.kernel.org
Cc: linaro-mm-sig@lists.linaro.org
Signed-off-by: Lee Jones &lt;lee.jones@linaro.org&gt;
Signed-off-by: Alex Deucher &lt;alexander.deucher@amd.com&gt;
</content>
</entry>
</feed>
