<feed xmlns='http://www.w3.org/2005/Atom'>
<title>wireguard-linux/drivers/gpu/drm/amd/amdgpu, branch update-toolchain</title>
<subtitle>WireGuard for the Linux kernel</subtitle>
<id>https://git.zx2c4.com/wireguard-linux/atom/drivers/gpu/drm/amd/amdgpu?h=update-toolchain</id>
<link rel='self' href='https://git.zx2c4.com/wireguard-linux/atom/drivers/gpu/drm/amd/amdgpu?h=update-toolchain'/>
<link rel='alternate' type='text/html' href='https://git.zx2c4.com/wireguard-linux/'/>
<updated>2024-08-13T17:20:43Z</updated>
<entry>
<title>drm/amd/amdgpu: add HDP_SD support on gc 12.0.0/1</title>
<updated>2024-08-13T17:20:43Z</updated>
<author>
<name>Kenneth Feng</name>
<email>kenneth.feng@amd.com</email>
</author>
<published>2024-08-08T04:19:22Z</published>
<link rel='alternate' type='text/html' href='https://git.zx2c4.com/wireguard-linux/commit/?id=23acd1f344e8102f803119d0c8fc4df4628d694f'/>
<id>urn:sha1:23acd1f344e8102f803119d0c8fc4df4628d694f</id>
<content type='text'>
add HDP_SD support on gc 12.0.0/1

Signed-off-by: Kenneth Feng &lt;kenneth.feng@amd.com&gt;
Reviewed-by: Yang Wang &lt;kevinyang.wang@amd.com&gt;
Signed-off-by: Alex Deucher &lt;alexander.deucher@amd.com&gt;
(cherry picked from commit 61cffacb3a1c590b15c0e9ff987de02d293e0dd8)
</content>
</entry>
<entry>
<title>drm/amdgpu: Update kmd_fw_shared for VCN5</title>
<updated>2024-08-13T17:20:36Z</updated>
<author>
<name>Yinjie Yao</name>
<email>yinjie.yao@amd.com</email>
</author>
<published>2024-08-09T21:20:26Z</published>
<link rel='alternate' type='text/html' href='https://git.zx2c4.com/wireguard-linux/commit/?id=507a2286c052919fe416b3daa0f0061d0fc702b9'/>
<id>urn:sha1:507a2286c052919fe416b3daa0f0061d0fc702b9</id>
<content type='text'>
kmd_fw_shared changed in VCN5

Signed-off-by: Yinjie Yao &lt;yinjie.yao@amd.com&gt;
Reviewed-by: Ruijing Dong &lt;ruijing.dong@amd.com&gt;
Acked-by: Alex Deucher &lt;alexander.deucher@amd.com&gt;
Signed-off-by: Alex Deucher &lt;alexander.deucher@amd.com&gt;
(cherry picked from commit aa02486fb18cecbaca0c4fd393d1a03f1d4c3f9a)
</content>
</entry>
<entry>
<title>drm/amd/amdgpu: command submission parser for JPEG</title>
<updated>2024-08-13T17:17:36Z</updated>
<author>
<name>David (Ming Qiang) Wu</name>
<email>David.Wu3@amd.com</email>
</author>
<published>2024-08-08T16:19:50Z</published>
<link rel='alternate' type='text/html' href='https://git.zx2c4.com/wireguard-linux/commit/?id=470516c2925493594a690bc4d05b1f4471d9f996'/>
<id>urn:sha1:470516c2925493594a690bc4d05b1f4471d9f996</id>
<content type='text'>
Add JPEG IB command parser to ensure registers
in the command are within the JPEG IP block.

Reviewed-by: Alex Deucher &lt;alexander.deucher@amd.com&gt;
Signed-off-by: David (Ming Qiang) Wu &lt;David.Wu3@amd.com&gt;
Signed-off-by: Alex Deucher &lt;alexander.deucher@amd.com&gt;
(cherry picked from commit a7f670d5d8e77b092404ca8a35bb0f8f89ed3117)
Cc: stable@vger.kernel.org
</content>
</entry>
<entry>
<title>drm/amdgpu/mes12: fix suspend issue</title>
<updated>2024-08-13T17:17:36Z</updated>
<author>
<name>Jack Xiao</name>
<email>Jack.Xiao@amd.com</email>
</author>
<published>2024-08-07T04:03:11Z</published>
<link rel='alternate' type='text/html' href='https://git.zx2c4.com/wireguard-linux/commit/?id=4246b1077ffcc37926868581bb818fdb49d0d065'/>
<id>urn:sha1:4246b1077ffcc37926868581bb818fdb49d0d065</id>
<content type='text'>
Use mes pipe to unmap kcq and kgq.

Signed-off-by: Jack Xiao &lt;Jack.Xiao@amd.com&gt;
Acked-by: Alex Deucher &lt;alexander.deucher@amd.com&gt;
Reviewed-by: Hawking Zhang &lt;Hawking.Zhang@amd.com&gt;
Signed-off-by: Alex Deucher &lt;alexander.deucher@amd.com&gt;
(cherry picked from commit f7fb9d677faf0460131bc2af15afd766d48a1f47)
</content>
</entry>
<entry>
<title>drm/amdgpu/mes12: sw/hw fini for unified mes</title>
<updated>2024-08-13T17:17:36Z</updated>
<author>
<name>Jack Xiao</name>
<email>Jack.Xiao@amd.com</email>
</author>
<published>2024-08-07T07:23:16Z</published>
<link rel='alternate' type='text/html' href='https://git.zx2c4.com/wireguard-linux/commit/?id=af401543df510a73f7beb13f80cf4c541be94786'/>
<id>urn:sha1:af401543df510a73f7beb13f80cf4c541be94786</id>
<content type='text'>
Free memory for two pipes and unmap pipe0 via pipe1.

Signed-off-by: Jack Xiao &lt;Jack.Xiao@amd.com&gt;
Acked-by: Alex Deucher &lt;alexander.deucher@amd.com&gt;
Reviewed-by: Hawking Zhang &lt;Hawking.Zhang@amd.com&gt;
Signed-off-by: Alex Deucher &lt;alexander.deucher@amd.com&gt;
(cherry picked from commit 98cae695a8ae0e4291b1fa7feef9b54fabefe885)
</content>
</entry>
<entry>
<title>drm/amdgpu/mes12: configure two pipes hardware resources</title>
<updated>2024-08-13T17:17:36Z</updated>
<author>
<name>Jack Xiao</name>
<email>Jack.Xiao@amd.com</email>
</author>
<published>2024-08-07T06:49:30Z</published>
<link rel='alternate' type='text/html' href='https://git.zx2c4.com/wireguard-linux/commit/?id=7254027e1e6edbff54f5930a5f13f14ac6f1694c'/>
<id>urn:sha1:7254027e1e6edbff54f5930a5f13f14ac6f1694c</id>
<content type='text'>
Configure two pipes with different hardware resources.

Signed-off-by: Jack Xiao &lt;Jack.Xiao@amd.com&gt;
Acked-by: Alex Deucher &lt;alexander.deucher@amd.com&gt;
Reviewed-by: Hawking Zhang &lt;Hawking.Zhang@amd.com&gt;
Signed-off-by: Alex Deucher &lt;alexander.deucher@amd.com&gt;
(cherry picked from commit ea5d6db17a8e3635ad91e8c53faa1fdc9570fbbb)
</content>
</entry>
<entry>
<title>drm/amdgpu/mes12: adjust mes12 sw/hw init for multiple pipes</title>
<updated>2024-08-13T17:17:36Z</updated>
<author>
<name>Jack Xiao</name>
<email>Jack.Xiao@amd.com</email>
</author>
<published>2024-08-07T06:44:07Z</published>
<link rel='alternate' type='text/html' href='https://git.zx2c4.com/wireguard-linux/commit/?id=1097727d6d0c13eca25321fff46714fc5047d6e8'/>
<id>urn:sha1:1097727d6d0c13eca25321fff46714fc5047d6e8</id>
<content type='text'>
Adjust mes12 sw/hw initiailization for both pipe0 and pipe1
enablement. The two pipes are almost identical pipe. Pipe0
behaves like schq and pipe1 like kiq, pipe0 was mapped by pipe1.

Signed-off-by: Jack Xiao &lt;Jack.Xiao@amd.com&gt;
Acked-by: Alex Deucher &lt;alexander.deucher@amd.com&gt;
Reviewed-by: Hawking Zhang &lt;Hawking.Zhang@amd.com&gt;
Signed-off-by: Alex Deucher &lt;alexander.deucher@amd.com&gt;
(cherry picked from commit aa539da8aff07ab08def6490e8c9b441439e70ba)
</content>
</entry>
<entry>
<title>drm/amdgpu/mes12: add mes pipe switch support</title>
<updated>2024-08-13T17:17:36Z</updated>
<author>
<name>Jack Xiao</name>
<email>Jack.Xiao@amd.com</email>
</author>
<published>2024-08-07T06:15:48Z</published>
<link rel='alternate' type='text/html' href='https://git.zx2c4.com/wireguard-linux/commit/?id=3738a7f0ddb920bde538d3f78a02edbc6ad1307e'/>
<id>urn:sha1:3738a7f0ddb920bde538d3f78a02edbc6ad1307e</id>
<content type='text'>
Add mes pipe switch to let caller choose pipe
to submit packet.

Signed-off-by: Jack Xiao &lt;Jack.Xiao@amd.com&gt;
Acked-by: Alex Deucher &lt;alexander.deucher@amd.com&gt;
Reviewed-by: Hawking Zhang &lt;Hawking.Zhang@amd.com&gt;
Signed-off-by: Alex Deucher &lt;alexander.deucher@amd.com&gt;
(cherry picked from commit b2dee0837a4be63e8d3e00550a9f057644f962c4)
</content>
</entry>
<entry>
<title>drm/amdgpu/mes12: load unified mes fw on pipe0 and pipe1</title>
<updated>2024-08-13T17:17:36Z</updated>
<author>
<name>Jack Xiao</name>
<email>Jack.Xiao@amd.com</email>
</author>
<published>2024-08-07T05:19:59Z</published>
<link rel='alternate' type='text/html' href='https://git.zx2c4.com/wireguard-linux/commit/?id=a13d91bf3c1910212e45a69d04ad40d99878f8da'/>
<id>urn:sha1:a13d91bf3c1910212e45a69d04ad40d99878f8da</id>
<content type='text'>
Enable unified mes firmware to load on pipe0 and pipe1.

Signed-off-by: Jack Xiao &lt;Jack.Xiao@amd.com&gt;
Acked-by: Alex Deucher &lt;alexander.deucher@amd.com&gt;
Reviewed-by: Hawking Zhang &lt;Hawking.Zhang@amd.com&gt;
Signed-off-by: Alex Deucher &lt;alexander.deucher@amd.com&gt;
(cherry picked from commit e69c2dd7534f3fcabf7bb801db2a7ac71e7e5da6)
</content>
</entry>
<entry>
<title>drm/amdgpu/mes: add multiple mes ring instances support</title>
<updated>2024-08-13T17:04:48Z</updated>
<author>
<name>Jack Xiao</name>
<email>Jack.Xiao@amd.com</email>
</author>
<published>2024-08-07T03:53:35Z</published>
<link rel='alternate' type='text/html' href='https://git.zx2c4.com/wireguard-linux/commit/?id=2029b3d7e1358bcca30f74978543ba35b4bbc43d'/>
<id>urn:sha1:2029b3d7e1358bcca30f74978543ba35b4bbc43d</id>
<content type='text'>
Add multiple mes ring instances in mes structure to support
multiple mes pipes.

Signed-off-by: Jack Xiao &lt;Jack.Xiao@amd.com&gt;
Acked-by: Alex Deucher &lt;alexander.deucher@amd.com&gt;
Reviewed-by: Hawking Zhang &lt;Hawking.Zhang@amd.com&gt;
Signed-off-by: Alex Deucher &lt;alexander.deucher@amd.com&gt;
(cherry picked from commit c7d4355648ffa02a1551495b05c71ea6c884d29c)
</content>
</entry>
</feed>
