<feed xmlns='http://www.w3.org/2005/Atom'>
<title>wireguard-linux/drivers/gpu/drm/amd/amdkfd, branch stable</title>
<subtitle>WireGuard for the Linux kernel</subtitle>
<id>https://git.zx2c4.com/wireguard-linux/atom/drivers/gpu/drm/amd/amdkfd?h=stable</id>
<link rel='self' href='https://git.zx2c4.com/wireguard-linux/atom/drivers/gpu/drm/amd/amdkfd?h=stable'/>
<link rel='alternate' type='text/html' href='https://git.zx2c4.com/wireguard-linux/'/>
<updated>2026-08-12T13:37:44Z</updated>
<entry>
<title>drm/amdkfd: preserve VRAM MQD across hibernation via unpin/repin</title>
<updated>2026-08-12T13:37:44Z</updated>
<author>
<name>Shikang Fan</name>
<email>shikang.fan@amd.com</email>
</author>
<published>2026-08-07T03:12:26Z</published>
<link rel='alternate' type='text/html' href='https://git.zx2c4.com/wireguard-linux/commit/?id=ab916ec45777cd30512892d610e25d4cba5f7a0b'/>
<id>urn:sha1:ab916ec45777cd30512892d610e25d4cba5f7a0b</id>
<content type='text'>
On gfx9 ASICs with mqd_on_vram(), a compute queue MQD lives in a pinned
VRAM buffer object. Pinned BOs are skipped by the VRAM eviction done at S4
suspend, so the MQD contents are lost across hibernation and the first
submission after resume page-faults on a stale MQD.

Unpin the MQD BO at suspend so the eviction migrates it into the
hibernation image, and pin it back to VRAM on resume. The BO may return at
a different VRAM address, so refresh the kernel mapping and cached GPU
addresses and patch the MQD self-address via a new update_mqd_gpu_addr()
mqd_manager op; skip eviction with a warning if that op is not implemented.

v3: use unpin/repin instead of shadowing the MQD into a separate buffer.

v4: drop the explicit VRAM-&gt;GTT placement at evict (a bare unpin is enough
for the eviction pass to move the BO out of VRAM), and also repin at queue
destroy. KFD queue restore runs late - user processes thaw before it, and
under SR-IOV it is deferred until the VF exits full access - so once the
VM has resumed an application can destroy a queue before its MQD BO is
repinned, which would otherwise unpin an already-unpinned BO and touch a
stale q-&gt;mqd.

v5: drop support for no-HWS mode, and set q-&gt;mqd to NULL at eviction.

Signed-off-by: Shikang Fan &lt;shikang.fan@amd.com&gt;
Reviewed-by: Felix Kuehling &lt;felix.kuehling@amd.com&gt;
Signed-off-by: Alex Deucher &lt;alexander.deucher@amd.com&gt;
</content>
</entry>
<entry>
<title>drm/amdgpu: Fix typo in comment</title>
<updated>2026-08-06T17:47:02Z</updated>
<author>
<name>Kenji Takahashi</name>
<email>dken4546@gmail.com</email>
</author>
<published>2026-08-04T12:52:34Z</published>
<link rel='alternate' type='text/html' href='https://git.zx2c4.com/wireguard-linux/commit/?id=daaeec235e46b45a0dbd4facfb275cc43022028d'/>
<id>urn:sha1:daaeec235e46b45a0dbd4facfb275cc43022028d</id>
<content type='text'>
Fix a spelling mistake in a comment.

Signed-off-by: Kenji Takahashi &lt;dken4546@gmail.com&gt;
Signed-off-by: Alex Deucher &lt;alexander.deucher@amd.com&gt;
</content>
</entry>
<entry>
<title>drm/amdkfd: enable rs64mem for kfd queue</title>
<updated>2026-08-06T16:46:14Z</updated>
<author>
<name>Prike Liang</name>
<email>Prike.Liang@amd.com</email>
</author>
<published>2026-07-28T07:00:03Z</published>
<link rel='alternate' type='text/html' href='https://git.zx2c4.com/wireguard-linux/commit/?id=e32b68c6b1353a01cbc55baa20ad2d314bc8a4a2'/>
<id>urn:sha1:e32b68c6b1353a01cbc55baa20ad2d314bc8a4a2</id>
<content type='text'>
Enabled RS64mem for KFD queues by integrating
process and gang context index allocation in
the per KFD device process and queue creation.

Signed-off-by: Prike Liang &lt;Prike.Liang@amd.com&gt;
Reviewed-by: Michael Chen &lt;michael.chen@amd.com&gt;
Signed-off-by: Alex Deucher &lt;alexander.deucher@amd.com&gt;
</content>
</entry>
<entry>
<title>drm/amdkfd: Unmap svm range from GPU set to no-access</title>
<updated>2026-08-06T13:25:49Z</updated>
<author>
<name>Philip Yang</name>
<email>Philip.Yang@amd.com</email>
</author>
<published>2026-06-03T15:10:48Z</published>
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<id>urn:sha1:b96f261049466e9462571ecc975ac457bc8d2f20</id>
<content type='text'>
When KFD_IOCTL_SVM_ATTR_NO_ACCESS is applied to a GPU that has an SVM
range mapped, unmap the range from that GPU. Once no GPU maps the range,
the MMU notifier can skip queue eviction on CPU page faults.

Replace the mapped_to_gpu boolean with bitmap_mapped to track which
GPUs currently have the range mapped. Set bits in svm_range_map_to_gpus()
and clear them in svm_range_unmap_from_gpus(). This is separate from
bitmap_access/bitmap_aip which track user-requested attributes and must
not be used to determine mapping state.

Add bitmap_needs_unmap to svm_range, set for each GPU given no-access.
Add svm_range_needs_unmap() to unmap the range from those GPUs when the
app sets the no-access attribute.

Bump the checkpoint timestamp on unmap so retry faults queued before the
no-access unmap are dropped instead of restoring the mapping.

v4:
 - Rename and set prange-&gt;mapping_done to false if validate and map not
   complete successfully (Felix)
v3:
 - Correct error handling, support app retry update mapping (Felix)
v2:
 - Add bitmap_mapped to not break get_attr (Felix)

Signed-off-by: Philip Yang &lt;Philip.Yang@amd.com&gt;
Reviewed-by: Felix Kuehling &lt;felix.kuehling@amd.com&gt;
Signed-off-by: Alex Deucher &lt;alexander.deucher@amd.com&gt;
</content>
</entry>
<entry>
<title>drm/amdkfd: Add helper svm_range_update_checkpoint_timestamp</title>
<updated>2026-08-06T13:25:42Z</updated>
<author>
<name>Philip Yang</name>
<email>Philip.Yang@amd.com</email>
</author>
<published>2026-06-15T21:19:30Z</published>
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<id>urn:sha1:48f1d2a10eb95689dbc0a5bc533916959881a82c</id>
<content type='text'>
Extract svm_range_update_checkpoint_timestamp() from
svm_range_unmap_from_cpu(). The next patch calls it when the app sets
the no-access attribute.

Change checkpoint_ts in svm_range_list from uint64_t to atomic64_t so
svm_range_restore_pages() can read it from the page fault handler
without holding the svms lock.

No functional change, preparation for the next patch.

Signed-off-by: Philip Yang &lt;Philip.Yang@amd.com&gt;
Reviewed-by: Felix Kuehling &lt;felix.kuehling@amd.com&gt;
Signed-off-by: Alex Deucher &lt;alexander.deucher@amd.com&gt;
</content>
</entry>
<entry>
<title>drm/amdkfd: Remove svm_bo eviction fence</title>
<updated>2026-07-29T21:52:20Z</updated>
<author>
<name>Philip Yang</name>
<email>Philip.Yang@amd.com</email>
</author>
<published>2026-07-18T00:54:51Z</published>
<link rel='alternate' type='text/html' href='https://git.zx2c4.com/wireguard-linux/commit/?id=6aabceae65e777f8e1ecac6beed171f2626015ce'/>
<id>urn:sha1:6aabceae65e777f8e1ecac6beed171f2626015ce</id>
<content type='text'>
SVM BOs are now migrated back to system memory synchronously from the TTM
eviction path (svm_range_evict_svm_bo), so the per-svm_bo eviction fence
is no longer used.

Remove the eviction fence from svm_range_bo, drop the
amdgpu_amdkfd_fence-&gt;svm_bo back pointer and the
amdgpu_amdkfd_evict_svm_bo() helper, and stop special-casing svm_bo
fences in the KFD fence enable_signaling and check_mm paths. Embed struct
amdgpu_bo directly in svm_range_bo with a dedicated svm_range_bo_destroy()
callback, and keep the owning mm via mmgrab()/mmdrop() instead of through
the fence.

Signed-off-by: Philip Yang &lt;Philip.Yang@amd.com&gt;
Reviewed-by: Felix Kuehling &lt;felix.kuehling@amd.com&gt;
Signed-off-by: Alex Deucher &lt;alexander.deucher@amd.com&gt;
</content>
</entry>
<entry>
<title>drm/amdkfd: Evict SVM BOs synchronously from TTM eviction</title>
<updated>2026-07-28T23:17:34Z</updated>
<author>
<name>Philip Yang</name>
<email>Philip.Yang@amd.com</email>
</author>
<published>2026-07-16T21:39:34Z</published>
<link rel='alternate' type='text/html' href='https://git.zx2c4.com/wireguard-linux/commit/?id=25f0b322ffb5ba1d61175ad6b0c53bf0bcf3d301'/>
<id>urn:sha1:25f0b322ffb5ba1d61175ad6b0c53bf0bcf3d301</id>
<content type='text'>
svm_range_evict_svm_bo_worker() migrated an SVM BO's pages back to system
memory from a work item that took mmap_read_lock. When an mmap writer was
pending, that read lock blocked behind the writer while the thread
allocating a new migration VRAM BO waited on this BO's eviction fence - a
circular wait that hung the SVM workers.

Evict the SVM BO synchronously from the TTM eviction path
(amdgpu_ttm_bo_eviction_valuable) instead of deferring to a work item.
The BO is already reserved and the lock order is mmap_lock -&gt; BO
reservation, so only trylock the owning process's mmap lock; on
contention return -EBUSY so TTM skips this BO. This removes the eviction
work item and the enable_signaling path, so no worker can block on
mmap_read_lock.

The SVM BO uses AMDGPU_GEM_CREATE_DISCARDABLE, so ttm_bo_evict takes the
pipeline_gutting path and skips allocating a system memory placement.
That would be wasted work, since svm_migrate_vram_to_ram allocates the
system pages and copies the data back itself.

Eviction now migrates ranges directly, so it must serialize with the
owning process: it trylocks migrate_mutex under svm_bo-&gt;list_lock before
unlinking the range, and svm_range_free() unlinks the range then waits on
migrate_mutex, so a concurrent eviction cannot free a range under it.

Drop the mm reference with mmput_async so exit_mmap() does not run under
the BO reservation.

Signed-off-by: Philip Yang &lt;Philip.Yang@amd.com&gt;
Reviewed-by: Felix Kuehling &lt;felix.kuehling@amd.com&gt;
Signed-off-by: Alex Deucher &lt;alexander.deucher@amd.com&gt;
</content>
</entry>
<entry>
<title>drm/amdkfd: Fix signal reset event</title>
<updated>2026-07-28T23:17:33Z</updated>
<author>
<name>Amber Lin</name>
<email>amber.lin@amd.com</email>
</author>
<published>2026-07-28T18:08:20Z</published>
<link rel='alternate' type='text/html' href='https://git.zx2c4.com/wireguard-linux/commit/?id=b38f9b6ffdfc86d5aff36881d9e8028c79bc98c9'/>
<id>urn:sha1:b38f9b6ffdfc86d5aff36881d9e8028c79bc98c9</id>
<content type='text'>
When a mode reset happens, driver needs to notify the process on that
GPU a reset event is happening. The existing code assumes the process is
using the GPU that is getting mode reset, which is not always true. For
example, on a 8G system, the process may be only using GPU 0~4 but a
mode 2 reset is resetting the all 8 GPUs connected by XGMI. Trying to
find a process on GPU 5~7 will fail, which is fine and should skip the
event signal.

Signed-off-by: Amber Lin &lt;amber.lin@amd.com&gt;
Reviewed-by: David Yat Sin &lt;david.yatsin@amd.com&gt;
Signed-off-by: Alex Deucher &lt;alexander.deucher@amd.com&gt;
</content>
</entry>
<entry>
<title>drm/amdkfd: allow CWSR grace period of 0 on supported firmware</title>
<updated>2026-07-28T23:17:33Z</updated>
<author>
<name>William Palacek</name>
<email>William.Palacek@amd.com</email>
</author>
<published>2026-07-20T15:47:36Z</published>
<link rel='alternate' type='text/html' href='https://git.zx2c4.com/wireguard-linux/commit/?id=e3fcdd6194264dda91978a1c97984f83c4e86dfc'/>
<id>urn:sha1:e3fcdd6194264dda91978a1c97984f83c4e86dfc</id>
<content type='text'>
The debugger sets the CWSR grace period via AMDKFD_IOC_DBG_TRAP and may
request a value of 0. An earlier change clamped 0 to 1 unconditionally
because most firmware revisions locked up when given an infinite (0)
grace period.

Firmware has since been fixed on most ASICs, so gate the clamp on ASIC
type and MEC firmware version and allow 0 where the running firmware is
known to handle it. Navi3x and MI350 support 0 in every firmware
revision and need no version check. MI100 never received the firmware
fix and is kept clamped. Any unlisted or future ASIC defaults to the
safe (clamped) behaviour.

Signed-off-by: William Palacek &lt;William.Palacek@amd.com&gt;
Reviewed-by: Kent Russell &lt;kent.russell@amd.com&gt;
Signed-off-by: Alex Deucher &lt;alexander.deucher@amd.com&gt;
</content>
</entry>
<entry>
<title>drm/amdkfd: hold event_mutex while checkpointing CRIU events</title>
<updated>2026-07-28T23:17:32Z</updated>
<author>
<name>William Palacek</name>
<email>William.Palacek@amd.com</email>
</author>
<published>2026-07-22T15:20:56Z</published>
<link rel='alternate' type='text/html' href='https://git.zx2c4.com/wireguard-linux/commit/?id=ff57e223ab105795b05d3ef3f3c35a5a441bcbaa'/>
<id>urn:sha1:ff57e223ab105795b05d3ef3f3c35a5a441bcbaa</id>
<content type='text'>
kfd_criu_checkpoint_events() counts the entries in p-&gt;event_idr via
kfd_get_num_events(), allocates an array sized to that count, and then
walks the same IDR to fill it. Neither the count nor the walk holds
p-&gt;event_mutex.

The CRIU checkpoint caller holds only p-&gt;mutex. Event create and destroy
(kfd_event_create()/kfd_event_destroy()) take p-&gt;event_mutex and do not
take p-&gt;mutex, so a second thread in the same process can insert or remove
events between the count and the walk. If an event is inserted, the walk
iterates more entries than were counted and writes past the end of the
ev_privs allocation; if an event is removed, the walk dereferences an
entry that is being freed.

Hold p-&gt;event_mutex across the count and the walk so both observe a
consistent view of p-&gt;event_idr. The lock is released before
copy_to_user(), which only touches the local buffer. The caller already
holds p-&gt;mutex and the create/destroy paths never take p-&gt;mutex, so the
p-&gt;mutex -&gt; p-&gt;event_mutex order is not inverted and no deadlock is
introduced.

Fixes: 40e8a766a761 ("drm/amdkfd: CRIU checkpoint and restore events")
Signed-off-by: William Palacek &lt;William.Palacek@amd.com&gt;
Reviewed-by: Alysa Liu &lt;Alysa.Liu@amd.com&gt;
Signed-off-by: Alex Deucher &lt;alexander.deucher@amd.com&gt;
</content>
</entry>
</feed>
