wireguard-linux/drivers/gpu/drm/amd/display/dc/dml, branch jd/unified-crypt-queue

drm/amd/display: Fix dcn21 num_states

2020-03-31T16:26:15Z

[Why] DML expects num_states to exclude the duplicate state. [How] Set num_states to correct value to prevent array off-by-one error. Also refactor max clock level code for diags. Signed-off-by: Dmytro Laktyushkin Signed-off-by: George Shen Reviewed-by: Dmytro Laktyushkin Acked-by: Rodrigo Siqueira Signed-off-by: Alex Deucher

drm/amd/display: change number of cursor policy for dml calculation.

2020-03-05T05:30:37Z

[Why] vstartup calculation is incorrect due to use 2 number of cursors and result in an underflow when playing video in full screen mode and combines graphic plane and video plane. [How] Apply new policy for dml calculation. 1 cursor for graphic plane, 0 cursor for video plane. Signed-off-by: Yongqiang Sun Reviewed-by: Tony Cheng Acked-by: Rodrigo Siqueira Signed-off-by: Alex Deucher

drm/amd/display: Make clock table struct more accessible

2020-03-05T05:29:20Z

[WHY & HOW] In order to correctly intepret clock table, num_states is also needed. This field did not get moved with clock_table but should next to it for easier access/viewing. Signed-off-by: Sung Lee Reviewed-by: Eric Yang Acked-by: Rodrigo Siqueira Signed-off-by: Alex Deucher

drm/amd/display: Make clock table struct more accessible

2020-02-25T16:09:44Z

[WHY] Currently clock table struct is very far down in the bounding box struct making it hard to find while debugging, especially when using the dal3dbgext. [HOW] Move it up so it is the first struct defined, and therefore much easier to find and access. Signed-off-by: Sung Lee Reviewed-by: Eric Yang Acked-by: Rodrigo Siqueira Acked-by: Harry Wentland Signed-off-by: Alex Deucher

drm/amd/display: correct dml surface size assignment

2020-02-25T16:09:32Z

Need to assign surface size rather than viewport size for surface size dml variable. Signed-off-by: Dmytro Laktyushkin Reviewed-by: Eric Bernstein Acked-by: Rodrigo Siqueira Acked-by: Harry Wentland Signed-off-by: Alex Deucher

drm/amd/display: Update TTU properly

2020-02-25T16:09:25Z

[Why] We need to update TTU properly if DRAMClockChangeWatermark changes. If TTU < DRAMClockChangeWatermark, we pstate won't be allowed and we will hang in some PSR cases. [How] Update TTU if DramClockChangeWatermark value increases (only if TTU was dependent on the watermark value on the DRAMClockChangeWatermark value in the first place). Signed-off-by: Alvin Lee Reviewed-by: Jun Lei Acked-by: Rodrigo Siqueira Acked-by: Harry Wentland Signed-off-by: Alex Deucher

drm/amd/display: remove unused dml variable

2020-02-25T16:08:53Z

Signed-off-by: Dmytro Laktyushkin Reviewed-by: Eric Bernstein Acked-by: Rodrigo Siqueira Acked-by: Harry Wentland Signed-off-by: Alex Deucher

drm/amd/display: update dml input population function

2020-02-25T16:08:47Z

Update dcn20_populate_dml_pipes_from_context to correctly handle odm when no surface is provided. Signed-off-by: Dmytro Laktyushkin Reviewed-by: Jun Lei Acked-by: Rodrigo Siqueira Acked-by: Harry Wentland Signed-off-by: Alex Deucher

drm/amd/display: fix inputting clk lvl into dml for RN

2020-02-06T20:04:37Z

[Why] Previous logic is only good for 15W parts. Other configuration need a smarter logic to match clk levels with pp table in the fuse. [How] Cache all 8 DPM level's clock data, find lvl that match each pstate in the pp table and build input into DML base on that Signed-off-by: Eric Yang Signed-off-by: Sung Lee Reviewed-by: Tony Cheng Acked-by: Bhawanpreet Lakha Signed-off-by: Alex Deucher

drm/amd/display: Fix various issues found by compiler warning as errors

2020-02-06T20:04:37Z

[Why] Diagnostics team reported various issues found when enabling warnings as errors [How] Fix implicit conversions Signed-off-by: Eric Bernstein Reviewed-by: Aric Cyr Acked-by: Bhawanpreet Lakha Signed-off-by: Alex Deucher