<feed xmlns='http://www.w3.org/2005/Atom'>
<title>wireguard-linux/drivers/gpu/drm/amd/powerplay, branch jd/unified-crypt-queue</title>
<subtitle>WireGuard for the Linux kernel</subtitle>
<id>https://git.zx2c4.com/wireguard-linux/atom/drivers/gpu/drm/amd/powerplay?h=jd%2Funified-crypt-queue</id>
<link rel='self' href='https://git.zx2c4.com/wireguard-linux/atom/drivers/gpu/drm/amd/powerplay?h=jd%2Funified-crypt-queue'/>
<link rel='alternate' type='text/html' href='https://git.zx2c4.com/wireguard-linux/'/>
<updated>2020-04-08T21:51:54Z</updated>
<entry>
<title>drm/amd/powerplay: error out on forcing clock setting not supported</title>
<updated>2020-04-08T21:51:54Z</updated>
<author>
<name>Evan Quan</name>
<email>evan.quan@amd.com</email>
</author>
<published>2020-04-03T05:19:14Z</published>
<link rel='alternate' type='text/html' href='https://git.zx2c4.com/wireguard-linux/commit/?id=3abd1e95e0b0aa816d4dd63cac33a423afb4a7f2'/>
<id>urn:sha1:3abd1e95e0b0aa816d4dd63cac33a423afb4a7f2</id>
<content type='text'>
For Arcturus, forcing clock to some specific level is not supported
with 54.18 and onwards SMU firmware. As according to firmware team,
they adopt new gfx dpm tuned parameters which can cover all the use
case in a much smooth way. Thus setting through driver interface
is not needed and maybe do a disservice.

Signed-off-by: Evan Quan &lt;evan.quan@amd.com&gt;
Reviewed-by: Alex Deucher &lt;alexander.deucher@amd.com&gt;
Signed-off-by: Alex Deucher &lt;alexander.deucher@amd.com&gt;
</content>
</entry>
<entry>
<title>drm/amd/powerplay: avoid using pm_en before it is initialized</title>
<updated>2020-04-03T21:22:44Z</updated>
<author>
<name>Tiecheng Zhou</name>
<email>Tiecheng.Zhou@amd.com</email>
</author>
<published>2020-04-02T08:49:36Z</published>
<link rel='alternate' type='text/html' href='https://git.zx2c4.com/wireguard-linux/commit/?id=c5207876232649ca5e5ddd6f966d2da75ffded8f'/>
<id>urn:sha1:c5207876232649ca5e5ddd6f966d2da75ffded8f</id>
<content type='text'>
hwmgr-&gt;pm_en is initialized at hwmgr_hw_init.
during amdgpu_device_init, there is amdgpu_asic_reset that calls to
pp_get_asic_baco_capability, while hwmgr-&gt;pm_en has not yet been initialized.

so avoid using pm_en in pp_get_asic_baco_capability.

Reviewed-by: Emily Deng &lt;Emily.Deng@amd.com&gt;
Signed-off-by: Tiecheng Zhou &lt;Tiecheng.Zhou@amd.com&gt;
Signed-off-by: Yintian Tao &lt;yttao@amd.com&gt;
Signed-off-by: Alex Deucher &lt;alexander.deucher@amd.com&gt;
</content>
</entry>
<entry>
<title>drm/amd/powerplay: implement the is_dpm_running()</title>
<updated>2020-04-03T21:22:02Z</updated>
<author>
<name>Prike Liang</name>
<email>Prike.Liang@amd.com</email>
</author>
<published>2020-04-03T04:26:15Z</published>
<link rel='alternate' type='text/html' href='https://git.zx2c4.com/wireguard-linux/commit/?id=4ee2bb22ddb53a2eafc675690d0d67452029ca37'/>
<id>urn:sha1:4ee2bb22ddb53a2eafc675690d0d67452029ca37</id>
<content type='text'>
As the pmfw hasn't exported the interface of SMU feature
mask to APU SKU so just force on all the features to driver
inquired interface at early initial stage.

Signed-off-by: Prike Liang &lt;Prike.Liang@amd.com&gt;
Reviewed-by: Huang Rui &lt;ray.huang@amd.com&gt;
Signed-off-by: Alex Deucher &lt;alexander.deucher@amd.com&gt;
Cc: stable@vger.kernel.org
</content>
</entry>
<entry>
<title>drm/amdgpu/powerplay: using the FCLK DPM table to set the MCLK</title>
<updated>2020-04-03T21:20:15Z</updated>
<author>
<name>Yuxian Dai</name>
<email>Yuxian.Dai@amd.com</email>
</author>
<published>2020-04-01T11:26:26Z</published>
<link rel='alternate' type='text/html' href='https://git.zx2c4.com/wireguard-linux/commit/?id=022ac4c9c55be35a2d1f71019a931324c51b0dab'/>
<id>urn:sha1:022ac4c9c55be35a2d1f71019a931324c51b0dab</id>
<content type='text'>
1.Using the FCLK DPM table to set the MCLK for DPM states consist of
three entities:
 FCLK
 UCLK
 MEMCLK
All these three clk change together, MEMCLK from FCLK, so use the fclk
frequency.
2.we should show the current working clock freqency from clock table metric

Signed-off-by: Yuxian Dai &lt;Yuxian.Dai@amd.com&gt;
Reviewed-by: Alex Deucher &lt;alexander.deucher@amd.com&gt;
Reviewed-by: Huang Rui &lt;ray.huang@amd.com&gt;
Reviewed-by: Kevin Wang &lt;Kevin1.Wang@amd.com&gt;
Signed-off-by: Alex Deucher &lt;alexander.deucher@amd.com&gt;
Cc: stable@vger.kernel.org
</content>
</entry>
<entry>
<title>drm/amd/powerplay: move the ASIC specific nbio operation out of smu_v11_0.c</title>
<updated>2020-03-31T16:26:15Z</updated>
<author>
<name>Evan Quan</name>
<email>evan.quan@amd.com</email>
</author>
<published>2020-03-27T07:33:00Z</published>
<link rel='alternate' type='text/html' href='https://git.zx2c4.com/wireguard-linux/commit/?id=49e78c820a025a2c6e849b34fe113727194a7034'/>
<id>urn:sha1:49e78c820a025a2c6e849b34fe113727194a7034</id>
<content type='text'>
This is ASIC specific and should be placed in _ppt.c of each ASIC.

Signed-off-by: Evan Quan &lt;evan.quan@amd.com&gt;
Reviewed-by: Alex Deucher &lt;alexander.deucher@amd.com&gt;
Signed-off-by: Alex Deucher &lt;alexander.deucher@amd.com&gt;
</content>
</entry>
<entry>
<title>drm/amd/powerplay: drop redundant BIF doorbell interrupt operations</title>
<updated>2020-03-31T16:26:15Z</updated>
<author>
<name>Evan Quan</name>
<email>evan.quan@amd.com</email>
</author>
<published>2020-03-27T07:05:09Z</published>
<link rel='alternate' type='text/html' href='https://git.zx2c4.com/wireguard-linux/commit/?id=e4295adc84a342cf6f627128cbbd939f320cf687'/>
<id>urn:sha1:e4295adc84a342cf6f627128cbbd939f320cf687</id>
<content type='text'>
This is already done in soc15.c. And this is really ASIC specific
and should not be placed here.

Signed-off-by: Evan Quan &lt;evan.quan@amd.com&gt;
Reviewed-by: Alex Deucher &lt;alexander.deucher@amd.com&gt;
Signed-off-by: Alex Deucher &lt;alexander.deucher@amd.com&gt;
</content>
</entry>
<entry>
<title>drm/amdgpu/smu11: add support for SMU AC/DC interrupts</title>
<updated>2020-03-25T21:00:11Z</updated>
<author>
<name>Alex Deucher</name>
<email>alexander.deucher@amd.com</email>
</author>
<published>2020-03-20T17:45:59Z</published>
<link rel='alternate' type='text/html' href='https://git.zx2c4.com/wireguard-linux/commit/?id=e1188aacad17302510d9235adcfbc6d45e5dde7c'/>
<id>urn:sha1:e1188aacad17302510d9235adcfbc6d45e5dde7c</id>
<content type='text'>
Driver needs to send the ack message when it receives the
AC/DC interrupt from the SMU.

TODO: verify the client and src ids.

Bug: https://gitlab.freedesktop.org/drm/amd/issues/1043
Reviewed-by: Evan Quan &lt;evan.quan@amd.com&gt;
Signed-off-by: Alex Deucher &lt;alexander.deucher@amd.com&gt;
</content>
</entry>
<entry>
<title>drm/amdgpu/swSMU: handle manual AC/DC notifications</title>
<updated>2020-03-25T21:00:11Z</updated>
<author>
<name>Alex Deucher</name>
<email>alexander.deucher@amd.com</email>
</author>
<published>2020-03-20T17:03:12Z</published>
<link rel='alternate' type='text/html' href='https://git.zx2c4.com/wireguard-linux/commit/?id=9644bf5f4ab8d691c46e53f67b825c90d97e7219'/>
<id>urn:sha1:9644bf5f4ab8d691c46e53f67b825c90d97e7219</id>
<content type='text'>
For boards that do not support automatic AC/DC transitions
in firmware, manually tell the firmware when the status
changes.

Bug: https://gitlab.freedesktop.org/drm/amd/issues/1043
Reviewed-by: Evan Quan &lt;evan.quan@amd.com&gt;
Signed-off-by: Alex Deucher &lt;alexander.deucher@amd.com&gt;
</content>
</entry>
<entry>
<title>drm/amdgpu/swSMU: handle DC controlled by GPIO for navi1x</title>
<updated>2020-03-25T21:00:11Z</updated>
<author>
<name>Alex Deucher</name>
<email>alexander.deucher@amd.com</email>
</author>
<published>2020-03-20T16:37:23Z</published>
<link rel='alternate' type='text/html' href='https://git.zx2c4.com/wireguard-linux/commit/?id=f5cdd2bdd9ba08e469f655c5c6175e3e3ffb38b9'/>
<id>urn:sha1:f5cdd2bdd9ba08e469f655c5c6175e3e3ffb38b9</id>
<content type='text'>
Check the platform caps in the vbios pptable to decide
whether to enable automatic AC/DC transitions.

Bug: https://gitlab.freedesktop.org/drm/amd/issues/1043
Reviewed-by: Evan Quan &lt;evan.quan@amd.com&gt;
Signed-off-by: Alex Deucher &lt;alexander.deucher@amd.com&gt;
</content>
</entry>
<entry>
<title>drm/amdgpu/swSMU: set AC/DC mode based on the current system state (v2)</title>
<updated>2020-03-25T21:00:11Z</updated>
<author>
<name>Alex Deucher</name>
<email>alexander.deucher@amd.com</email>
</author>
<published>2020-03-20T16:45:09Z</published>
<link rel='alternate' type='text/html' href='https://git.zx2c4.com/wireguard-linux/commit/?id=75610fdd38d9d158385049c9f80547a2253c65ea'/>
<id>urn:sha1:75610fdd38d9d158385049c9f80547a2253c65ea</id>
<content type='text'>
Check of the pointer exists and we are actually on AC power.

v2: fix error message to reflect AC/DC mode.

Bug: https://gitlab.freedesktop.org/drm/amd/issues/1043
Reviewed-by: Evan Quan &lt;evan.quan@amd.com&gt;
Signed-off-by: Alex Deucher &lt;alexander.deucher@amd.com&gt;
</content>
</entry>
</feed>
