wireguard-linux/drivers/gpu/drm/msm/msm_gpu.h, branch jd/bump-compilers

drm/msm: Add obj flags to gpu devcoredump

2024-06-21T20:41:43Z

When debugging faults, it is useful to know how the BO is mapped (cached vs WC, gpu readonly, etc). Signed-off-by: Rob Clark Reviewed-by: Akhil P Oommen Acked-by: Konrad Dybcio Reviewed-by: Dmitry Baryshkov Patchwork: https://patchwork.freedesktop.org/patch/593854/

drm/msm: Add GPU memory traces

2024-06-21T20:41:43Z

Perfetto can use these traces to track global and per-process GPU memory usage. Signed-off-by: Rob Clark Patchwork: https://patchwork.freedesktop.org/patch/580854/

drm/msm: Drop msm_read/writel

2024-04-22T13:22:50Z

Totally useless. Signed-off-by: Konrad Dybcio Reviewed-by: Andrew Halaney Patchwork: https://patchwork.freedesktop.org/patch/588804/ Link: https://lore.kernel.org/r/20240410-topic-msm_rw-v1-1-e1fede9ffaba@linaro.org Signed-off-by: Dmitry Baryshkov

drm/sched: Reverse run-queue priority enumeration

2023-11-25T04:03:53Z

Reverse run-queue priority enumeration such that the higest priority is now 0, and for each consecutive integer the prioirty diminishes. Run-queues correspond to priorities. To an external observer a scheduler created with a single run-queue, and another created with DRM_SCHED_PRIORITY_COUNT number of run-queues, should always schedule sched->sched_rq[0] with the same "priority", as that index run-queue exists in both schedulers, i.e. a scheduler with one run-queue or many. This patch makes it so. In other words, the "priority" of sched->sched_rq[n], n >= 0, is the same for any scheduler created with any allowable number of run-queues (priorities), 0 to DRM_SCHED_PRIORITY_COUNT. Cc: Rob Clark Cc: Abhinav Kumar Cc: Dmitry Baryshkov Cc: Danilo Krummrich Cc: Alex Deucher Cc: Christian König Cc: linux-arm-msm@vger.kernel.org Cc: freedreno@lists.freedesktop.org Cc: dri-devel@lists.freedesktop.org Signed-off-by: Luben Tuikov Reviewed-by: Christian König Link: https://patchwork.freedesktop.org/patch/msgid/20231124052752.6915-6-ltuikov89@gmail.com

drm/sched: Rename priority MIN to LOW

2023-11-25T04:03:53Z

Rename DRM_SCHED_PRIORITY_MIN to DRM_SCHED_PRIORITY_LOW. This mirrors DRM_SCHED_PRIORITY_HIGH, for a list of DRM scheduler priorities in ascending order, DRM_SCHED_PRIORITY_LOW, DRM_SCHED_PRIORITY_NORMAL, DRM_SCHED_PRIORITY_HIGH, DRM_SCHED_PRIORITY_KERNEL. Cc: Rob Clark Cc: Abhinav Kumar Cc: Dmitry Baryshkov Cc: Danilo Krummrich Cc: Alex Deucher Cc: Christian König Cc: linux-arm-msm@vger.kernel.org Cc: freedreno@lists.freedesktop.org Cc: dri-devel@lists.freedesktop.org Signed-off-by: Luben Tuikov Reviewed-by: Christian König Link: https://patchwork.freedesktop.org/patch/msgid/20231124052752.6915-5-ltuikov89@gmail.com

drm/msm: Disallow relocs on a6xx+

2023-08-07T21:51:21Z

Mesa stopped using these pretty early in a6xx bringup[1]. Take advantage of this to disallow some legacy UABI. [1] https://gitlab.freedesktop.org/mesa/mesa/-/commit/7ef722861b691ce99be3827ed05f8c0ddf2cd66e Signed-off-by: Rob Clark Acked-by: Daniel Vetter Patchwork: https://patchwork.freedesktop.org/patch/551175/

drm/msm/gpu: Move BO allocation out of hw_init

2023-03-25T23:31:45Z

These allocations are only done the first (successful) time through hw_init() so they won't actually happen in the job_run() path. But lockdep doesn't know this. So dis-entangle them from the hw_init() path. Signed-off-by: Rob Clark Patchwork: https://patchwork.freedesktop.org/patch/527852/ Link: https://lore.kernel.org/r/20230320144356.803762-14-robdclark@gmail.com

drm/msm: Switch idr_lock to spinlock

2023-03-25T23:31:44Z

Needed to idr_preload() which returns with preemption disabled. Signed-off-by: Rob Clark Patchwork: https://patchwork.freedesktop.org/patch/527846/ Link: https://lore.kernel.org/r/20230320144356.803762-11-robdclark@gmail.com

drm/msm/a6xx: Remove cx gdsc polling using 'reset'

2023-03-20T17:53:47Z

Remove the unused 'reset' interface which was supposed to help to ensure that cx gdsc has collapsed during gpu recovery. This is was not enabled so far due to missing gpucc driver support. Similar functionality using genpd framework will be implemented in the upcoming patch. This effectively reverts commit 1f6cca404918 ("drm/msm/a6xx: Ensure CX collapse during gpu recovery"). Signed-off-by: Akhil P Oommen Reviewed-by: Ulf Hansson Reviewed-by: Philipp Zabel Patchwork: https://patchwork.freedesktop.org/patch/516470/ Link: https://lore.kernel.org/r/20230102161757.v5.4.I96e0bf9eaf96dd866111c1eec8a4c9b70fd7cbcb@changeid Signed-off-by: Rob Clark

Merge tag 'drm-msm-next-2023-01-30' of https://gitlab.freedesktop.org/drm/msm into drm-next

2023-02-02T18:45:17Z

msm-next for v6.3 There is one devfreq patch, maintainer acked to land via msm-next to avoid a build break on platforms that do not support PM_DEVFREQ. And otherwise the usual assortment: GPU: - Add MSM_SUBMIT_BO_NO_IMPLICIT - a2xx: Support to load legacy firmware - a6xx: GPU devcore dump updates for a650/a660 - GPU devfreq tuning and fixes DPU, DSI, MDSS: - Support for SM8350, SM8450 SM8550 and SC8280XP platform Core: - Added bindings for SM8150 (driver support already present) DPU: - Partial support for DSC on SM8150 and SM8250 - Fixed color transformation matrix being lost on suspend/resume - Include DSC blocks into register snapshot - Misc HW catalog fixes DP: - Support for DP on SDM845 and SC8280XP platforms - HPD fixes - Support for limiting DP link rate via DT property, this enables - Support for HBR3 rates. DSI: - Validate display modes according to the DSI OPP table - DSI PHY support for the SM6375 platform - Fixed byte intf clock selection for 14nm PHYs - Fix the case of empty OPP tables (fixing db410c) - DT schema rework and fixes HDMI: - Turn 8960 HDMI PHY into clock provider, - Make 8960 HDMI PHY use PXO clock from DT MDP5: - Schema conversion to YAML Signed-off-by: Dave Airlie From: Rob Clark Link: https://patchwork.freedesktop.org/patch/msgid/CAF6AEGv6zQ-zsgS+NG+WuV=tk51q9vA2QdKqYhNgiXQddAdZjA@mail.gmail.com