<feed xmlns='http://www.w3.org/2005/Atom'>
<title>wireguard-linux/drivers/gpu/nova-core/mctp.rs, branch stable</title>
<subtitle>WireGuard for the Linux kernel</subtitle>
<id>https://git.zx2c4.com/wireguard-linux/atom/drivers/gpu/nova-core/mctp.rs?h=stable</id>
<link rel='self' href='https://git.zx2c4.com/wireguard-linux/atom/drivers/gpu/nova-core/mctp.rs?h=stable'/>
<link rel='alternate' type='text/html' href='https://git.zx2c4.com/wireguard-linux/'/>
<updated>2026-07-23T23:15:43Z</updated>
<entry>
<title>gpu: nova-core: read vGPU mode from FSP via PRC protocol</title>
<updated>2026-07-23T23:15:43Z</updated>
<author>
<name>Zhi Wang</name>
<email>zhiw@nvidia.com</email>
</author>
<published>2026-07-22T07:39:10Z</published>
<link rel='alternate' type='text/html' href='https://git.zx2c4.com/wireguard-linux/commit/?id=29073113cf0044fd05dd0b4318421e91b8de8542'/>
<id>urn:sha1:29073113cf0044fd05dd0b4318421e91b8de8542</id>
<content type='text'>
vGPU boot needs to know whether firmware reports vGPU mode as active.

FSP's Management Partition exposes PRC (Product Reconfiguration Control)
as an API for reading device configuration knobs without firmware
updates. The vGPU mode knob is one such configuration value.

Add typed PRC request and response payloads for the vGPU mode object,
add the PRC NVDM type, and parse the returned knob value into VgpuMode.

Signed-off-by: Zhi Wang &lt;zhiw@nvidia.com&gt;
Reviewed-by: Alexandre Courbot &lt;acourbot@nvidia.com&gt;
Link: https://patch.msgid.link/20260722073913.1807677-4-zhiw@nvidia.com
[ FspPrcMessage is small and short-lived; stack-allocate it instead of
  using KBox. - Danilo ]
Signed-off-by: Danilo Krummrich &lt;dakr@kernel.org&gt;
</content>
</entry>
<entry>
<title>gpu: nova-core: convert to kernel bitfield macro</title>
<updated>2026-07-03T01:55:17Z</updated>
<author>
<name>Alexandre Courbot</name>
<email>acourbot@nvidia.com</email>
</author>
<published>2026-07-01T00:15:30Z</published>
<link rel='alternate' type='text/html' href='https://git.zx2c4.com/wireguard-linux/commit/?id=064375c89bd100809e04f6cfb01f40bca3c20af6'/>
<id>urn:sha1:064375c89bd100809e04f6cfb01f40bca3c20af6</id>
<content type='text'>
Replace uses of the Nova-local `bitfield!` macro with the kernel one.

Reviewed-by: Eliot Courtney &lt;ecourtney@nvidia.com&gt;
Acked-by: Danilo Krummrich &lt;dakr@kernel.org&gt;
Link: https://patch.msgid.link/20260701-nova-bitfield-v2-1-2e949bf1836c@nvidia.com
Signed-off-by: Alexandre Courbot &lt;acourbot@nvidia.com&gt;
</content>
</entry>
<entry>
<title>gpu: nova-core: Hopper/Blackwell: add FSP Chain of Trust boot</title>
<updated>2026-06-03T14:52:22Z</updated>
<author>
<name>John Hubbard</name>
<email>jhubbard@nvidia.com</email>
</author>
<published>2026-06-03T07:30:23Z</published>
<link rel='alternate' type='text/html' href='https://git.zx2c4.com/wireguard-linux/commit/?id=d317e4585fa39bcee4d075f5c485494b0f238713'/>
<id>urn:sha1:d317e4585fa39bcee4d075f5c485494b0f238713</id>
<content type='text'>
Build and send the Chain of Trust message to FSP, bundling the
DMA-coherent boot parameters that FSP reads at boot time.

Signed-off-by: John Hubbard &lt;jhubbard@nvidia.com&gt;
Link: https://patch.msgid.link/20260603-b4-blackwell-v13-6-d9f3a06939e0@nvidia.com
[acourbot: rename `frts_offset` to `frts_vidmem_offset`.]
[acourbot: add note about frts_sysmem_* CoT members.]
Co-developed-by: Alexandre Courbot &lt;acourbot@nvidia.com&gt;
Signed-off-by: Alexandre Courbot &lt;acourbot@nvidia.com&gt;
</content>
</entry>
<entry>
<title>gpu: nova-core: add MCTP/NVDM protocol types for firmware communication</title>
<updated>2026-06-03T13:11:24Z</updated>
<author>
<name>John Hubbard</name>
<email>jhubbard@nvidia.com</email>
</author>
<published>2026-06-03T07:30:20Z</published>
<link rel='alternate' type='text/html' href='https://git.zx2c4.com/wireguard-linux/commit/?id=944a0fedca7ed226685d3b965dd1371ff34b3017'/>
<id>urn:sha1:944a0fedca7ed226685d3b965dd1371ff34b3017</id>
<content type='text'>
Add the MCTP (Management Component Transport Protocol) and NVDM (NVIDIA
Data Model) wire-format types used for communication between the kernel
driver and GPU firmware processors.

This includes typed MCTP transport headers, NVDM message headers, and
NVDM message type identifiers. Both the FSP boot path and the upcoming
GSP RPC message queue share this protocol layer.

Signed-off-by: John Hubbard &lt;jhubbard@nvidia.com&gt;
Reviewed-by: Eliot Courtney &lt;ecourtney@nvidia.com&gt;
Link: https://patch.msgid.link/20260603-b4-blackwell-v13-3-d9f3a06939e0@nvidia.com
Signed-off-by: Alexandre Courbot &lt;acourbot@nvidia.com&gt;
</content>
</entry>
</feed>
