<feed xmlns='http://www.w3.org/2005/Atom'>
<title>wireguard-linux/drivers/iommu/amd, branch stable</title>
<subtitle>WireGuard for the Linux kernel</subtitle>
<id>https://git.zx2c4.com/wireguard-linux/atom/drivers/iommu/amd?h=stable</id>
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<updated>2026-08-11T07:12:19Z</updated>
<entry>
<title>Merge branches 'arm/smmu/updates', 'arm/smmu/bindings', 'mediatek', 'qualcomm/msm', 'rockchip', 'ti/omap', 'riscv', 'intel/vt-d', 'amd/amd-vi', 'core' and 'typos' into next</title>
<updated>2026-08-11T07:12:19Z</updated>
<author>
<name>Joerg Roedel</name>
<email>joerg.roedel@amd.com</email>
</author>
<published>2026-08-11T07:12:19Z</published>
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<id>urn:sha1:3c6a2bac15247bc4f28125247ff89165324612fe</id>
<content type='text'>
</content>
</entry>
<entry>
<title>iommu/amd: Add SNP page mode 0 support</title>
<updated>2026-08-11T07:03:57Z</updated>
<author>
<name>Vasant Hegde</name>
<email>vasant.hegde@amd.com</email>
</author>
<published>2026-08-11T05:22:57Z</published>
<link rel='alternate' type='text/html' href='https://git.zx2c4.com/wireguard-linux/commit/?id=cb2860ad6c4ff7e15bb69c7e3a6842bbea743229'/>
<id>urn:sha1:cb2860ad6c4ff7e15bb69c7e3a6842bbea743229</id>
<content type='text'>
Newer AMD IOMMUs supports DTE[Mode]=0 for SNP-enabled system. This is
detected using new feature bit (EFR2[SNP_Page_Mode_0_Sup]). If this
feature is enabled, then IOMMU supports:
  - Passthrough mode (i.e. iommu=pt)
  - amd_iommu=pgtbl_v2: Forcing Linux DMA-API to use IOMMU v2 page table
  - Setting up device for SVA mode in the host.

Signed-off-by: Vasant Hegde &lt;vasant.hegde@amd.com&gt;
Reviewed-by: Suravee Suthikulpanit &lt;suravee.suthikulpanit@amd.com&gt;
Tested-by: Amandeep Kaur Longia &lt;AmandeepKaur.Longia@amd.com&gt;
Signed-off-by: Joerg Roedel &lt;joerg.roedel@amd.com&gt;
</content>
</entry>
<entry>
<title>iommu/amd: Fix GN bit setting in COMPLETE_PPR_REQUEST command</title>
<updated>2026-08-11T07:02:56Z</updated>
<author>
<name>Vasant Hegde</name>
<email>vasant.hegde@amd.com</email>
</author>
<published>2026-08-11T04:09:00Z</published>
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<id>urn:sha1:c94252cd5bbcdab3b1a9a25c638302678fa7721f</id>
<content type='text'>
The GN bit in the COMPLETE_PPR_REQUEST command indicates whether the
device is operating under a guest (v2) page table. Currently,
dev_data-&gt;pri_tlp is incorrectly used to derive this bit. However,
pri_tlp indicates whether the device uses PRI TLP which is unrelated
to page table mode.

Fix this by refactoring amd_iommu_complete_ppr() into a static internal
helper __amd_iommu_complete_ppr() that accepts an explicit 'gn' argument.
The amd_iommu_complete_ppr() wrapper then derives the GN bit correctly
from the device's active protection domain via pdom_is_v2_pgtbl_mode().

In the INVALID_PPR_REQUEST error handling path, the device's protection
domain may not be accessible, so derive the GN bit directly from the
EVENT_FLAG_PPR_GN flag in the event log entry instead.

While at it, change the 'gn' parameter type in build_complete_ppr()
from u8 to bool to better reflect its semantics.

Signed-off-by: Vasant Hegde &lt;vasant.hegde@amd.com&gt;
Reviewed-by: Ankit Soni &lt;Ankit.Soni@amd.com&gt;
Signed-off-by: Joerg Roedel &lt;joerg.roedel@amd.com&gt;
</content>
</entry>
<entry>
<title>iommu/amd: Rate limit INVALID_PPR_REQUEST error logging</title>
<updated>2026-08-11T07:02:56Z</updated>
<author>
<name>Vasant Hegde</name>
<email>vasant.hegde@amd.com</email>
</author>
<published>2026-08-11T04:08:59Z</published>
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<id>urn:sha1:abdbd786c5c7f45afb4b65a3603af059104bf5b4</id>
<content type='text'>
The amd_iommu_report_ppr_err() function logs an error message for every
INVALID_PPR_REQUEST event. Under certain fault conditions, a misbehaving
or malicious device can flood the IOMMU event log with PPR faults, causing
the kernel log to be overwhelmed with repeated error messages.

Switch from dev_err() to dev_err_ratelimited() to suppress duplicate
messages when INVALID_PPR_REQUEST events occur at a high rate.

Signed-off-by: Vasant Hegde &lt;vasant.hegde@amd.com&gt;
Reviewed-by: Ankit Soni &lt;Ankit.Soni@amd.com&gt;
Signed-off-by: Joerg Roedel &lt;joerg.roedel@amd.com&gt;
</content>
</entry>
<entry>
<title>iommu/amd: Fix missing CMD_COMPLETE_PPR response for invalid PPR requests</title>
<updated>2026-08-11T07:02:55Z</updated>
<author>
<name>Vasant Hegde</name>
<email>vasant.hegde@amd.com</email>
</author>
<published>2026-08-11T04:08:58Z</published>
<link rel='alternate' type='text/html' href='https://git.zx2c4.com/wireguard-linux/commit/?id=bc1f5ec826bfa510e7138e2be5aad23907850874'/>
<id>urn:sha1:bc1f5ec826bfa510e7138e2be5aad23907850874</id>
<content type='text'>
The AMD IOMMU spec, requires the host to respond with a CMD_COMPLETE_PPR
command when an EVENT_TYPE_INV_PPR_REQ event is received with the RX bit
cleared. This response was missing in the current implementation, leaving
invalid PPR requests unacknowledged.

Introduce amd_iommu_report_ppr_err() to handle EVENT_TYPE_INV_PPR_REQ
events. The new function logs the invalid PPR request and when the RX
bit is cleared, sends CMD_COMPLETE_PPR response.

Reported-by: Gaultier Delbarre &lt;Gaultier.Delbarre@amd.com&gt;
Co-developed-by: Wei Huang &lt;wei.huang2@amd.com&gt;
Signed-off-by: Wei Huang &lt;wei.huang2@amd.com&gt;
Signed-off-by: Vasant Hegde &lt;vasant.hegde@amd.com&gt;
Reviewed-by: Ankit Soni &lt;Ankit.Soni@amd.com&gt;
Signed-off-by: Joerg Roedel &lt;joerg.roedel@amd.com&gt;
</content>
</entry>
<entry>
<title>iommu/amd: Introduce PPR_TAG_LAST_PAGE() macro</title>
<updated>2026-08-11T07:02:55Z</updated>
<author>
<name>Vasant Hegde</name>
<email>vasant.hegde@amd.com</email>
</author>
<published>2026-08-11T04:08:57Z</published>
<link rel='alternate' type='text/html' href='https://git.zx2c4.com/wireguard-linux/commit/?id=589f0cc1e099720aaffe4abf2d4d1a19c62a975a'/>
<id>urn:sha1:589f0cc1e099720aaffe4abf2d4d1a19c62a975a</id>
<content type='text'>
The PPR tag field (PPRtag) encodes two distinct fields: the 9-bit tag
value (bits 8-0) and the last-page indicator L bit (bit 9).

Fix PPR_TAG() to mask only the 9-bit tag field and introduce
PPR_TAG_LAST_PAGE to explicitly extract the L bit. This way it becomes
easy to read.

Cc: Wei Huang &lt;wei.huang2@amd.com&gt;
Signed-off-by: Vasant Hegde &lt;vasant.hegde@amd.com&gt;
Reviewed-by: Ankit Soni &lt;Ankit.Soni@amd.com&gt;
Signed-off-by: Joerg Roedel &lt;joerg.roedel@amd.com&gt;
</content>
</entry>
<entry>
<title>iommu/amd: Fix incorrect device ID in invalid PASID error message</title>
<updated>2026-08-11T07:02:55Z</updated>
<author>
<name>Vasant Hegde</name>
<email>vasant.hegde@amd.com</email>
</author>
<published>2026-08-11T04:08:56Z</published>
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<id>urn:sha1:5322e19fc5acf013784207bc38191cd418a8bb48</id>
<content type='text'>
The IO page fault notifier handler logs pdev-&gt;dev.id when reporting an
invalid PASID, but pdev-&gt;dev.id is the kernel-internal device ID and
not the IOMMU device ID (BDF). Use dev_data-&gt;devid instead, which
reflects actual devid.

Fixes: 978d626b8f1a ("iommu/amd: Add IO page fault notifier handler")
Signed-off-by: Vasant Hegde &lt;vasant.hegde@amd.com&gt;
Reviewed-by: Ankit Soni &lt;Ankit.Soni@amd.com&gt;
Signed-off-by: Joerg Roedel &lt;joerg.roedel@amd.com&gt;
</content>
</entry>
<entry>
<title>iommu/amd: Put PCI device after handling PPR faults</title>
<updated>2026-07-30T12:51:15Z</updated>
<author>
<name>Shuai Xue</name>
<email>xueshuai@linux.alibaba.com</email>
</author>
<published>2026-07-27T03:02:12Z</published>
<link rel='alternate' type='text/html' href='https://git.zx2c4.com/wireguard-linux/commit/?id=af3b69b16383fbc8fe5f61b5b0150d2e41ede71f'/>
<id>urn:sha1:af3b69b16383fbc8fe5f61b5b0150d2e41ede71f</id>
<content type='text'>
iommu_call_iopf_notifier() looks up the requester with
pci_get_domain_bus_and_slot(), which returns a PCI device with its
reference count incremented.

Neither the successful iommu_report_device_fault() path nor the abort
path drops that reference, so every handled PPR request leaks a PCI
device reference.

This is the same ownership rule that was fixed for the old iommu_v2
ppr_notifier() path by commit 6cf0981c2233 ("iommu/amd: Fix pci device
refcount leak in ppr_notifier()"), but iommu_call_iopf_notifier() was
added later as a separate PPR/IOPF notifier path.

Drop the PCI device reference after handling the PPR entry.

Fixes: 978d626b8f1a ("iommu/amd: Add IO page fault notifier handler")
Cc: stable@vger.kernel.org
Assisted-by: Qoder:Qwen-3.8-MAX-Preview
Signed-off-by: Shuai Xue &lt;xueshuai@linux.alibaba.com&gt;
Reviewed-by: Vasant Hegde &lt;vasant.hegde@amd.com&gt;
Signed-off-by: Joerg Roedel &lt;joerg.roedel@amd.com&gt;
</content>
</entry>
<entry>
<title>iommu/amd: Fix undefined behavior in devid_write debugfs function</title>
<updated>2026-07-22T12:32:50Z</updated>
<author>
<name>Li RongQing</name>
<email>lirongqing@baidu.com</email>
</author>
<published>2026-06-01T12:12:40Z</published>
<link rel='alternate' type='text/html' href='https://git.zx2c4.com/wireguard-linux/commit/?id=843e149989665f8309ad2efe6048dc76591e1f94'/>
<id>urn:sha1:843e149989665f8309ad2efe6048dc76591e1f94</id>
<content type='text'>
When for_each_pci_segment() loop completes without finding a matching
segment, the pci_seg pointer is not NULL but points to an invalid memory
location (the list head). Accessing pci_seg-&gt;id after the loop causes
undefined behavior.

Fix this by handling the successful case inside the loop and returning
-EINVAL after the loop if no matching segment is found.

Fixes: 2e98940f123d9 ("iommu/amd: Add support for device id user input")
Signed-off-by: Li RongQing &lt;lirongqing@baidu.com&gt;
Reviewed-by: Ankit Soni &lt;Ankit.Soni@amd.com&gt;
Signed-off-by: Will Deacon &lt;will@kernel.org&gt;
</content>
</entry>
<entry>
<title>iommu/amd: Fix grammar and typos in comments</title>
<updated>2026-07-22T12:31:31Z</updated>
<author>
<name>xiongweimin</name>
<email>xiongweimin@kylinos.cn</email>
</author>
<published>2026-07-14T02:44:45Z</published>
<link rel='alternate' type='text/html' href='https://git.zx2c4.com/wireguard-linux/commit/?id=57bd32b2affb1b7a2ef9e7002e14a6090b990f94'/>
<id>urn:sha1:57bd32b2affb1b7a2ef9e7002e14a6090b990f94</id>
<content type='text'>
Correct possessive "its", article before acpihid, and a couple of
mangled sentences in IOMMU flush/irq comments.

Signed-off-by: xiongweimin &lt;xiongweimin@kylinos.cn&gt;
Reviewed-by: Ankit Soni &lt;Ankit.Soni@amd.com&gt;
Signed-off-by: Will Deacon &lt;will@kernel.org&gt;
</content>
</entry>
</feed>
