<feed xmlns='http://www.w3.org/2005/Atom'>
<title>wireguard-linux/drivers/mtd/nand/raw, branch jd/unified-crypt-queue</title>
<subtitle>WireGuard for the Linux kernel</subtitle>
<id>https://git.zx2c4.com/wireguard-linux/atom/drivers/mtd/nand/raw?h=jd%2Funified-crypt-queue</id>
<link rel='self' href='https://git.zx2c4.com/wireguard-linux/atom/drivers/mtd/nand/raw?h=jd%2Funified-crypt-queue'/>
<link rel='alternate' type='text/html' href='https://git.zx2c4.com/wireguard-linux/'/>
<updated>2020-03-30T08:14:54Z</updated>
<entry>
<title>mtd: Convert fallthrough comments into statements</title>
<updated>2020-03-30T08:14:54Z</updated>
<author>
<name>Miquel Raynal</name>
<email>miquel.raynal@bootlin.com</email>
</author>
<published>2020-03-25T21:21:15Z</published>
<link rel='alternate' type='text/html' href='https://git.zx2c4.com/wireguard-linux/commit/?id=025a06c1104cd8995646b761d117816b5f28c873'/>
<id>urn:sha1:025a06c1104cd8995646b761d117816b5f28c873</id>
<content type='text'>
Use Joe Perches cvt_fallthrough.pl script to convert

	/* fallthrough */

comments (and its derivatives) into a

	fallthrough;

statement. This automatically drops useless ones.

Do it MTD-wide.

Signed-off-by: Miquel Raynal &lt;miquel.raynal@bootlin.com&gt;
Acked-by: Vignesh Raghavendra &lt;vigneshr@ti.com&gt;
Acked-by: Tudor Ambarus &lt;tudor.ambarus@microchip.com&gt;
Acked-by: Richard Weinberger &lt;richard@nod.at&gt;
Link: https://lore.kernel.org/linux-mtd/20200325212115.14170-1-miquel.raynal@bootlin.com
</content>
</entry>
<entry>
<title>Merge tag 'nand/for-5.7' into mtd/next</title>
<updated>2020-03-30T08:14:19Z</updated>
<author>
<name>Miquel Raynal</name>
<email>miquel.raynal@bootlin.com</email>
</author>
<published>2020-03-30T08:14:19Z</published>
<link rel='alternate' type='text/html' href='https://git.zx2c4.com/wireguard-linux/commit/?id=699274b1a1272601eaa379973d10a503a60bef5d'/>
<id>urn:sha1:699274b1a1272601eaa379973d10a503a60bef5d</id>
<content type='text'>
Raw NAND core changes:
* Add support for manufacturer specific suspend/resume operation
* Add support for manufacturer specific lock/unlock operation
* Replace zero-length array with flexible-array member
* Fix a typo ("manufecturer")
* Ensure nand_soft_waitrdy wait period is enough

Raw NAND controller driver changes:
* Brcmnand:
Add support for flash-edu for dma transfers (+ bindings)
* Cadence:
Reinit completion before executing a new command
Change bad block marker size
Fix the calculation of the avaialble OOB size
Get meta data size from registers
* Qualcom:
Use dma_request_chan() instead dma_request_slave_channel()
Release resources on failure within qcom_nandc_alloc()
* Allwinner:
Use dma_request_chan() instead dma_request_slave_channel()
* Marvell:
Use dma_request_chan() instead dma_request_slave_channel()
Release DMA channel on error
* Freescale:
Use dma_request_chan() instead dma_request_slave_channel()
* Macronix:
Add support for Macronix NAND randomizer (+ bindings)
* Ams-delta:
Rename structures and functions to gpio_nand*
Make the driver custom I/O ready
Drop useless local variable
Support custom driver initialisation
Add module device tables
Handle more GPIO pins as optional
Make read pulses optional
Don't hardcode read/write pulse widths
Push inversion handling to gpiolib
Enable OF partition info support
Drop board specific partition info
Use struct gpio_nand_platdata
Write protect device during probe
* Ingenic:
Use devm_platform_ioremap_resource()
Add dependency on MIPS || COMPILE_TEST
* Denali:
Deassert write protect pin
* ST:
Use dma_request_chan() instead dma_request_slave_channel()

Raw NAND chip driver changes:
* Toshiba:
Support reading the number of bitflips for BENAND (Built-in ECC NAND)
* Macronix:
Add support for deep power down mode
Add support for block protection

SPI-NAND core changes:
* Do not erase the block before writing a bad block marker
* Explicitly use MTD_OPS_RAW to write the bad block marker to OOB
* Stop using spinand-&gt;oobbuf for buffering bad block markers
* Rework detect procedure for different READ_ID operation

SPI-NAND driver changes:
* Toshiba:
Support for new Kioxia Serial NAND
Rename function name to change suffix and prefix (8Gbit)
Add comment about Kioxia ID
* Micron:
Add new Micron SPI NAND devices with multiple dies
Add M70A series Micron SPI NAND devices
identify SPI NAND device with Continuous Read mode
Add new Micron SPI NAND devices
Describe the SPI NAND device MT29F2G01ABAGD
Generalize the OOB layout structure and function names
</content>
</entry>
<entry>
<title>mtd: rawnand: toshiba: Support reading the number of bitflips for BENAND (Built-in ECC NAND)</title>
<updated>2020-03-25T21:13:04Z</updated>
<author>
<name>Yoshio Furuyama</name>
<email>ytc-mb-yfuruyama7@kioxia.com</email>
</author>
<published>2020-03-25T08:22:52Z</published>
<link rel='alternate' type='text/html' href='https://git.zx2c4.com/wireguard-linux/commit/?id=fca88925d76978b7f20de42d8ead34fb91500003'/>
<id>urn:sha1:fca88925d76978b7f20de42d8ead34fb91500003</id>
<content type='text'>
Add support vendor specific commands for KIOXIA CORPORATION BENAND.
The actual bitflips number can be retrieved by this command.

Signed-off-by: Yoshio Furuyama &lt;ytc-mb-yfuruyama7@kioxia.com&gt;
Signed-off-by: Miquel Raynal &lt;miquel.raynal@bootlin.com&gt;
Link: https://lore.kernel.org/linux-mtd/1585124572-4693-1-git-send-email-ytc-mb-yfuruyama7@kioxia.com
</content>
</entry>
<entry>
<title>mtd: rawnand: macronix: Add support for deep power down mode</title>
<updated>2020-03-24T21:51:01Z</updated>
<author>
<name>Mason Yang</name>
<email>masonccyang@mxic.com.tw</email>
</author>
<published>2020-03-18T07:42:28Z</published>
<link rel='alternate' type='text/html' href='https://git.zx2c4.com/wireguard-linux/commit/?id=19301d54997df35e9829b4f707c59f3284530d71'/>
<id>urn:sha1:19301d54997df35e9829b4f707c59f3284530d71</id>
<content type='text'>
Macronix AD series support deep power down mode for a minimum
power consumption state.

Overload nand_suspend() &amp; nand_resume() in Macronix specific code to
support deep power down mode.

Signed-off-by: Mason Yang &lt;masonccyang@mxic.com.tw&gt;
Signed-off-by: Miquel Raynal &lt;miquel.raynal@bootlin.com&gt;
</content>
</entry>
<entry>
<title>mtd: rawnand: Add support for manufacturer specific suspend/resume operation</title>
<updated>2020-03-24T21:44:45Z</updated>
<author>
<name>Mason Yang</name>
<email>masonccyang@mxic.com.tw</email>
</author>
<published>2020-03-18T07:42:27Z</published>
<link rel='alternate' type='text/html' href='https://git.zx2c4.com/wireguard-linux/commit/?id=adc6162b9a0c60a81cf6a107196924526cd186f6'/>
<id>urn:sha1:adc6162b9a0c60a81cf6a107196924526cd186f6</id>
<content type='text'>
Patch nand_suspend() &amp; nand_resume() to let manufacturers overwrite
suspend/resume operations.

Signed-off-by: Mason Yang &lt;masonccyang@mxic.com.tw&gt;
Reviewed-by: Miquel Raynal &lt;miquel.raynal@bootlin.com&gt;
Signed-off-by: Miquel Raynal &lt;miquel.raynal@bootlin.com&gt;
Link: https://lore.kernel.org/linux-mtd/1584517348-14486-2-git-send-email-masonccyang@mxic.com.tw
</content>
</entry>
<entry>
<title>mtd: rawnand: brcmnand: Add support for flash-edu for dma transfers</title>
<updated>2020-03-11T15:21:38Z</updated>
<author>
<name>Kamal Dasu</name>
<email>kdasu.kdev@gmail.com</email>
</author>
<published>2020-01-22T21:33:13Z</published>
<link rel='alternate' type='text/html' href='https://git.zx2c4.com/wireguard-linux/commit/?id=a5d53ad26a8b441325eb9de8e9bb816584ebca7c'/>
<id>urn:sha1:a5d53ad26a8b441325eb9de8e9bb816584ebca7c</id>
<content type='text'>
Legacy mips soc platforms that have controller v5.0 and 6.0 use
flash-edu block for dma transfers. This change adds support for
nand dma transfers using the EDU block.

Signed-off-by: Kamal Dasu &lt;kdasu.kdev@gmail.com&gt;
Signed-off-by: Miquel Raynal &lt;miquel.raynal@bootlin.com&gt;
Link: https://lore.kernel.org/linux-mtd/20200122213313.35820-4-kdasu.kdev@gmail.com
</content>
</entry>
<entry>
<title>mtd: rawnand: cadence: reinit completion before executing a new command</title>
<updated>2020-03-11T15:17:55Z</updated>
<author>
<name>Piotr Sroka</name>
<email>piotrs@cadence.com</email>
</author>
<published>2020-02-10T09:55:28Z</published>
<link rel='alternate' type='text/html' href='https://git.zx2c4.com/wireguard-linux/commit/?id=0d7d6c8183aadb1dcc13f415941404a7913b46b3'/>
<id>urn:sha1:0d7d6c8183aadb1dcc13f415941404a7913b46b3</id>
<content type='text'>
Reing the completion object before executing CDMA command to make sure
the 'done' flag is OK.

Fixes: ec4ba01e894d ("mtd: rawnand: Add new Cadence NAND driver to MTD subsystem")
Cc: stable@vger.kernel.org
Signed-off-by: Piotr Sroka &lt;piotrs@cadence.com&gt;
Signed-off-by: Miquel Raynal &lt;miquel.raynal@bootlin.com&gt;
Link: https://lore.kernel.org/linux-mtd/1581328530-29966-4-git-send-email-piotrs@cadence.com
</content>
</entry>
<entry>
<title>mtd: rawnand: cadence: change bad block marker size</title>
<updated>2020-03-11T15:17:55Z</updated>
<author>
<name>Piotr Sroka</name>
<email>piotrs@cadence.com</email>
</author>
<published>2020-02-10T09:55:27Z</published>
<link rel='alternate' type='text/html' href='https://git.zx2c4.com/wireguard-linux/commit/?id=9bf1903bed7a2e84f5a8deedb38f7e0ac5e8bfc6'/>
<id>urn:sha1:9bf1903bed7a2e84f5a8deedb38f7e0ac5e8bfc6</id>
<content type='text'>
Increase bad block marker size from one byte to two bytes.
Bad block marker is handled by skip bytes feature of HPNFC.
Controller expects this value to be an even number.

Fixes: ec4ba01e894d ("mtd: rawnand: Add new Cadence NAND driver to MTD subsystem")
Cc: stable@vger.kernel.org
Signed-off-by: Piotr Sroka &lt;piotrs@cadence.com&gt;
Signed-off-by: Miquel Raynal &lt;miquel.raynal@bootlin.com&gt;
Link: https://lore.kernel.org/linux-mtd/1581328530-29966-3-git-send-email-piotrs@cadence.com
</content>
</entry>
<entry>
<title>mtd: rawnand: cadence: fix the calculation of the avaialble OOB size</title>
<updated>2020-03-11T15:17:55Z</updated>
<author>
<name>Piotr Sroka</name>
<email>piotrs@cadence.com</email>
</author>
<published>2020-02-10T09:55:26Z</published>
<link rel='alternate' type='text/html' href='https://git.zx2c4.com/wireguard-linux/commit/?id=e4578af0354176ff6b4ae78b9998b4f479f7c31c'/>
<id>urn:sha1:e4578af0354176ff6b4ae78b9998b4f479f7c31c</id>
<content type='text'>
The value of cdns_chip-&gt;sector_count is not known at the moment
of the derivation of ecc_size, leading to a zero value. Fix
this by assigning ecc_size later in the code.

Fixes: ec4ba01e894d ("mtd: rawnand: Add new Cadence NAND driver to MTD subsystem")
Cc: stable@vger.kernel.org
Signed-off-by: Piotr Sroka &lt;piotrs@cadence.com&gt;
Signed-off-by: Miquel Raynal &lt;miquel.raynal@bootlin.com&gt;
Link: https://lore.kernel.org/linux-mtd/1581328530-29966-2-git-send-email-piotrs@cadence.com
</content>
</entry>
<entry>
<title>mtd: rawnand: cadence: get meta data size from registers</title>
<updated>2020-03-11T15:17:55Z</updated>
<author>
<name>Piotr Sroka</name>
<email>piotrs@cadence.com</email>
</author>
<published>2020-02-10T09:55:25Z</published>
<link rel='alternate' type='text/html' href='https://git.zx2c4.com/wireguard-linux/commit/?id=397deafc02e1b91668fa1ee95fdd52d14fa82135'/>
<id>urn:sha1:397deafc02e1b91668fa1ee95fdd52d14fa82135</id>
<content type='text'>
Add checking size of BCH meta data size in capabilities registers
instead of using fixed value. BCH meta data is used to keep data
from NAND flash OOB area.

Signed-off-by: Piotr Sroka &lt;piotrs@cadence.com&gt;
Signed-off-by: Miquel Raynal &lt;miquel.raynal@bootlin.com&gt;
Link: https://lore.kernel.org/linux-mtd/1581328530-29966-1-git-send-email-piotrs@cadence.com
</content>
</entry>
</feed>
