wireguard-linux/drivers/mtd/nand, branch jd/unified-crypt-queue

mtd: Convert fallthrough comments into statements

2020-03-30T08:14:54Z

Use Joe Perches cvt_fallthrough.pl script to convert /* fallthrough */ comments (and its derivatives) into a fallthrough; statement. This automatically drops useless ones. Do it MTD-wide. Signed-off-by: Miquel Raynal Acked-by: Vignesh Raghavendra Acked-by: Tudor Ambarus Acked-by: Richard Weinberger Link: https://lore.kernel.org/linux-mtd/20200325212115.14170-1-miquel.raynal@bootlin.com

Merge tag 'nand/for-5.7' into mtd/next

2020-03-30T08:14:19Z

Raw NAND core changes: * Add support for manufacturer specific suspend/resume operation * Add support for manufacturer specific lock/unlock operation * Replace zero-length array with flexible-array member * Fix a typo ("manufecturer") * Ensure nand_soft_waitrdy wait period is enough Raw NAND controller driver changes: * Brcmnand: Add support for flash-edu for dma transfers (+ bindings) * Cadence: Reinit completion before executing a new command Change bad block marker size Fix the calculation of the avaialble OOB size Get meta data size from registers * Qualcom: Use dma_request_chan() instead dma_request_slave_channel() Release resources on failure within qcom_nandc_alloc() * Allwinner: Use dma_request_chan() instead dma_request_slave_channel() * Marvell: Use dma_request_chan() instead dma_request_slave_channel() Release DMA channel on error * Freescale: Use dma_request_chan() instead dma_request_slave_channel() * Macronix: Add support for Macronix NAND randomizer (+ bindings) * Ams-delta: Rename structures and functions to gpio_nand* Make the driver custom I/O ready Drop useless local variable Support custom driver initialisation Add module device tables Handle more GPIO pins as optional Make read pulses optional Don't hardcode read/write pulse widths Push inversion handling to gpiolib Enable OF partition info support Drop board specific partition info Use struct gpio_nand_platdata Write protect device during probe * Ingenic: Use devm_platform_ioremap_resource() Add dependency on MIPS || COMPILE_TEST * Denali: Deassert write protect pin * ST: Use dma_request_chan() instead dma_request_slave_channel() Raw NAND chip driver changes: * Toshiba: Support reading the number of bitflips for BENAND (Built-in ECC NAND) * Macronix: Add support for deep power down mode Add support for block protection SPI-NAND core changes: * Do not erase the block before writing a bad block marker * Explicitly use MTD_OPS_RAW to write the bad block marker to OOB * Stop using spinand->oobbuf for buffering bad block markers * Rework detect procedure for different READ_ID operation SPI-NAND driver changes: * Toshiba: Support for new Kioxia Serial NAND Rename function name to change suffix and prefix (8Gbit) Add comment about Kioxia ID * Micron: Add new Micron SPI NAND devices with multiple dies Add M70A series Micron SPI NAND devices identify SPI NAND device with Continuous Read mode Add new Micron SPI NAND devices Describe the SPI NAND device MT29F2G01ABAGD Generalize the OOB layout structure and function names

mtd: rawnand: toshiba: Support reading the number of bitflips for BENAND (Built-in ECC NAND)

2020-03-25T21:13:04Z

Add support vendor specific commands for KIOXIA CORPORATION BENAND. The actual bitflips number can be retrieved by this command. Signed-off-by: Yoshio Furuyama Signed-off-by: Miquel Raynal Link: https://lore.kernel.org/linux-mtd/1585124572-4693-1-git-send-email-ytc-mb-yfuruyama7@kioxia.com

mtd: spinand: toshiba: Support for new Kioxia Serial NAND

2020-03-24T21:51:22Z

Add support for new Kioxia products. The new Kioxia products support program load x4 command, and have HOLD_D bit which is equivalent to QE bit. Signed-off-by: Yoshio Furuyama Reviewed-by: Frieder Schrempf Signed-off-by: Miquel Raynal Link: https://lore.kernel.org/linux-mtd/aa69e455beedc5ce0d7141359b9364ed8aec9e65.1584949601.git.ytc-mb-yfuruyama7@kioxia.com

mtd: spinand: toshiba: Rename function name to change suffix and prefix (8Gbit)

2020-03-24T21:51:19Z

The suffix was changed from "G" to "J" to classify between 1st generation and 2nd generation serial NAND devices (which now belong to the Kioxia brand). As reference that's 1st generation device of 1Gbit product is "TC58CVG0S3HRAIG" 2nd generation device of 1Gbit product is "TC58CVG0S3HRAIJ". The 8Gbit type "TH58CxG3S0HRAIJ" is new to Kioxia's serial NAND lineup and the prefix was changed from "TC58" to "TH58". Thus the functions were renamed from tc58cxgxsx_*() to tx58cxgxsxraix_*(). Signed-off-by: Yoshio Furuyama Reviewed-by: Frieder Schrempf Signed-off-by: Miquel Raynal Link: https://lore.kernel.org/linux-mtd/0dedd9869569a17625822dba87878254d253ba0e.1584949601.git.ytc-mb-yfuruyama7@kioxia.com

mtd: rawnand: macronix: Add support for deep power down mode

2020-03-24T21:51:01Z

Macronix AD series support deep power down mode for a minimum power consumption state. Overload nand_suspend() & nand_resume() in Macronix specific code to support deep power down mode. Signed-off-by: Mason Yang Signed-off-by: Miquel Raynal

mtd: rawnand: Add support for manufacturer specific suspend/resume operation

2020-03-24T21:44:45Z

Patch nand_suspend() & nand_resume() to let manufacturers overwrite suspend/resume operations. Signed-off-by: Mason Yang Reviewed-by: Miquel Raynal Signed-off-by: Miquel Raynal Link: https://lore.kernel.org/linux-mtd/1584517348-14486-2-git-send-email-masonccyang@mxic.com.tw

mtd: spinand: micron: Add new Micron SPI NAND devices with multiple dies

2020-03-12T12:33:36Z

Add device table for new Micron SPI NAND devices, which have multiple dies. Also, enable support to select the dies. Signed-off-by: Shivamurthy Shastri Reviewed-by: Boris Brezillon Signed-off-by: Miquel Raynal Link: https://lore.kernel.org/linux-mtd/20200311175735.2007-7-sshivamurthy@micron.com

mtd: spinand: micron: Add M70A series Micron SPI NAND devices

2020-03-12T12:33:34Z

Add device table for M70A series Micron SPI NAND devices. Signed-off-by: Shivamurthy Shastri Reviewed-by: Boris Brezillon Signed-off-by: Miquel Raynal Link: https://lore.kernel.org/linux-mtd/20200311175735.2007-6-sshivamurthy@micron.com

mtd: spinand: micron: identify SPI NAND device with Continuous Read mode

2020-03-12T12:33:32Z

Add SPINAND_HAS_CR_FEAT_BIT flag to identify the SPI NAND device with the Continuous Read mode. Some of the Micron SPI NAND devices have the "Continuous Read" feature enabled by default, which does not fit the subsystem needs. In this mode, the READ CACHE command doesn't require the starting column address. The device always output the data starting from the first column of the cache register, and once the end of the cache register reached, the data output continues through the next page. With the continuous read mode, it is possible to read out the entire block using a single READ command, and once the end of the block reached, the output pins become High-Z state. However, during this mode the read command doesn't output the OOB area. Hence, we disable the feature at probe time. Signed-off-by: Shivamurthy Shastri Reviewed-by: Boris Brezillon Signed-off-by: Miquel Raynal Link: https://lore.kernel.org/linux-mtd/20200311175735.2007-5-sshivamurthy@micron.com