<feed xmlns='http://www.w3.org/2005/Atom'>
<title>wireguard-linux/drivers/net/ixgbe, branch stable</title>
<subtitle>WireGuard for the Linux kernel</subtitle>
<id>https://git.zx2c4.com/wireguard-linux/atom/drivers/net/ixgbe?h=stable</id>
<link rel='self' href='https://git.zx2c4.com/wireguard-linux/atom/drivers/net/ixgbe?h=stable'/>
<link rel='alternate' type='text/html' href='https://git.zx2c4.com/wireguard-linux/'/>
<updated>2011-08-11T03:03:27Z</updated>
<entry>
<title>intel: Move the Intel wired LAN drivers</title>
<updated>2011-08-11T03:03:27Z</updated>
<author>
<name>Jeff Kirsher</name>
<email>jeffrey.t.kirsher@intel.com</email>
</author>
<published>2011-04-07T14:42:33Z</published>
<link rel='alternate' type='text/html' href='https://git.zx2c4.com/wireguard-linux/commit/?id=dee1ad47f2ee75f5146d83ca757c1b7861c34c3b'/>
<id>urn:sha1:dee1ad47f2ee75f5146d83ca757c1b7861c34c3b</id>
<content type='text'>
Moves the Intel wired LAN drivers into drivers/net/ethernet/intel/ and
the necessary Kconfig and Makefile changes.

Signed-off-by: Jeff Kirsher &lt;jeffrey.t.kirsher@intel.com&gt;
</content>
</entry>
<entry>
<title>ixgbe: fix PHY link setup for 82599</title>
<updated>2011-08-04T12:06:13Z</updated>
<author>
<name>Emil Tantilov</name>
<email>emil.s.tantilov@intel.com</email>
</author>
<published>2011-07-28T06:17:04Z</published>
<link rel='alternate' type='text/html' href='https://git.zx2c4.com/wireguard-linux/commit/?id=b57e35bd0e545181c94405ce35b89000aed56cc5'/>
<id>urn:sha1:b57e35bd0e545181c94405ce35b89000aed56cc5</id>
<content type='text'>
Fix pointer to setup_link for 82599.

This resolves some link issues when advertising modes unsupported
by the link partner.

Signed-off-by: Emil Tantilov &lt;emil.s.tantilov@intel.com&gt;
Tested-by: Phil Schmitt &lt;phillip.j.schmitt@intel.com&gt;
Signed-off-by: Jeff Kirsher &lt;jeffrey.t.kirsher@intel.com&gt;
</content>
</entry>
<entry>
<title>ixgbe: fix __ixgbe_notify_dca() bail out code</title>
<updated>2011-08-04T12:03:27Z</updated>
<author>
<name>Don Skidmore</name>
<email>donald.c.skidmore@intel.com</email>
</author>
<published>2011-07-20T02:27:05Z</published>
<link rel='alternate' type='text/html' href='https://git.zx2c4.com/wireguard-linux/commit/?id=2a72c31ee4aa31b6a762390e4811a0edf5eefcef'/>
<id>urn:sha1:2a72c31ee4aa31b6a762390e4811a0edf5eefcef</id>
<content type='text'>
The way __ixgbe_notify_dca() was currently set up it would not be
possible to add a requester. Both cases of the IXGBE_FLAG_DCA_ENABLED
bit being on and off would lead to the function exiting for a
DCA_PROVIDER_ADD.

Signed-off-by: Don Skidmore &lt;donald.c.skidmore@intel.com&gt;
Tested-by: Phil Schmitt &lt;phillip.j.schmitt@intel.com&gt;
Signed-off-by: Jeff Kirsher &lt;jeffrey.t.kirsher@intel.com&gt;
</content>
</entry>
<entry>
<title>intel drivers: repair missing flush operations</title>
<updated>2011-08-04T11:59:07Z</updated>
<author>
<name>Jesse Brandeburg</name>
<email>jesse.brandeburg@intel.com</email>
</author>
<published>2011-07-20T00:56:21Z</published>
<link rel='alternate' type='text/html' href='https://git.zx2c4.com/wireguard-linux/commit/?id=945a51517cc0bd9e461f2018624dfc1faef9ddee'/>
<id>urn:sha1:945a51517cc0bd9e461f2018624dfc1faef9ddee</id>
<content type='text'>
after review of all intel drivers, found several instances where
drivers had the incorrect pattern of:
memory mapped write();
delay();

which should always be:
memory mapped write();
write flush(); /* aka memory mapped read */
delay();

explanation:
The reason for including the flush is that writes can be held
(posted) in PCI/PCIe bridges, but the read always has to complete
synchronously and therefore has to flush all pending writes to a
device.  If a write is held and followed by a delay, the delay
means nothing because the write may not have reached hardware
(maybe even not until the next read)

Signed-off-by: Jesse Brandeburg &lt;jesse.brandeburg@intel.com&gt;
Tested-by:  Aaron Brown &lt;aaron.f.brown@intel.com&gt;
Signed-off-by: Jeff Kirsher &lt;jeffrey.t.kirsher@intel.com&gt;
</content>
</entry>
<entry>
<title>ixgbe: convert to ndo_fix_features</title>
<updated>2011-07-22T05:57:38Z</updated>
<author>
<name>Don Skidmore</name>
<email>donald.c.skidmore@intel.com</email>
</author>
<published>2011-07-21T05:55:00Z</published>
<link rel='alternate' type='text/html' href='https://git.zx2c4.com/wireguard-linux/commit/?id=082757afcf7d6e44b24c4927ce5b158196d63e84'/>
<id>urn:sha1:082757afcf7d6e44b24c4927ce5b158196d63e84</id>
<content type='text'>
Private rx_csum flags are now duplicate of netdev-&gt;features &amp;
NETIF_F_RXCSUM.  We remove those duplicates and now use the net_device_ops
ndo_set_features.  This was based on the original patch submitted by
Michal Miroslaw &lt;mirq-linux@rere.qmqm.pl&gt;.  I also removed the special
case not requiring a reset for X540 hardware.  It is needed just as it is
in 82599 hardware.

Signed-off-by: Don Skidmore &lt;donald.c.skidmore@intel.com&gt;
Cc:  Michal Miroslaw &lt;mirq-linux@rere.qmqm.pl&gt;
Tested-by: Phil Schmitt &lt;phillip.j.schmitt@intel.com&gt;
Signed-off-by: Jeff Kirsher &lt;jeffrey.t.kirsher@intel.com&gt;
</content>
</entry>
<entry>
<title>ixgbe: only enable WoL for magic packet by default</title>
<updated>2011-07-22T05:57:15Z</updated>
<author>
<name>Andy Gospodarek</name>
<email>andy@greyhouse.net</email>
</author>
<published>2011-07-16T07:31:33Z</published>
<link rel='alternate' type='text/html' href='https://git.zx2c4.com/wireguard-linux/commit/?id=9417c464ba834ae29982fcd71bc59dc8e734327c'/>
<id>urn:sha1:9417c464ba834ae29982fcd71bc59dc8e734327c</id>
<content type='text'>
Martin Wilck &lt;martin.wilck@ts.fujitsu.com&gt; reported that systems using
the ixgbe-driver that were capable of WoL were rebooting almost as soon
as they were shut down.  This is because the default WoL settings
enabled magic packet, broadcast, unicast, and multicast.

Other Intel devices seem to use the stored eeprom value for initial WoL
capabilities.  The 82578DM (e1000e) and 82576 (igb) the devices I looked
at had only the magic packet enabled in the eeprom, so that seems
appropriate on ixgbe-based devices as well.  I set the WoL options on my
82578DM to be the same default as the ixgbe devices (umbg) and saw the
same as Martin -- almost as soon as my box shutdown, it booted again.

This patch changes the default to only be the magic packet.  This is the
same as the default for most Intel and non-Intel hardware currently
upstream.

Signed-off-by: Andy Gospodarek &lt;andy@greyhouse.net&gt;
CC: Martin Wilck &lt;martin.wilck@ts.fujitsu.com&gt;
Tested-by: Phil Schmitt &lt;phillip.j.schmitt@intel.com&gt;
Signed-off-by: Jeff Kirsher &lt;jeffrey.t.kirsher@intel.com&gt;
</content>
</entry>
<entry>
<title>ixgbe: remove ifdef check for non-existent define</title>
<updated>2011-07-22T05:57:00Z</updated>
<author>
<name>Emil Tantilov</name>
<email>emil.s.tantilov@intel.com</email>
</author>
<published>2011-07-12T08:13:41Z</published>
<link rel='alternate' type='text/html' href='https://git.zx2c4.com/wireguard-linux/commit/?id=34c6ee8181d6ec1ed761ed2fdac4f1b0358e5447'/>
<id>urn:sha1:34c6ee8181d6ec1ed761ed2fdac4f1b0358e5447</id>
<content type='text'>
Signed-off-by: Emil Tantilov &lt;emil.s.tantilov@intel.com&gt;
Tested-by: Phil Schmitt &lt;phillip.j.schmitt@intel.com&gt;
Signed-off-by: Jeff Kirsher &lt;jeffrey.t.kirsher@intel.com&gt;
</content>
</entry>
<entry>
<title>ixgbe: Pass staterr instead of re-reading status and error bits from descriptor</title>
<updated>2011-07-22T05:56:37Z</updated>
<author>
<name>Alexander Duyck</name>
<email>alexander.h.duyck@intel.com</email>
</author>
<published>2011-06-11T01:45:13Z</published>
<link rel='alternate' type='text/html' href='https://git.zx2c4.com/wireguard-linux/commit/?id=ff886dfce2bdacbe71583ec973cec117973d8859'/>
<id>urn:sha1:ff886dfce2bdacbe71583ec973cec117973d8859</id>
<content type='text'>
This change is meant to address possible race conditions from the status
and error bits on the RX descriptors being re-read by multiple functions in
the RX cleanup path.  To resolve this I have added code that will pass the
staterr value to those functions.

Signed-off-by: Alexander Duyck &lt;alexander.h.duyck@intel.com&gt;
Tested-by: Ross Brattain &lt;ross.b.brattain@intel.com&gt;
Signed-off-by: Jeff Kirsher &lt;jeffrey.t.kirsher@intel.com&gt;
</content>
</entry>
<entry>
<title>ixgbe: Move interrupt related values out of ring and into q_vector</title>
<updated>2011-07-22T05:56:17Z</updated>
<author>
<name>Alexander Duyck</name>
<email>alexander.h.duyck@intel.com</email>
</author>
<published>2011-06-11T01:45:08Z</published>
<link rel='alternate' type='text/html' href='https://git.zx2c4.com/wireguard-linux/commit/?id=bd19805803a954415ec36a559fd3b8a0a3647d7c'/>
<id>urn:sha1:bd19805803a954415ec36a559fd3b8a0a3647d7c</id>
<content type='text'>
This change moves work_limit, total_packets, and total_bytes into the ring
container struct of the q_vector.  The advantage of this is that it should
reduce the size of memory used in the event of multiple rings being
assigned to a single q_vector.  In addition it should help to reduce the
total workload for calculating itr since now total_packets and total_bytes
will be the total work done of the interrupt instead of for the ring.

Signed-off-by: Alexander Duyck &lt;alexander.h.duyck@intel.com&gt;
Tested-by: Ross Brattain &lt;ross.b.brattain@intel.com&gt;
Signed-off-by: Jeff Kirsher &lt;jeffrey.t.kirsher@intel.com&gt;
</content>
</entry>
<entry>
<title>ixgbe: add structure for containing RX/TX rings to q_vector</title>
<updated>2011-07-22T05:55:56Z</updated>
<author>
<name>Alexander Duyck</name>
<email>alexander.h.duyck@intel.com</email>
</author>
<published>2011-06-11T01:45:03Z</published>
<link rel='alternate' type='text/html' href='https://git.zx2c4.com/wireguard-linux/commit/?id=08c8833b29cfa4343ff132eebc5648b234eb3f85'/>
<id>urn:sha1:08c8833b29cfa4343ff132eebc5648b234eb3f85</id>
<content type='text'>
This patch adds support for a ring container structure to be used within
the q_vector.  The basic idea is to provide a means of separating the RX
and TX rings while maintaining a common structure for their containment.
The advantage to this is that later we should be able to pass this
structure to the update_itr functions without needing to pass individual
rings.

Signed-off-by: Alexander Duyck &lt;alexander.h.duyck@intel.com&gt;
Tested-by: Ross Brattain &lt;ross.b.brattain@intel.com&gt;
Signed-off-by: Jeff Kirsher &lt;jeffrey.t.kirsher@intel.com&gt;
</content>
</entry>
</feed>
