wireguard-linux/drivers/pci/controller/dwc/Kconfig, branch stable

Merge branch 'pci/controller/dwc-rcar-gen4'

2026-08-21T21:40:43Z

- When MSI is enabled but iMSI-RX is not used, configure AXIINTC to allow GIT ITS to handle MSI (Marek Vasut) - Refactor GIC600 implementation to make it easier to add platforms that only support 32-bit addressing (Marek Vasut) - Add Renesas R-Car Gen4 S4/V4H/V4M to the list of GIC600 integrations that only support 32-bit addressing (Marek Vasut) * pci/controller/dwc-rcar-gen4: irqchip/gic-v3: Add Renesas R-Car Gen4 erratum workaround irqchip/gic-v3: Refactor GIC600 limited to 32bit PA erratum handling PCI: rcar-gen4: Configure AXIINTC if iMSI-RX is not used PCI: dwc: Move iMSI-RX check before calling 'pp->ops->init()'

Merge branch 'pci/controller/dwc-imx6'

2026-08-21T21:40:42Z

- Remove PERST# checking from pci_host_common_parse_port() so callers can decide whether to fall back to legacy DT binding with PERST# in the host bridge (Sherry Sun) - Fix build issues when PCI_PWRCTRL_GENERIC or PCI_HOST_COMMON is a module (Arnd Bergmann) - Create pwrctrl devices only once by doing it from imx_pcie_probe() instead of imx_pcie_host_init(), which is used during both probe and resume (Sherry Sun) - Use 'dw_pcie_rp->skip_pwrctrl_off' to avoid powering off devices during suspend to preserve wakeup capability (Sherry Sun) - Add runtime PM support for i.MX95 to allow dynamic power management when the link is idle (Richard Zhu) * pci/controller/dwc-imx6: PCI: imx6: Add runtime PM support for i.MX95 PCI: imx6: Add 'skip_pwrctrl_off' flag support PCI: imx6: Move pci_pwrctrl_create_devices() to imx_pcie_probe() PCI: imx6: Fix building against PCI_PWRCTRL_GENERIC PCI: imx6: Fix building against PCI_HOST_COMMON PCI: host-generic: Move legacy DT binding fallback decision to caller of pci_host_common_parse_ports()

PCI: dw-rockchip: Implement .reset_root_port() and use for link down

2026-08-04T21:34:15Z

The PCIe link may go down in cases like firmware crashes or unstable connections. When this occurs, the Root Port must be reset to restore the functionality. However, the current driver lacks link down handling, forcing users to reboot the system to recover. Implement the .reset_root_port() callback for link down handling for the Rockchip DWC PCIe host controller. The RC is reset, reconfigured, and link training initiated to recover from the link down event. This also by extension fixes issues with sysfs-initiated bus resets. Currently, the endpoint device is non-functional after a sysfs initiated bus reset (it may link up with downgraded link status). With the link down handling support, a sysfs initiated bus reset works as intended. Testing conducted on a ROCK5B board with an M.2 NVMe drive. Signed-off-by: Wilfred Mallawa Signed-off-by: Niklas Cassel Signed-off-by: Manivannan Sadhasivam [bhelgaas: subject] Signed-off-by: Bjorn Helgaas Link: https://patch.msgid.link/20260727172654.605988-4-cassel@kernel.org

PCI: rcar-gen4: Configure AXIINTC if iMSI-RX is not used

2026-07-15T13:59:29Z

When MSI is enabled but the DWC built-in iMSI-RX is not used, MSI must be handled via the GIC ITS. Configure all controller MSI registers accordingly. Set or clear the MSICAP0 MSIE bit and the PCIEINTSTS0EN MSI_CTRL_INT bit based on the MSI enable state. Set both bits when MSI is enabled. Clear both bits when MSI is disabled. When MSI is disabled, or when MSI is enabled together with iMSI-RX, clear AXIINTCADDR and AXIINTCCONT to disable any pass through of MSI TLPs onto the AXI bus and further into the GIC ITS translation registers. When MSI is enabled and iMSI-RX is not used, program AXIINTCADDR with the target address of the GIC ITS translation register, and program AXIINTCCONT to enable MSI TLP pass through onto the AXI bus and into the GIC ITS. This configuration allows the GIC ITS to handle MSI instead of the integrated iMSI-RX. The driver includes linux/irqchip/arm-gic-v3.h which pulls in headers which are available only on ARM and ARM64, on other architectures the headers are not present and the driver fails to build. This driver is used only on ARM64 hardware, so isolate its build only to ARM64 to avoid build failures on other architectures. Co-developed-by: Yoshihiro Shimoda Signed-off-by: Yoshihiro Shimoda Signed-off-by: Marek Vasut [mani: commit log and squashed the Kconfig fix: https://patch.msgid.link/20260714131957.38067-1-marek.vasut+renesas@mailbox.org] Signed-off-by: Manivannan Sadhasivam Signed-off-by: Bjorn Helgaas Link: https://patch.msgid.link/20260707203743.88299-3-marek.vasut+renesas@mailbox.org

PCI: imx6: Fix building against PCI_PWRCTRL_GENERIC

2026-07-01T04:51:41Z

When endpoint mode is built-in, but pwrctrl support is in a loadable module, the imx driver fails to build because the unused host support still tries to link against pwrctrl: ld.lld: error: undefined symbol: pci_pwrctrl_power_off_devices >>> referenced by pci-imx6.c:1988 (drivers/pci/controller/dwc/pci-imx6.c:1988) >>> drivers/pci/controller/dwc/pci-imx6.o:(imx_pcie_shutdown) in archive vmlinux.a Add one more select for this. Fixes: 85c1fcfa740d ("PCI: imx6: Integrate new pwrctrl API") Signed-off-by: Arnd Bergmann Signed-off-by: Manivannan Sadhasivam Reviewed-by: Sherry Sun Link: https://patch.msgid.link/20260618143629.2035247-1-arnd@kernel.org

PCI: imx6: Fix building against PCI_HOST_COMMON

2026-07-01T04:51:41Z

When CONFIG_PCI_HOST_COMMON is set to =m, the i.MX6 PCIe driver fails to link. This can happen when only i.MX endpoint mode is enabled but not host mode, which would indirectly enable the host-common driver itself. ld.lld: error: undefined symbol: pci_host_common_parse_ports >>> referenced by pci-imx6.c >>> drivers/pci/controller/dwc/pci-imx6.o:(imx_pcie_host_init) in archive vmlinux.a ld.lld: error: undefined symbol: pci_host_common_delete_ports >>> referenced by pci-imx6.c >>> drivers/pci/controller/dwc/pci-imx6.o:(imx_pcie_host_init) in archive vmlinux.a >>> referenced by pci-imx6.c >>> drivers/pci/controller/dwc/pci-imx6.o:(imx_pcie_host_init) in archive vmlinux.a Select the common module from the endpoint support directly. Fixes: 250eea5c06f5 ("PCI: imx6: Parse 'reset-gpios' in Root Port nodes") Signed-off-by: Arnd Bergmann Signed-off-by: Manivannan Sadhasivam Reviewed-by: Frank Li Link: https://patch.msgid.link/20260616164049.3656435-1-arnd@kernel.org

Merge branch 'pci/controller/dwc-ultrarisc'

2026-06-23T22:32:15Z

- Add UltraRISC DP1000 PCIe controller DT binding and driver (Jia Wang) * pci/controller/dwc-ultrarisc: PCI: ultrarisc: Add UltraRISC DP1000 PCIe Root Complex driver dt-bindings: PCI: Add UltraRISC DP1000 PCIe controller

PCI: imx6: Integrate new pwrctrl API

2026-06-10T13:41:15Z

Integrate the PCI pwrctrl framework into the pci-imx6 driver to provide standardized power management for PCI devices. Legacy regulator handling (vpcie-supply at controller level) is maintained for backward compatibility with existing device trees. New device trees should specify power supplies at the Root Port level to utilize the pwrctrl framework. Signed-off-by: Sherry Sun Signed-off-by: Manivannan Sadhasivam Reviewed-by: Frank Li Link: https://patch.msgid.link/20260520084904.2424253-2-sherry.sun@oss.nxp.com

PCI: ultrarisc: Add UltraRISC DP1000 PCIe Root Complex driver

2026-05-12T20:31:51Z

Add DP1000 SoC PCIe Root Complex driver. The controller only supports 32-bit aligned configuration space accesses. Signed-off-by: Xincheng Zhang Signed-off-by: Jia Wang [mani: changed to builtin_platform_driver() to prevent irqchip removal] Signed-off-by: Manivannan Sadhasivam [bhelgaas: squash MAINTAINERS update here] Signed-off-by: Bjorn Helgaas Link: https://patch.msgid.link/20260427-ultrarisc-pcie-v4-3-98935f6cdfb5@ultrarisc.com

Merge branch 'pci/controller/dwc-layerscape'

2026-04-13T17:50:23Z

- Allow Layerscape host controller driver to be build as a removable module (Sascha Hauer) * pci/controller/dwc-layerscape: PCI: layerscape: Allow to compile as module