wireguard-linux/drivers/phy/cadence, branch jd/unified-crypt-queueWireGuard for the Linux kernelhttps://git.zx2c4.com/wireguard-linux/atom/drivers/phy/cadence?h=jd%2Funified-crypt-queue2020-03-20T14:04:29Zphy: cadence-torrent: Add support for subnode bindings2020-03-20T14:04:29ZSwapnil Jakhadesjakhade@cadence.com2020-02-06T06:11:01Zurn:sha1:afa4ba059f1e9884f9edad2545a71b7373ff1be0
Implement single link subnode support to the phy driver.
Add reset support including PHY reset and individual lane reset.
Signed-off-by: Swapnil Jakhade <sjakhade@cadence.com>
Signed-off-by: Yuti Amonkar <yamonkar@cadence.com>
Signed-off-by: Kishon Vijay Abraham I <kishon@ti.com>
phy: cadence-torrent: Add platform dependent initialization structure2020-03-20T14:04:29ZSwapnil Jakhadesjakhade@cadence.com2020-02-06T06:11:00Zurn:sha1:597bf3f1a611517e70a62093f5b68cba45622f9b
Add platform dependent initialization data for Torrent PHY used in TI's
J721E SoC.
Signed-off-by: Swapnil Jakhade <sjakhade@cadence.com>
Signed-off-by: Yuti Amonkar <yamonkar@cadence.com>
Signed-off-by: Kishon Vijay Abraham I <kishon@ti.com>
phy: cadence-torrent: Use regmap to read and write DPTX PHY registers2020-03-20T14:04:29ZSwapnil Jakhadesjakhade@cadence.com2020-02-06T06:10:59Zurn:sha1:cba472ecdb58b8363c73c6ae2404194be48f9aec
Use regmap to read and write DPTX specific PHY registers.
Signed-off-by: Swapnil Jakhade <sjakhade@cadence.com>
Signed-off-by: Yuti Amonkar <yamonkar@cadence.com>
Signed-off-by: Kishon Vijay Abraham I <kishon@ti.com>
phy: cadence-torrent: Use regmap to read and write Torrent PHY registers2020-03-20T14:04:29ZSwapnil Jakhadesjakhade@cadence.com2020-02-06T06:10:58Zurn:sha1:69d114acd6541c6642f08decda38484f3d5a0bf7
Use regmap for accessing Torrent PHY registers. Modify register offsets
as defined in Torrent PHY user guide. Abstract address calculation
using regmap APIs.
Signed-off-by: Swapnil Jakhade <sjakhade@cadence.com>
Signed-off-by: Yuti Amonkar <yamonkar@cadence.com>
Signed-off-by: Kishon Vijay Abraham I <kishon@ti.com>
phy: cadence-torrent: Implement PHY configure APIs2020-03-20T14:04:29ZSwapnil Jakhadesjakhade@cadence.com2020-02-06T06:10:57Zurn:sha1:572d659256eb44ddd153e77f904cb3e5bc995f40
Add support for PHY configuration APIs. These will mainly reconfigure
link rate, number of lanes, voltage swing and pre-emphasis values.
Signed-off-by: Swapnil Jakhade <sjakhade@cadence.com>
Signed-off-by: Yuti Amonkar <yamonkar@cadence.com>
Signed-off-by: Kishon Vijay Abraham I <kishon@ti.com>
phy: cadence-torrent: Add 19.2 MHz reference clock support2020-03-20T14:04:29ZSwapnil Jakhadesjakhade@cadence.com2020-02-06T06:10:56Zurn:sha1:e4b496a376f1ad83d708628e31e90c4e1093a867
Add configuration functions for 19.2 MHz refclock support.
Add register configurations for SSC support.
Signed-off-by: Swapnil Jakhade <sjakhade@cadence.com>
Signed-off-by: Yuti Amonkar <yamonkar@cadence.com>
Signed-off-by: Kishon Vijay Abraham I <kishon@ti.com>
phy: cadence-torrent: Refactor code for reusability2020-03-20T14:04:29ZSwapnil Jakhadesjakhade@cadence.com2020-02-06T06:10:55Zurn:sha1:21c79146a1bbc6310dc7dcf085c5ab5b0a553fcb
Add a separate function to set different power state values.
Use uniform polling timeout value. Also check return values
of functions for proper error handling.
Signed-off-by: Swapnil Jakhade <sjakhade@cadence.com>
Signed-off-by: Yuti Amonkar <yamonkar@cadence.com>
Signed-off-by: Kishon Vijay Abraham I <kishon@ti.com>
phy: cadence-torrent: Add wrapper for DPTX register access2020-03-20T14:04:29ZSwapnil Jakhadesjakhade@cadence.com2020-02-06T06:10:54Zurn:sha1:f61b3aed20003ec27960dde50ceaea04479d1f07
Add wrapper functions to read, write DisplayPort specific PHY registers to
improve code readability.
Signed-off-by: Swapnil Jakhade <sjakhade@cadence.com>
Signed-off-by: Yuti Amonkar <yamonkar@cadence.com>
Signed-off-by: Kishon Vijay Abraham I <kishon@ti.com>
phy: cadence-torrent: Add wrapper for PHY register access2020-03-20T14:04:29ZSwapnil Jakhadesjakhade@cadence.com2020-02-06T06:10:53Zurn:sha1:ccb1b89de37efeee74b46b8bd0bf632be92a7c08
Add a wrapper function to write Torrent PHY registers to improve
code readability.
Signed-off-by: Swapnil Jakhade <sjakhade@cadence.com>
Signed-off-by: Yuti Amonkar <yamonkar@cadence.com>
Signed-off-by: Kishon Vijay Abraham I <kishon@ti.com>
phy: cadence-torrent: Adopt Torrent nomenclature2020-03-20T14:04:29ZSwapnil Jakhadesjakhade@cadence.com2020-02-06T06:10:52Zurn:sha1:92e9ccc6dc22493e36795024eb8b707633786a68
- Change private data struct cdns_dp_phy to cdns_torrent_phy
- Change module description and registration accordingly
- Generic torrent functions have prefix cdns_torrent_phy_*
- Functions specific to Torrent phy for DisplayPort are prefixed as
cdns_torrent_dp_*
Signed-off-by: Swapnil Jakhade <sjakhade@cadence.com>
Signed-off-by: Yuti Amonkar <yamonkar@cadence.com>
Signed-off-by: Kishon Vijay Abraham I <kishon@ti.com>