<feed xmlns='http://www.w3.org/2005/Atom'>
<title>wireguard-linux/drivers/pinctrl/ultrarisc, branch stable</title>
<subtitle>WireGuard for the Linux kernel</subtitle>
<id>https://git.zx2c4.com/wireguard-linux/atom/drivers/pinctrl/ultrarisc?h=stable</id>
<link rel='self' href='https://git.zx2c4.com/wireguard-linux/atom/drivers/pinctrl/ultrarisc?h=stable'/>
<link rel='alternate' type='text/html' href='https://git.zx2c4.com/wireguard-linux/'/>
<updated>2026-06-11T13:02:35Z</updated>
<entry>
<title>pinctrl: ultrarisc: Add UltraRISC DP1000 pinctrl driver</title>
<updated>2026-06-11T13:02:35Z</updated>
<author>
<name>Jia Wang</name>
<email>wangjia@ultrarisc.com</email>
</author>
<published>2026-06-10T05:29:56Z</published>
<link rel='alternate' type='text/html' href='https://git.zx2c4.com/wireguard-linux/commit/?id=cb7037924836a352e767f69f1aa65b82f3e815f4'/>
<id>urn:sha1:cb7037924836a352e767f69f1aa65b82f3e815f4</id>
<content type='text'>
Add support for the pin controller on the UltraRISC DP1000 SoC.

The controller provides mux selection for pins in ports A, B, C, D, and
LPC. Ports A-D default to GPIO and support peripheral muxing. LPC pins
can be switched to eSPI, but are not available as GPIOs. Basic pin
configuration controls such as drive strength, pull-up, and pull-down
are also supported.

Signed-off-by: Jia Wang &lt;wangjia@ultrarisc.com&gt;
Reviewed-by: Bartosz Golaszewski &lt;bartosz.golaszewski@oss.qualcomm.com&gt;
Signed-off-by: Linus Walleij &lt;linusw@kernel.org&gt;
</content>
</entry>
</feed>
