wireguard-linux/drivers/platform/x86/amd/pmf, branch stable

platform/x86/amd/pmf: fix build on !CONFIG_AMD_PMF_DEBUG

2026-08-31T18:18:54Z

amd_pmf_get_ta_custom_bios_inputs() is used by non-debug features. Fix the build on !CONFIG_AMD_PMF_DEBUG by moving amd_pmf_get_ta_custom_bios_inputs() outside the ifdef CONFIG_AMD_PMF_DEBUG. Fixes: 5bda82c797c9 ("platform/x86/amd/pmf: Implement util layer ioctl handler") Reported-by: Oleksandr Natalenko Link: https://lore.kernel.org/all/fS7s9V_xTaedaqEAaxwKnQ@natalenko.name/ Signed-off-by: Pedro Falcato Reviewed-by: Mario Limonciello (AMD) > --- Tested-by: Oleksandr Natalenko Link: https://patch.msgid.link/20260831114346.2041361-1-pfalcato@suse.de Reviewed-by: Ilpo Järvinen Signed-off-by: Ilpo Järvinen

platform/x86/amd/pmf: Add 1AH_M80H metrics table and NPU metrics support

2026-07-27T18:43:59Z

The 1AH_M80H platform introduces a new firmware managed DRAM based metrics table (amd_pmf_metrics_v3) covering the full platform telemetry including power, voltages, frequencies, throttlers and activity monitors. As a first consumer of this table, add NPU metrics retrieval. Unlike earlier platforms that use a transfer table command, 1AH_M80H metrics are accumulator based and require delta calculation between consecutive samples. Extend amd_pmf_npu_metrics with npu_temp, populated from the npu_temp_acc accumulator field available on 1AH_M80H. Key changes include: - Add DRAM based metrics table support for the 1AH_M80H platform - Introduce amd_pmf_get_tbl_dram_addr() to obtain the DRAM address - Add amd_pmf_get_metrics_table_log_sample() to trigger metrics updates - Add struct amd_pmf_metrics_v3 for the 1AH_M80H metrics format - Implement accumulator based delta calculation for metrics - Introduce amd_pmf_calculate_acc_npu_metrics() to get NPU metrics - Introduce amd_pmf_supports_accumulator_metrics() to check the accumulator based metrics support. Reviewed-by: Mario Limonciello (AMD) Co-developed-by: Patil Rajesh Reddy Signed-off-by: Patil Rajesh Reddy Signed-off-by: Shyam Sundar S K Link: https://patch.msgid.link/20260723111534.1940925-8-Shyam-sundar.S-k@amd.com Reviewed-by: Ilpo Järvinen Signed-off-by: Ilpo Järvinen

platform/x86/amd/pmf: Refactor NPU metrics for platform extensibility

2026-07-27T18:43:57Z

Refactor the NPU metrics retrieval code to use a switch-case structure based on CPU ID, preparing the driver for supporting additional platforms with different metrics table formats. This change restructures amd_pmf_get_smu_metrics() to handle platform-specific metrics retrieval paths. The existing logic for 1AH_M20H and 1AH_M60H platforms is preserved within the switch-case block. No functional changes. Reviewed-by: Mario Limonciello (AMD) Co-developed-by: Patil Rajesh Reddy Signed-off-by: Patil Rajesh Reddy Signed-off-by: Shyam Sundar S K Link: https://patch.msgid.link/20260723111534.1940925-7-Shyam-sundar.S-k@amd.com Reviewed-by: Ilpo Järvinen Signed-off-by: Ilpo Järvinen

platform/x86/amd/pmf: Use upper/lower_32_bits() in amd_pmf_set_dram_addr()

2026-07-27T18:43:55Z

Replace the open coded manual bit shifting used to split a 64-bit physical address into its high and low 32-bit halves with the standard kernel helpers upper_32_bits() and lower_32_bits(). No functional changes. Reviewed-by: Mario Limonciello (AMD) Co-developed-by: Patil Rajesh Reddy Signed-off-by: Patil Rajesh Reddy Signed-off-by: Shyam Sundar S K Link: https://patch.msgid.link/20260723111534.1940925-6-Shyam-sundar.S-k@amd.com Reviewed-by: Ilpo Järvinen Signed-off-by: Ilpo Järvinen

platform/x86/amd/pmf: Add missing newline in dev_err message

2026-07-27T18:43:54Z

Add the missing trailing newline to the dev_err() message printed when an invalid CPU id is encountered. Signed-off-by: Shyam Sundar S K Link: https://patch.msgid.link/20260723111534.1940925-5-Shyam-sundar.S-k@amd.com Reviewed-by: Ilpo Järvinen Signed-off-by: Ilpo Järvinen

platform/x86/amd/pmf: Move metrics code to dedicated file

2026-07-27T18:43:52Z

Refactor metrics related code from core.c into a new metrics.c file to improve code organization and maintainability. The metrics functionality is evolving with new platform support, warranting a separate file. No functional changes. Reviewed-by: Mario Limonciello (AMD) Co-developed-by: Patil Rajesh Reddy Signed-off-by: Patil Rajesh Reddy Signed-off-by: Shyam Sundar S K Link: https://patch.msgid.link/20260723111534.1940925-4-Shyam-sundar.S-k@amd.com Reviewed-by: Ilpo Järvinen Signed-off-by: Ilpo Järvinen

platform/x86/amd/pmf: Add 1AH_M80H device IDs and extended SMU mailbox registers

2026-07-27T18:43:51Z

Add PCI device ID (0x115b) and ACPI ID (AMDI0109) to enable PMF driver support for the AMD 1AH_M80H (Family 1AH Model 80H). The 1AH_M80H platform introduces an extended SMU mailbox interface that uses three argument registers instead of the single register used by earlier platforms. Define five new register offsets for the 1AH_M80H mailbox: message, response and three argument registers. The extended argument registers are required because 1AH_M80H exposes metrics through a firmware managed DRAM region. The GET_METRICS_TABLE_DRAM_ADDR command returns a 64-bit physical address split across arg_reg[0] (low 32-bit) and arg_reg[1] (high 32-bit), with the metrics table size in arg_reg[2]. Define amd_pmf_smu_regs_v2 to capture this extended register layout and register it in pmf_pci_ids[] via PCI_DEVICE_DATA(), keeping the existing amd_pmf_smu_regs_v1 shared instance for all prior platforms unchanged. Reviewed-by: Mario Limonciello (AMD) Co-developed-by: Patil Rajesh Reddy Signed-off-by: Patil Rajesh Reddy Signed-off-by: Shyam Sundar S K Link: https://patch.msgid.link/20260723111534.1940925-3-Shyam-sundar.S-k@amd.com Reviewed-by: Ilpo Järvinen Signed-off-by: Ilpo Järvinen

platform/x86/amd/pmf: Use per-SoC smu_regs struct for SMU mailbox registers

2026-07-27T18:43:48Z

Different AMD platforms use varying SMU register layouts for PMF-SMU mailbox communication. The register offsets are currently hardcoded as AMD_PMF_REGISTER_MESSAGE, AMD_PMF_REGISTER_RESPONSE and AMD_PMF_REGISTER_ARGUMENT directly in amd_pmf_send_cmd() and amd_pmf_dump_registers(), making it difficult to support platforms that use a different mailbox register layout without scattering per-platform conditionals across the send path. Introduce struct amd_pmf_smu_regs to capture the SoC-specific SMU mailbox register offsets (msg_reg, resp_reg, arg_reg) and add a pointer to it in struct amd_pmf_dev. RMB, PS, 1AH_M20H and 1AH_M60H all share the same legacy register layout and point to a single shared amd_pmf_smu_regs_v1 instance, avoiding redundant struct definitions. Convert the pmf_pci_ids[] table from PCI_DEVICE() to PCI_DEVICE_DATA(), embedding the smu_regs pointer directly as driver_data. Introduce amd_pmf_get_smu_mb_offset() which resolves the matching PCI entry via pci_match_id() at probe time and assigns driver_data to dev->smu_regs. Update all SMU register accesses in amd_pmf_send_cmd() and amd_pmf_dump_registers() to go through dev->smu_regs. Remove the hardcoded register offset references from the send path. New platform support requires only a new smu_regs instance and a corresponding PCI_DEVICE_DATA() entry. No functional changes for existing platforms. Reviewed-by: Mario Limonciello (AMD) Co-developed-by: Patil Rajesh Reddy Signed-off-by: Patil Rajesh Reddy Signed-off-by: Shyam Sundar S K Link: https://patch.msgid.link/20260723111534.1940925-2-Shyam-sundar.S-k@amd.com Reviewed-by: Ilpo Järvinen Signed-off-by: Ilpo Järvinen

platform/x86/amd/pmf: Implement util layer ioctl handler

2026-07-10T12:15:38Z

Implement the ioctl handler for the util layer character device. This support adds the actual functionality to populate PMF metrics from the TA shared memory buffer and return them to userspace. The implementation includes: - amd_pmf_populate_data() to extract metrics from TA shared memory - amd_pmf_set_ioctl() to handle userspace ioctl requests - Size negotiation for forward/backward compatibility - Feature-based population of struct fields - Export amd_pmf_get_ta_custom_bios_inputs() Co-developed-by: Sanket Goswami Signed-off-by: Sanket Goswami Signed-off-by: Shyam Sundar S K Link: https://patch.msgid.link/20260609081044.2416731-6-Shyam-sundar.S-k@amd.com Reviewed-by: Ilpo Järvinen Signed-off-by: Ilpo Järvinen

platform/x86/amd/pmf: Move debug helper functions to UAPI header

2026-07-10T12:13:47Z

These debug helper functions convert enumerated values to appropriate message and can be useful for userspace tools and other kernel components that need to interpret AMD PMF state values. By making them inline functions in the UAPI header, they become available to both kernel and userspace without code duplication. Also, prefix the function names with amd_pmf_. Also, include a case to cover unused enum entries. Co-developed-by: Sanket Goswami Signed-off-by: Sanket Goswami Signed-off-by: Shyam Sundar S K Link: https://patch.msgid.link/20260609081044.2416731-5-Shyam-sundar.S-k@amd.com Reviewed-by: Ilpo Järvinen Signed-off-by: Ilpo Järvinen