wireguard-linux/drivers/remoteproc, branch jd/orphan-parallel

Merge tag 'rproc-v5.10' of git://git.kernel.org/pub/scm/linux/kernel/git/andersson/remoteproc

2020-10-22T19:56:33Z

Pull remoteproc updates from Bjorn Andersson: "This introduces support for the Mediatek MT9182 SCP and controlling the Cortex R5F processors found in TI K3 platforms. It clones the longstanding debugfs interface for controlling crash handling to sysfs. Lastly it solves a bug where after a warm reset of Qualcomm platforms the modem would crash upon first boot" * tag 'rproc-v5.10' of git://git.kernel.org/pub/scm/linux/kernel/git/andersson/remoteproc: remoteproc/mediatek: Remove non-standard dsb() remoteproc: Add recovery configuration to the sysfs interface remoteproc: Add coredump as part of sysfs interface remoteproc: Change default dump configuration to "disabled" remoteproc: k3-r5: Add loading support for on-chip SRAM regions remoteproc: k3-r5: Initialize TCM memories for ECC remoteproc: k3-r5: Add a remoteproc driver for R5F subsystem dt-bindings: remoteproc: Add bindings for R5F subsystem on TI K3 SoCs remoteproc/mediatek: Add support for mt8192 SCP remoteproc: Fixup coredump debugfs disable request remoteproc: qcom_q6v5: Assign mpss region to Q6 before MBA boot remoteproc/mediatek: fix null pointer dereference on null scp pointer remoteproc: stm32: Fix pointer assignement remoteproc: scp: add COMPILE_TEST dependency

remoteproc/mediatek: Remove non-standard dsb()

2020-10-16T03:14:42Z

As reported by Stephen, dsb() is not declared on e.g. x86_64, preventing the mtp_scp from building. Simply remove the barrier (and the readback), suggested by Pi-Hsun to resolve this. Fixes: fd0b6c1ff85a ("remoteproc/mediatek: Add support for mt8192 SCP") Reported-by: Stephen Rothwell Suggested-by: Pi-Hsun Shih Signed-off-by: Bjorn Andersson

Merge tag 'dma-mapping-5.10' of git://git.infradead.org/users/hch/dma-mapping

2020-10-15T21:43:29Z

Pull dma-mapping updates from Christoph Hellwig: - rework the non-coherent DMA allocator - move private definitions out of - lower CMA_ALIGNMENT (Paul Cercueil) - remove the omap1 dma address translation in favor of the common code - make dma-direct aware of multiple dma offset ranges (Jim Quinlan) - support per-node DMA CMA areas (Barry Song) - increase the default seg boundary limit (Nicolin Chen) - misc fixes (Robin Murphy, Thomas Tai, Xu Wang) - various cleanups * tag 'dma-mapping-5.10' of git://git.infradead.org/users/hch/dma-mapping: (63 commits) ARM/ixp4xx: add a missing include of dma-map-ops.h dma-direct: simplify the DMA_ATTR_NO_KERNEL_MAPPING handling dma-direct: factor out a dma_direct_alloc_from_pool helper dma-direct check for highmem pages in dma_direct_alloc_pages dma-mapping: merge into dma-mapping: move large parts of to kernel/dma dma-mapping: move dma-debug.h to kernel/dma/ dma-mapping: remove dma-mapping: merge into dma-contiguous: remove dma_contiguous_set_default dma-contiguous: remove dev_set_cma_area dma-contiguous: remove dma_declare_contiguous dma-mapping: split cma: decrease CMA_ALIGNMENT lower limit to 2 firewire-ohci: use dma_alloc_pages dma-iommu: implement ->alloc_noncoherent dma-mapping: add new {alloc,free}_noncoherent dma_map_ops methods dma-mapping: add a new dma_alloc_pages API dma-mapping: remove dma_cache_sync 53c700: convert to dma_alloc_noncoherent ...

remoteproc: Add recovery configuration to the sysfs interface

2020-10-14T00:22:51Z

Add recovery configuration to the sysfs interface. This will allow usage of this configuration feature in production devices where access to debugfs might be limited. Signed-off-by: Rishabh Bhatnagar Link: https://lore.kernel.org/r/1601662144-5964-4-git-send-email-rishabhb@codeaurora.org Signed-off-by: Bjorn Andersson

remoteproc: Add coredump as part of sysfs interface

2020-10-14T00:22:04Z

Add coredump as part of the sysfs interface. This will allow usage of this configuration feature in production devices where access to debugfs might be limited. Signed-off-by: Rishabh Bhatnagar Link: https://lore.kernel.org/r/1601662144-5964-3-git-send-email-rishabhb@codeaurora.org Signed-off-by: Bjorn Andersson

remoteproc: Change default dump configuration to "disabled"

2020-10-14T00:20:54Z

Currently "default" configuration option means coredumps are enabled. To avoid confusion rename the "default" configuration option to "enabled" and disable collection of dumps by default as doing so makes sense for production devices. Signed-off-by: Rishabh Bhatnagar Link: https://lore.kernel.org/r/1601662144-5964-2-git-send-email-rishabhb@codeaurora.org Signed-off-by: Bjorn Andersson

remoteproc: k3-r5: Add loading support for on-chip SRAM regions

2020-10-13T23:34:40Z

The K3 SoCs has various internal on-chip SRAM memories like the SRAM within the MCU domain or the shared MSMC RAM within NavSS that can be used for multiple purposes. One such purpose is to have the R5F cores use a portion of such on-chip SRAM for fast-access data or to directly execute code. Add support to the K3 R5 remoteproc driver to parse and support loading into such memories. The SRAM regions need to be mapped as normal non-cacheable memory to avoid kernel crashes when the remoteproc loader code uses the Arm64 memset library function (the "DC ZVA" instruction throws a alignment fault on device type memory). These SRAM regions are completely optional as not all firmware images require these memories, and any such memory has to be reserved as such in the DTS files. Signed-off-by: Suman Anna Reviewed-by: Mathieu Poirier Link: https://lore.kernel.org/r/20201002234234.20704-5-s-anna@ti.com Signed-off-by: Bjorn Andersson

remoteproc: k3-r5: Initialize TCM memories for ECC

2020-10-13T23:34:39Z

The R5F processors on K3 SoCs all have two TCMs (ATCM and BTCM) that support 32-bit ECC. The TCMs are typically loaded with some boot-up code to initialize the R5 MPUs to further execute code out of DDR. The ECC for the TCMs is enabled by default on K3 SoCs due to internal default tie-off values, but the TCM memories are not initialized on device power up. Any read access without the corresponding TCM memory location initialized will generate an ECC error, and any such access from a A72 or A53 core will trigger a SError. So, zero initialize both the TCM memories before loading any firmware onto a R5F in remoteproc mode. Any R5F booted from U-Boot/SPL would require a similar initialization in the bootloader. Note that both the TCMs are initialized unconditionally as the TCM enable config bits only manage the access and visibility from R5. Signed-off-by: Suman Anna Reviewed-by: Mathieu Poirier Link: https://lore.kernel.org/r/20201002234234.20704-4-s-anna@ti.com Signed-off-by: Bjorn Andersson

remoteproc: k3-r5: Add a remoteproc driver for R5F subsystem

2020-10-13T23:34:38Z

The TI K3 family of SoCs typically have one or more dual-core Arm Cortex R5F processor clusters/subsystems (R5FSS). This R5F subsystem/cluster can be configured at boot time to be either run in a LockStep mode or in an Asymmetric Multi Processing (AMP) fashion in Split-mode. This subsystem has 64 KB each Tightly-Coupled Memory (TCM) internal memories for each core split between two banks - TCMA and TCMB (further interleaved into two banks). The subsystem does not have an MMU, but has a Region Address Translater (RAT) module that is accessible only from the R5Fs for providing translations between 32-bit CPU addresses into larger system bus addresses. Add a remoteproc driver to support this subsystem to be able to load and boot the R5F cores primarily in LockStep mode. The code also includes the base support for Split mode. Error Recovery and Power Management features are not currently supported. Loading support includes the internal TCMs and DDR. RAT support is left for a future patch, and as such the reserved memory carveout regions are all expected to be using memory regions within the first 2 GB. The R5F remote processors do not have an MMU, and so require fixed memory carveout regions matching the firmware image addresses. Support for this is provided by mandating multiple memory regions to be attached to the remoteproc device. The first memory region will be used to serve as the DMA pool for all dynamic allocations like the vrings and vring buffers. The remaining memory regions are mapped into the kernel at device probe time, and are used to provide address translations for firmware image segments without the need for any RSC_CARVEOUT entries. Any firmware image using memory outside of the supplied reserved memory carveout regions will be errored out. The R5F processors on TI K3 SoCs require a specific sequence for booting and shutting down the processors. This sequence is also dependent on the mode (LockStep or Split) the R5F cluster is configured for. The R5F cores have a Memory Protection Unit (MPU) that has a default configuration that does not allow the cores to run out of DDR out of reset. This is resolved by using the TCMs for boot-strapping code that applies the appropriate executable permissions on desired DDR memory. The loading into the TCMs requires that the resets be released first with the cores in halted state. The Power Sleep Controller (PSC) module on K3 SoCs requires that the cores be in WFI/WFE states with no active bus transactions before the cores can be put back into reset. Support for this is provided by using the newly introduced .prepare() and .unprepare() ops in the remoteproc core. The .prepare() ops is invoked before any loading, and the .unprepare() ops is invoked after the remoteproc resource cleanup. The R5F core resets are deasserted in .prepare() and asserted in .unprepare(), and the cores themselves are started and halted in .start() and .stop() ops. This ensures symmetric usage and allows the R5F cores state machine to be maintained properly between using the sysfs 'state' variable, bind/unbind and regular module load/unload flows. The subsystem is represented as a single remoteproc in LockStep mode, and as two remoteprocs in Split mode. The driver uses various TI-SCI interfaces to talk to the System Controller (DMSC) for managing configuration, power and reset management of these cores. IPC between the A53 cores and the R5 cores is supported through the virtio rpmsg stack using shared memory and OMAP Mailboxes. The AM65x SoCs typically have a single R5FSS in the MCU voltage domain. The J721E SoCs uses a slightly revised IP and typically have three R5FSSs, with one cluster present within the MCU voltage domain (MCU_R5FSS0), and the remaining two clusters present in the MAIN voltage domain (MAIN_R5FSS0 and MAIN_R5FSS1). The integration of these clusters on J721E SoC is also slightly different in that these IPs do support an actual local reset line, while they are a no-op on AM65x SoCs. Signed-off-by: Suman Anna Reviewed-by: Mathieu Poirier Link: https://lore.kernel.org/r/20201002234234.20704-3-s-anna@ti.com Signed-off-by: Bjorn Andersson

dma-mapping: split

2020-10-06T05:07:03Z

Split out all the bits that are purely for dma_map_ops implementations and related code into a new header so that they don't get pulled into all the drivers. That also means the architecture specific is not pulled in by any more, which leads to a missing includes that were pulled in by the x86 or arm versions in a few not overly portable drivers. Signed-off-by: Christoph Hellwig