wireguard-linux/drivers/thermal/renesas, branch stable

Merge tag 'thermal-7.3-rc1-2' of git://git.kernel.org/pub/scm/linux/kernel/git/rafael/linux-pm

2026-08-26T21:21:30Z

Pull more thermal control updates from Rafael Wysocki: "This mostly consists of assorted updates of thermal drivers, including new hardware support (Airoha AN7583, Qualcomm Master BandGap thermal monitor, QCom PMIC5 Gen3 ADC), but it also includes two reverts of recent cosmetic thermal core updates that went against driver core plans to eliminate class_create(): - Fix missing bitfield include headers in Armada and QCom SPM BMG drivers (Daniel Lezcano) - Fix missed file when manually applying a change after a conflict resolution for the QCom SPMI ADC TM5 Gen3 (Daniel Lezcano) - Move thermal_zone_device_enable() to the right place in order to prevent calling it if the thermal zone registration failed (Dan Carpenter) - Improve bitfield manipulations on Armada (Bryan B. Lima) - Remove unneeded 'fast_io' on Sun8i and Armada (Wolfram Sang) - Fix wrong boundary when clamping the low values in the set_trips() callback and fix wrong mask when setting the temperature interval on Airoha (Christian Marangi) - Make use of the regmap API to support Airoha AN7583 (Christian Marangi) - Fix adc_tm5_get_temp() return check value on the QCom SPMI ADC sensor (Rakesh Kota) - Fix unbalanced clock enablement when the resume fails on the iMX driver (Can Peng) - Add Qualcomm Master BandGap thermal monitor support (Satya Priya Kakitapalli) - Add Maili Temperature bindings compatible (Haritha S K) - Add a devm action to clean hardware interrupts, sampling, and control registers on Spacemit K1 (Pei Xiao) - Fix trivial typo in a thermal OF code comment (Marek Vasut) - Remove unnecessary print on Qcom SPMI ADC driver when a call to devm_request_threaded_irq() fails as this one already prints a message (Jishnu Prakash) - Add support for QCom PMIC5 Gen3 ADC by using auxiliary driver and shared interrupt with the IIO driver (Jishnu Prakash) - Make resets optional on MT8196 and add the corresponding property in the DT bindings (AngeloGioacchino Del Regno) - Fix clock staying enabled on failing resume operation on Qoriq (Can Peng) - Fix wrong closing brace position in thermal library header (Andreas Haufler) - Fix low and high trip point validation by moving the check after the clamp on the spacemit driver (surendra) - Remove redundant error messages on IRQ request failure (Pan Chuang) - Add IIO_CONSUMER namespace import to the qcom-spmi-mbg-tm thermal driver to avoid modpost warnings that would appear after merging the iio tree against the thermal updates (Nathan Chancellor) - Revert two recent cosmetic updates of the thermal core conflicting with driver core plans to eliminate class_create() (Rafael Wysocki)" * tag 'thermal-7.3-rc1-2' of git://git.kernel.org/pub/scm/linux/kernel/git/rafael/linux-pm: (32 commits) thermal/drivers/qcom-spmi-mbg-tm: Add module namespace import for IIO_CONSUMER Revert "thermal/core: Allocate the thermal class dynamically" Revert "thermal/core: Use the thermal class pointer as init guard" thermal/drivers/armada: Fix missing bitfields include thermal/drivers/qcom/spm mbg tm: Fix missing bitfield header thermal/drivers/qcom: Fix missing spmi adc tm5 gen3 file thermal/drivers: Remove redundant error messages on IRQ request failure thermal/drivers/spacemit: Validate clamped trip thresholds tools/lib/thermal: Fix misplaced extern "C" closing brace thermal/drivers/qoriq: Disable clock on resume failure thermal/drivers/mediatek/lvts_thermal: Make reset optional for MT8196 dt-bindings: thermal: mediatek: Make resets optional for MT8196 thermal/drivers/qcom: add support for PMIC5 Gen3 ADC thermal monitoring iio: adc: qcom-spmi-adc5-gen3: Share SDAM0 IRQ with ADC_TM auxiliary driver iio: adc: qcom-spmi-adc5-gen3: Remove an unnecessary print thermal/of: Fix trivial enabled typo thermal/drivers/spacemit/k1: Add shutdown action and reorder registration order dt-bindings: thermal: qcom-tsens: Document the Maili Temperature Sensor thermal/drivers/qcom: Add support for Qualcomm MBG thermal monitoring dt-bindings: thermal: Add Qualcomm MBG thermal monitor support ...

thermal/drivers: Remove redundant error messages on IRQ request failure

2026-08-07T15:27:28Z

Since commit 55b48e23f5c4 ("genirq/devres: Add error handling in devm_request_*_irq()"), devm_request_irq() and devm_request_threaded_irq() automatically log detailed error messages on failure. Remove the now-redundant driver-specific dev_err() and dev_err_probe() calls. Signed-off-by: Pan Chuang Signed-off-by: Daniel Lezcano Reviewed-by: Frank Li Reviewed-by: Andy Shevchenko Reviewed-by: Geert Uytterhoeven Reviewed-by: Niklas Söderlund Reviewed-by: Miquel Raynal Link: https://patch.msgid.link/20260717024733.374913-1-panchuang@vivo.com

thermal/drivers/rcar: Fix error checking in probe()

2026-07-08T11:18:36Z

This code accidentally calls thermal_zone_device_enable() before checking whether thermal_zone_device_register_with_trips() failed. Move the call until later to avoid an error pointer dereference of "priv->zone". The driver works differently depending on if we are using OF thermal or not. We use thermal_add_hwmon_sysfs() if we are using OF thermal and call thermal_zone_device_enable() if not. We can share same error check for if either of these fail. Moving the thermal_zone_device_enable() call is a bit cleaner as well. The original code used a three step process to cleanup: 1. Call thermal_zone_device_unregister() to cleanup. 2. Set priv->zone to an error pointer to preserve the error code. 3. Set priv->zone to NULL to avoid a second call to thermal_zone_device_unregister() in the rcar_thermal_remove() function. Now we can just do a direct goto error_unregister and rcar_thermal_remove() handles the cleanup properly. Fixes: bbcf90c0646a ("thermal: Explicitly enable non-changing thermal zone devices") Reviewed-by: Geert Uytterhoeven Reviewed-by: Niklas Söderlund Signed-off-by: Dan Carpenter Signed-off-by: Daniel Lezcano Link: https://patch.msgid.link/aj5WnseULiwgmlWv@stanley.mountain

Merge tag 'v7.2-rc2' into togreg

2026-07-06T15:59:47Z

Linux 7.2-rc2 Done to resolve conflicts with header reorg around mod_devicetable.h and provide a base for other inflight series that touch the includes.

iio: inkern: Use namespaced exports

2026-07-05T00:37:19Z

Use namespaced exports for IIO consumer API functions. This will make it easier to manage the IIO export surface. Consumer drivers will only be provided access to a specific set of functions, thereby restricting usage of internal IIO functions by other parts of the kernel. This change cannot be split into several parts without breaking bisectability, thus all of the affected drivers are modified at once. Acked-by: Sebastian Reichel # for power-supply Acked-by: Guenter Roeck Reviewed-by: Andy Shevchenko Signed-off-by: Romain Gantois Acked-by: Dmitry Torokhov Acked-by: Vinod Koul Signed-off-by: Jonathan Cameron

Replace by more specific (c files)

2026-07-03T05:38:17Z

Replace the #include of by the more specific where applicable. For most cases the include can be dropped completely, only a few drivers need one or two headers added. Acked-by: Danilo Krummrich Acked-by: Takashi Sakamoto Acked-by: Bjorn Helgaas Link: https://patch.msgid.link/1a3f2007c5c5dcf555c09a4035ce3ae8ef1b6c49.1782808461.git.u.kleine-koenig@baylibre.com Signed-off-by: Uwe Kleine-König (The Capable Hub)

thermal: renesas: rzg3e: Remove stale @trim_offset kernel-doc entry

2026-04-09T19:47:15Z

The trim_offset field was removed from struct rzg3e_thermal_priv but its kernel-doc entry was left behind. Remove it to fix the mismatch. Signed-off-by: John Madieu Signed-off-by: Daniel Lezcano Link: https://patch.msgid.link/20260409125916.2244241-1-john.madieu.xa@bp.renesas.com

thermal: renesas: rzg3e: add support for RZ/T2H and RZ/N2H

2026-01-21T18:06:57Z

The Renesas RZ/T2H (R9A09G077) and RZ/N2H (R9A09G087) SoCs expose the temperature calibration via SMC SIP and do not have a reset for the TSU peripheral, and use different minimum and maximum temperature values compared to the already supported RZ/G3E. Although the calibration data is stored in an OTP memory, the OTP itself is not memory-mapped, access to it is done through an OTP controller. The OTP controller is only accessible from the secure world, but the temperature calibration data stored in the OTP is exposed via SMC. Add support for retrieving the calibration data using arm_smcc_smc(). Add a compatible for RZ/T2H, RZ/N2H can use it as a fallback. Reviewed-by: John Madieu Tested-by: John Madieu Signed-off-by: Cosmin Tanislav Reviewed-by: Biju Das Link: https://patch.msgid.link/20260108195223.193531-6-cosmin-gabriel.tanislav.xa@renesas.com Signed-off-by: Daniel Lezcano

thermal: renesas: rzg3e: make calibration value retrieval per-chip

2026-01-21T18:02:14Z

The Renesas RZ/T2H (R9A09G077) and RZ/N2H (R9A09G087) SoCs expose the temperature calibration data via SMC SIP calls. To prepare for supporting these SoCs, do the following changes. Rename rzg3e_thermal_parse_dt() to rzg3e_thermal_get_syscon_trim(). Move the syscon usage out of rzg3e_thermal_get_calibration() and into rzg3e_thermal_get_syscon_trim() and remove single-use variables from the private state. Place a pointer to rzg3e_thermal_get_syscon_trim() into the chip-specific struct, and use it in the probe function to retrieve the calibration values. Now that syscon usage has been moved out of rzg3e_thermal_get_calibration(), remove it and inline the calibration validation into the probe function. Also, reuse the TSU_CODE_MAX macro to mask the calibration values, as GEMASK(11, 0) and 0xFFF are equivalent, and replace the hardcoded 0xFFF with TSU_CODE_MAX in the calibration validation. Reviewed-by: John Madieu Tested-by: John Madieu Signed-off-by: Cosmin Tanislav Reviewed-by: Geert Uytterhoeven Link: https://patch.msgid.link/20260108195223.193531-4-cosmin-gabriel.tanislav.xa@renesas.com Signed-off-by: Daniel Lezcano

thermal: renesas: rzg3e: make min and max temperature per-chip

2026-01-21T18:02:14Z

The Renesas RZ/T2H (R9A09G077) and RZ/N2H (R9A09G087) SoCs have different minimum and maximum temperatures compared to the already supported RZ/G3E. Prepare for them by moving these into a chip-specific struct. Reviewed-by: Geert Uytterhoeven Reviewed-by: John Madieu Tested-by: John Madieu Signed-off-by: Cosmin Tanislav Link: https://patch.msgid.link/20260108195223.193531-3-cosmin-gabriel.tanislav.xa@renesas.com Signed-off-by: Daniel Lezcano