<feed xmlns='http://www.w3.org/2005/Atom'>
<title>wireguard-linux/drivers/thunderbolt/usb4.c, branch jd/bump-compilers</title>
<subtitle>WireGuard for the Linux kernel</subtitle>
<id>https://git.zx2c4.com/wireguard-linux/atom/drivers/thunderbolt/usb4.c?h=jd%2Fbump-compilers</id>
<link rel='self' href='https://git.zx2c4.com/wireguard-linux/atom/drivers/thunderbolt/usb4.c?h=jd%2Fbump-compilers'/>
<link rel='alternate' type='text/html' href='https://git.zx2c4.com/wireguard-linux/'/>
<updated>2024-06-17T09:47:12Z</updated>
<entry>
<title>thunderbolt: Add receiver lane margining support for retimers</title>
<updated>2024-06-17T09:47:12Z</updated>
<author>
<name>Mika Westerberg</name>
<email>mika.westerberg@linux.intel.com</email>
</author>
<published>2023-03-21T09:40:49Z</published>
<link rel='alternate' type='text/html' href='https://git.zx2c4.com/wireguard-linux/commit/?id=ff6ab055e070d819f51196622e08f8941b6d2a4b'/>
<id>urn:sha1:ff6ab055e070d819f51196622e08f8941b6d2a4b</id>
<content type='text'>
Retimers support lane margining as well so make this available through
debugfs in the same way as we do for the USB4 ports. When this is
enabled we also expose retimers on the other side of the cable because
typically margining is implemented only on direction towards the cable.
However, for the retimers on the other side of the cable we do not allow
NVM upgrade to avoid confusing the existing userspace (the same retimer
may now appear twice with different name) and is probably not a good
idea anyway.

Signed-off-by: Mika Westerberg &lt;mika.westerberg@linux.intel.com&gt;
</content>
</entry>
<entry>
<title>thunderbolt: Make margining functions accept target and retimer index</title>
<updated>2024-06-17T09:47:12Z</updated>
<author>
<name>Mika Westerberg</name>
<email>mika.westerberg@linux.intel.com</email>
</author>
<published>2023-03-21T08:02:55Z</published>
<link rel='alternate' type='text/html' href='https://git.zx2c4.com/wireguard-linux/commit/?id=0890fc36c70c8d5e80dc128c3a9d7a9122646869'/>
<id>urn:sha1:0890fc36c70c8d5e80dc128c3a9d7a9122646869</id>
<content type='text'>
In order to add lane margining support for retimers make the margining
functions take sideband target and retimer index as parameters. This
makes it possible to access both router and retimer sideband using the
same functions.

Signed-off-by: Mika Westerberg &lt;mika.westerberg@linux.intel.com&gt;
</content>
</entry>
<entry>
<title>thunderbolt: Make usb4_port_sb_read/write() available outside of usb4.c</title>
<updated>2024-06-17T09:47:11Z</updated>
<author>
<name>Mika Westerberg</name>
<email>mika.westerberg@linux.intel.com</email>
</author>
<published>2024-04-16T06:41:14Z</published>
<link rel='alternate' type='text/html' href='https://git.zx2c4.com/wireguard-linux/commit/?id=e8241f66a812847853aa8c8a97b3492d152c6f23'/>
<id>urn:sha1:e8241f66a812847853aa8c8a97b3492d152c6f23</id>
<content type='text'>
We need to call these from other files too so make them available
outside of usb4.c.

Signed-off-by: Mika Westerberg &lt;mika.westerberg@linux.intel.com&gt;
</content>
</entry>
<entry>
<title>Merge tag 'thunderbolt-for-v6.10-rc1' of git://git.kernel.org/pub/scm/linux/kernel/git/westeri/thunderbolt into usb-next</title>
<updated>2024-05-10T09:25:22Z</updated>
<author>
<name>Greg Kroah-Hartman</name>
<email>gregkh@linuxfoundation.org</email>
</author>
<published>2024-05-10T09:25:22Z</published>
<link rel='alternate' type='text/html' href='https://git.zx2c4.com/wireguard-linux/commit/?id=e4306116b5e93748b3eaa7666aa55c390b48a8f4'/>
<id>urn:sha1:e4306116b5e93748b3eaa7666aa55c390b48a8f4</id>
<content type='text'>
Mika writes:

thunderbolt: Changes for v6.10 merge window

This includes following USB4/Thunderbolt changes for the v6.10 merge
window:

  - Enable NVM firmare upgrade on Intel Maple Ridge Thunderbolt 4
    controller
  - Improve USB3 tunnel bandwidth calculation
  - Improve sideband access
  - Minor cleanups and fixes.

All these have been in linux-next with no reported issues.

* tag 'thunderbolt-for-v6.10-rc1' of git://git.kernel.org/pub/scm/linux/kernel/git/westeri/thunderbolt:
  thunderbolt: Correct trace output of firmware connection manager packets
  thunderbolt: Fix kernel-doc for tb_tunnel_alloc_dp()
  thunderbolt: Fix uninitialized variable in tb_tunnel_alloc_usb3()
  thunderbolt: There are only 5 basic router registers in pre-USB4 routers
  thunderbolt: No need to loop over all retimers if access fails
  thunderbolt: Increase sideband access polling delay
  thunderbolt: Get rid of TB_CFG_PKG_PREPARE_TO_SLEEP
  thunderbolt: Use correct error code with ERROR_NOT_SUPPORTED
  thunderbolt: Allow USB3 bandwidth to be lower than maximum supported
  thunderbolt: Fix calculation of consumed USB3 bandwidth on a path
  thunderbolt: Enable NVM upgrade support on Intel Maple Ridge
</content>
</entry>
<entry>
<title>thunderbolt: Increase sideband access polling delay</title>
<updated>2024-04-23T05:12:03Z</updated>
<author>
<name>Mika Westerberg</name>
<email>mika.westerberg@linux.intel.com</email>
</author>
<published>2024-04-05T04:50:50Z</published>
<link rel='alternate' type='text/html' href='https://git.zx2c4.com/wireguard-linux/commit/?id=c6ca1ac9f4722c6aa940d61baa2416624472b7f0'/>
<id>urn:sha1:c6ca1ac9f4722c6aa940d61baa2416624472b7f0</id>
<content type='text'>
The USB4 sideband access is slow compared to the high-speed link and the
access timing parameters are tens of milliseconds according the spec. To
avoid too much unnecessary polling for the sideband pass the wait delay
to usb4_port_wait_for_bit() and use larger (5ms) value compared to the
high-speed access.

Signed-off-by: Mika Westerberg &lt;mika.westerberg@linux.intel.com&gt;
</content>
</entry>
<entry>
<title>thunderbolt: Avoid notify PM core about runtime PM resume</title>
<updated>2024-04-10T07:49:58Z</updated>
<author>
<name>Gil Fine</name>
<email>gil.fine@linux.intel.com</email>
</author>
<published>2024-03-01T13:11:18Z</published>
<link rel='alternate' type='text/html' href='https://git.zx2c4.com/wireguard-linux/commit/?id=dcd12acaf384c30437fa5a9a1f71df06fc9835fd'/>
<id>urn:sha1:dcd12acaf384c30437fa5a9a1f71df06fc9835fd</id>
<content type='text'>
Currently we notify PM core about occurred wakes after any resume. This
is not actually needed after resume from runtime suspend. Hence, notify
PM core about occurred wakes only after resume from system sleep. Also,
if the wake occurred in USB4 router upstream port, we don't notify the
PM core about it since it is not actually needed and can cause
unexpected autowake (e.g. if /sys/power/wakeup_count is used).

While there add the missing kernel-doc for tb_switch_resume().

Signed-off-by: Gil Fine &lt;gil.fine@linux.intel.com&gt;
Cc: stable@vger.kernel.org
Signed-off-by: Mika Westerberg &lt;mika.westerberg@linux.intel.com&gt;
</content>
</entry>
<entry>
<title>Merge tag 'thunderbolt-for-v6.9-rc1' of git://git.kernel.org/pub/scm/linux/kernel/git/westeri/thunderbolt into usb-next</title>
<updated>2024-03-02T19:14:03Z</updated>
<author>
<name>Greg Kroah-Hartman</name>
<email>gregkh@linuxfoundation.org</email>
</author>
<published>2024-03-02T19:14:03Z</published>
<link rel='alternate' type='text/html' href='https://git.zx2c4.com/wireguard-linux/commit/?id=73473b3033a633d640ef065aa98d60fbe2d40ddb'/>
<id>urn:sha1:73473b3033a633d640ef065aa98d60fbe2d40ddb</id>
<content type='text'>
Mika writes:

thunderbolt: Changes for v6.9 merge window

This includes following USB4/Thunderbolt changes for the v6.9 merge
window:

  - Reset the topology also for USB4 v1 routers on driver load
  - DisplayPort tunneling and bandwidth allocation mode improvements
  - Tracepoint support for the control channel
  - Couple of minor fixes and cleanups.

All these have been in linux-next with no reported issues.

* tag 'thunderbolt-for-v6.9-rc1' of git://git.kernel.org/pub/scm/linux/kernel/git/westeri/thunderbolt: (23 commits)
  thunderbolt: Constify the struct device_type usage
  thunderbolt: Add trace events support for the control channel
  thunderbolt: Keep the domain powered when USB4 port is in redrive mode
  thunderbolt: Improve DisplayPort tunnel setup process to be more robust
  thunderbolt: Calculate DisplayPort tunnel bandwidth after DPRX capabilities read
  thunderbolt: Reserve released DisplayPort bandwidth for a group for 10 seconds
  thunderbolt: Introduce tb_tunnel_direction_downstream()
  thunderbolt: Re-order bandwidth group functions
  thunderbolt: Fail the failed bandwidth request properly
  thunderbolt: Log an error if DPTX request is not cleared
  thunderbolt: Handle bandwidth allocation mode disable request
  thunderbolt: Re-calculate estimated bandwidth when allocation mode is enabled
  thunderbolt: Use DP_LOCAL_CAP for maximum bandwidth calculation
  thunderbolt: Correct typo in host_reset parameter
  thunderbolt: Skip discovery also in USB4 v2 host
  thunderbolt: Reset only non-USB4 host routers in resume
  thunderbolt: Remove usage of the deprecated ida_simple_xx() API
  thunderbolt: Fix rollback in tb_port_lane_bonding_enable() for lane 1
  thunderbolt: Fix XDomain rx_lanes_show and tx_lanes_show
  thunderbolt: Reset topology created by the boot firmware
  ...
</content>
</entry>
<entry>
<title>thunderbolt: Log an error if DPTX request is not cleared</title>
<updated>2024-02-16T10:29:22Z</updated>
<author>
<name>Mika Westerberg</name>
<email>mika.westerberg@linux.intel.com</email>
</author>
<published>2023-12-28T14:49:45Z</published>
<link rel='alternate' type='text/html' href='https://git.zx2c4.com/wireguard-linux/commit/?id=2ec67a48cf8f18b8c6cecc70dcd5d52cbf8eba7e'/>
<id>urn:sha1:2ec67a48cf8f18b8c6cecc70dcd5d52cbf8eba7e</id>
<content type='text'>
This helps debugging issues around DisplayPort bandwidth allocation
mode.

Signed-off-by: Mika Westerberg &lt;mika.westerberg@linux.intel.com&gt;
</content>
</entry>
<entry>
<title>thunderbolt: Fix setting the CNS bit in ROUTER_CS_5</title>
<updated>2024-01-29T07:48:40Z</updated>
<author>
<name>Mohammad Rahimi</name>
<email>rahimi.mhmmd@gmail.com</email>
</author>
<published>2024-01-27T03:26:28Z</published>
<link rel='alternate' type='text/html' href='https://git.zx2c4.com/wireguard-linux/commit/?id=ec4d82f855ce332de26fe080892483de98cc1a19'/>
<id>urn:sha1:ec4d82f855ce332de26fe080892483de98cc1a19</id>
<content type='text'>
The bit 23, CM TBT3 Not Supported (CNS), in ROUTER_CS_5 indicates
whether a USB4 Connection Manager is TBT3-Compatible and should be:
    0b for TBT3-Compatible
    1b for Not TBT3-Compatible

Fixes: b04079837b20 ("thunderbolt: Add initial support for USB4")
Cc: stable@vger.kernel.org
Signed-off-by: Mohammad Rahimi &lt;rahimi.mhmmd@gmail.com&gt;
Signed-off-by: Mika Westerberg &lt;mika.westerberg@linux.intel.com&gt;
</content>
</entry>
<entry>
<title>thunderbolt: Introduce tb_port_reset()</title>
<updated>2024-01-22T11:21:06Z</updated>
<author>
<name>Sanath S</name>
<email>Sanath.S@amd.com</email>
</author>
<published>2024-01-13T09:39:57Z</published>
<link rel='alternate' type='text/html' href='https://git.zx2c4.com/wireguard-linux/commit/?id=01da6b99d49f60b1edead44e33569b1a2e9f49b7'/>
<id>urn:sha1:01da6b99d49f60b1edead44e33569b1a2e9f49b7</id>
<content type='text'>
Introduce a function that issues Downstream Port Reset to a USB4 port.
This supports Thunderbolt 2, 3 and USB4 routers.

Signed-off-by: Sanath S &lt;Sanath.S@amd.com&gt;
Signed-off-by: Mika Westerberg &lt;mika.westerberg@linux.intel.com&gt;
</content>
</entry>
</feed>
