<feed xmlns='http://www.w3.org/2005/Atom'>
<title>wireguard-linux/drivers/usb/dwc2/core.h, branch jd/unified-crypt-queue</title>
<subtitle>WireGuard for the Linux kernel</subtitle>
<id>https://git.zx2c4.com/wireguard-linux/atom/drivers/usb/dwc2/core.h?h=jd%2Funified-crypt-queue</id>
<link rel='self' href='https://git.zx2c4.com/wireguard-linux/atom/drivers/usb/dwc2/core.h?h=jd%2Funified-crypt-queue'/>
<link rel='alternate' type='text/html' href='https://git.zx2c4.com/wireguard-linux/'/>
<updated>2020-03-15T09:06:39Z</updated>
<entry>
<title>usb: dwc2: add support for STM32MP15 SoCs USB OTG HS and FS</title>
<updated>2020-03-15T09:06:39Z</updated>
<author>
<name>Amelie Delaunay</name>
<email>amelie.delaunay@st.com</email>
</author>
<published>2020-01-24T08:41:31Z</published>
<link rel='alternate' type='text/html' href='https://git.zx2c4.com/wireguard-linux/commit/?id=a415083a11cc76f85322406fb91e2eb917c6cef9'/>
<id>urn:sha1:a415083a11cc76f85322406fb91e2eb917c6cef9</id>
<content type='text'>
This patch introduces a new parameter to activate external ID pin and valid
vbus level detection, required on STM32MP15 SoC to support dual role,
either in HS or FS.
The STM32MP15 SoC uses the GGPIO register to enable the level detection.
The level detector requires to be powered.
Also adds the params structures for STM32MP15 OTG HS and STM32MP1 OTG FS.

Acked-by: Minas Harutyunyan &lt;hminas@synopsys.com&gt;
Signed-off-by: Amelie Delaunay &lt;amelie.delaunay@st.com&gt;
Signed-off-by: Felipe Balbi &lt;balbi@kernel.org&gt;
</content>
</entry>
<entry>
<title>usb: Spelling s/enpoint/endpoint/</title>
<updated>2019-11-04T14:53:00Z</updated>
<author>
<name>Geert Uytterhoeven</name>
<email>geert+renesas@glider.be</email>
</author>
<published>2019-10-24T15:28:33Z</published>
<link rel='alternate' type='text/html' href='https://git.zx2c4.com/wireguard-linux/commit/?id=c1aa81da1c64a090da7cf335595f69fd76f3c0bf'/>
<id>urn:sha1:c1aa81da1c64a090da7cf335595f69fd76f3c0bf</id>
<content type='text'>
Fix misspellings of "endpoint".

Signed-off-by: Geert Uytterhoeven &lt;geert+renesas@glider.be&gt;
Acked-by: Li Yang &lt;leoyang.li@nxp.com&gt;
Acked-by: Minas Harutyunyan &lt;hminas@synopsys.com&gt;
Link: https://lore.kernel.org/r/20191024152833.30698-1-geert+renesas@glider.be
Signed-off-by: Greg Kroah-Hartman &lt;gregkh@linuxfoundation.org&gt;
</content>
</entry>
<entry>
<title>USB: dwc2: Don't turn off the usbphy in suspend if wakeup is enabled</title>
<updated>2019-06-18T08:58:28Z</updated>
<author>
<name>Douglas Anderson</name>
<email>dianders@chromium.org</email>
</author>
<published>2019-05-20T17:56:04Z</published>
<link rel='alternate' type='text/html' href='https://git.zx2c4.com/wireguard-linux/commit/?id=c846b03ff767149d75d4d8dca6d3d4945a21074a'/>
<id>urn:sha1:c846b03ff767149d75d4d8dca6d3d4945a21074a</id>
<content type='text'>
If the 'snps,need-phy-for-wake' is set in the device tree then:

- We know that we can wakeup, so call device_set_wakeup_capable().
  The USB core will use this knowledge to enable wakeup by default.
- We know that we should keep the PHY on during suspend if something
  on our root hub needs remote wakeup.  This requires the patch (USB:
  Export usb_wakeup_enabled_descendants()).  Note that we don't keep
  the PHY on at suspend time if it's not needed because it would be a
  power draw.

If we later find some users of dwc2 that can support wakeup without
keeping the PHY on we may want to add a way to call
device_set_wakeup_capable() without keeping the PHY on at suspend
time.

Signed-off-by: Douglas Anderson &lt;dianders@chromium.org&gt;
Signed-off-by: Chris Zhong &lt;zyw@rock-chips.com&gt;
Signed-off-by: Felipe Balbi &lt;felipe.balbi@linux.intel.com&gt;
</content>
</entry>
<entry>
<title>usb: dwc2: Delayed status support</title>
<updated>2019-05-03T06:13:48Z</updated>
<author>
<name>Minas Harutyunyan</name>
<email>minas.harutyunyan@synopsys.com</email>
</author>
<published>2019-03-12T07:45:12Z</published>
<link rel='alternate' type='text/html' href='https://git.zx2c4.com/wireguard-linux/commit/?id=b4c53b4ac66a75a93672abf08aafac64dfb08d00'/>
<id>urn:sha1:b4c53b4ac66a75a93672abf08aafac64dfb08d00</id>
<content type='text'>
Added delayed status support for Control transfers.

Tested in all 3 modes: Slave, BDMA and DDMA.
Performed tests: USB CV (Ch9 and MSC), Control Read/Write tests
using Synopsys USB test environment function driver.

Signed-off-by: Minas Harutyunyan &lt;hminas@synopsys.com&gt;
Signed-off-by: Felipe Balbi &lt;felipe.balbi@linux.intel.com&gt;
</content>
</entry>
<entry>
<title>usb: dwc2: Move phy init into core</title>
<updated>2019-05-03T06:13:48Z</updated>
<author>
<name>Jules Maselbas</name>
<email>jmaselbas@kalray.eu</email>
</author>
<published>2019-04-05T13:35:32Z</published>
<link rel='alternate' type='text/html' href='https://git.zx2c4.com/wireguard-linux/commit/?id=059d8d528718407435216251eff8b49935b92b34'/>
<id>urn:sha1:059d8d528718407435216251eff8b49935b92b34</id>
<content type='text'>
As the phy initialization is almost the same in host and gadget
mode. This only move the phy initialization functions into core.c
for now, the goal is to share theses functions between the two modes.

Acked-by: Minas Harutyunyan &lt;hminas@synopsys.com&gt;
Signed-off-by: Jules Maselbas &lt;jmaselbas@kalray.eu&gt;
Signed-off-by: Felipe Balbi &lt;felipe.balbi@linux.intel.com&gt;
</content>
</entry>
<entry>
<title>usb: dwc2: gadget: Replace phyif with phy_utmi_width</title>
<updated>2019-05-03T06:13:48Z</updated>
<author>
<name>Jules Maselbas</name>
<email>jmaselbas@kalray.eu</email>
</author>
<published>2019-04-05T13:35:31Z</published>
<link rel='alternate' type='text/html' href='https://git.zx2c4.com/wireguard-linux/commit/?id=707d80f0a3c5fb58e61404277f6b103955fac294'/>
<id>urn:sha1:707d80f0a3c5fb58e61404277f6b103955fac294</id>
<content type='text'>
The phy utmi width information is already set in hsotg params,
phyif is only used in few places and I don't see any reason to
not use hsotg's params.

Moreover the utmi width was being forced to 16 bits by platform
initialization which doesn't take in account HW configuration.

Acked-by: Minas Harutyunyan &lt;hminas@synopsys.com&gt;
Signed-off-by: Jules Maselbas &lt;jmaselbas@kalray.eu&gt;
Signed-off-by: Felipe Balbi &lt;felipe.balbi@linux.intel.com&gt;
</content>
</entry>
<entry>
<title>usb: dwc2: optionally assert phy reset when waking up</title>
<updated>2019-05-03T06:13:47Z</updated>
<author>
<name>Douglas Anderson</name>
<email>dianders@chromium.org</email>
</author>
<published>2019-04-16T21:53:49Z</published>
<link rel='alternate' type='text/html' href='https://git.zx2c4.com/wireguard-linux/commit/?id=c40cf7705e13d288d900e044c0a2f756e9e4909a'/>
<id>urn:sha1:c40cf7705e13d288d900e044c0a2f756e9e4909a</id>
<content type='text'>
On the rk3288 USB host-only port (the one that's not the OTG-enabled
port) the PHY can get into a bad state when a wakeup is asserted (not
just a wakeup from full system suspend but also a wakeup from
autosuspend).

We can get the PHY out of its bad state by asserting its "port reset",
but unfortunately that seems to assert a reset onto the USB bus so it
could confuse things if we don't actually deenumerate / reenumerate the
device.

We can also get the PHY out of its bad state by fully resetting it using
the reset from the CRU (clock reset unit), which does a more full
reset.  The CRU-based reset appears to actually cause devices on the bus
to be removed and reinserted, which fixes the problem (albeit in a hacky
way).

It's unfortunate that we need to do a full re-enumeration of devices at
wakeup time, but this is better than alternative of letting the bus get
wedged.

Signed-off-by: Douglas Anderson &lt;dianders@chromium.org&gt;
Signed-off-by: Yunzhi Li &lt;lyz@rock-chips.com&gt;
Signed-off-by: Felipe Balbi &lt;felipe.balbi@linux.intel.com&gt;
</content>
</entry>
<entry>
<title>usb: dwc2: gadget: Program GREFCLK register</title>
<updated>2018-10-02T07:50:22Z</updated>
<author>
<name>Grigor Tovmasyan</name>
<email>Grigor.Tovmasyan@synopsys.com</email>
</author>
<published>2018-08-29T17:01:59Z</published>
<link rel='alternate' type='text/html' href='https://git.zx2c4.com/wireguard-linux/commit/?id=15d9dbf8cbd4fc777a7fc92209903dbb47d0783e'/>
<id>urn:sha1:15d9dbf8cbd4fc777a7fc92209903dbb47d0783e</id>
<content type='text'>
Added dwc2_gadget_program_ref_clk function to program GREFCLK
register in device mode.

Acked-by: Minas Harutyunyan &lt;hminas@synopsys.com&gt;
Signed-off-by: Grigor Tovmasyan &lt;tovmasya@synopsys.com&gt;
Signed-off-by: Felipe Balbi &lt;felipe.balbi@linux.intel.com&gt;
</content>
</entry>
<entry>
<title>usb: dwc2: gadget: Add parameters for GREFCLK register</title>
<updated>2018-10-02T07:50:09Z</updated>
<author>
<name>Grigor Tovmasyan</name>
<email>Grigor.Tovmasyan@synopsys.com</email>
</author>
<published>2018-08-29T17:01:31Z</published>
<link rel='alternate' type='text/html' href='https://git.zx2c4.com/wireguard-linux/commit/?id=f3a61e4e033e808e7ac1239b151ec46f833fff4a'/>
<id>urn:sha1:f3a61e4e033e808e7ac1239b151ec46f833fff4a</id>
<content type='text'>
Added ref_clk_per and sof_cnt_wkup_alert parameters in
dwc2_core_params struct and set default values.

Acked-by: Minas Harutyunyan &lt;hminas@synopsys.com&gt;
Signed-off-by: Grigor Tovmasyan &lt;tovmasya@synopsys.com&gt;
Signed-off-by: Felipe Balbi &lt;felipe.balbi@linux.intel.com&gt;
</content>
</entry>
<entry>
<title>usb: dwc2: Add core parameter for service interval support</title>
<updated>2018-10-02T07:49:26Z</updated>
<author>
<name>Grigor Tovmasyan</name>
<email>Grigor.Tovmasyan@synopsys.com</email>
</author>
<published>2018-08-29T16:59:34Z</published>
<link rel='alternate' type='text/html' href='https://git.zx2c4.com/wireguard-linux/commit/?id=ca531bc2bfa655a1a0acaac4f7a6ea4b2111cc43'/>
<id>urn:sha1:ca531bc2bfa655a1a0acaac4f7a6ea4b2111cc43</id>
<content type='text'>
Added core parameter for service interval based scheduling.

Acked-by: Minas Harutyunyan &lt;hminas@synopsys.com&gt;
Signed-off-by: Grigor Tovmasyan &lt;tovmasya@synopsys.com&gt;
Signed-off-by: Felipe Balbi &lt;felipe.balbi@linux.intel.com&gt;
</content>
</entry>
</feed>
