wireguard-linux/drivers/usb/serial/f81534.c, branch jd/unified-crypt-queue

USB: serial: f81534: fix reading old/new IC config

2018-11-20T17:25:44Z

The F81532/534 had a internal configuration space to save & control IC state with address F81534_CUSTOM_ADDRESS_START (0x2f00). Layout as following: +00h: to indicate the section is valid +01h~04h: UART Mode & port availability +05h~08h: Output pin control on IC power on +09h~12h: Output pin control on working <-- New added Old driver will use +05~08h as default on working, but newer IC will configed with shutdown mode(7) in 05h~08h and working mode with RS232(1) in 09h~12h. It'll make mainstream driver not working. This patch will make mainstream driver compatible older and newer IC. If using a old IC, the +05h~08h will be 00h~06h, we'll direct apply it. If using a new IC, the +05h~08h will be 07h or larger, we'll read +09h~12h to apply newer configuration. Signed-off-by: Ji-Ze Hong (Peter Hong) Signed-off-by: Johan Hovold

f81534: switch to ->get_serial()

2018-10-13T04:50:36Z

Reviewed-by: Johan Hovold Signed-off-by: Al Viro

USB: serial: f81534: fix tx error on some baud rate

2018-01-11T10:00:25Z

The F81532/534 had 4 clocksource 1.846/18.46/14.77/24MHz and baud rates can be up to 1.5Mbits with 24MHz. But on some baud rate (384~500kps), the TX side will send the data frame too close to treat frame error on RX side. This patch will force all TX data frame with delay 1bit gap. Signed-off-by: Ji-Ze Hong (Peter Hong) Signed-off-by: Johan Hovold

USB: serial: f81534: add H/W disable port support

2018-01-11T10:00:25Z

The F81532/534 can be disable port by manufacturer with following H/W design. 1: Connect DCD/DSR/CTS/RI pin to ground. 2: Connect RX pin to ground. In driver, we'll implements some detect method likes following: 1: Read MSR. 2: Turn MCR LOOP bit on, off and read LSR after delay with 60ms. It'll contain BREAK status in LSR. Signed-off-by: Ji-Ze Hong (Peter Hong) Signed-off-by: Johan Hovold

USB: serial: f81534: only read configuration once

2018-01-11T10:00:25Z

In the original code, We'll read configuration in calc_num_ports() and read again in attach(). In fact, we can move all content from attach() to calc_num_ports() to simplify the code. Signed-off-by: Ji-Ze Hong (Peter Hong) [ johan: replace commit summary ] Signed-off-by: Johan Hovold

USB: serial: f81534: add output pin control

2018-01-11T10:00:24Z

The F81532/534 had 3 output pin (M0/SD, M1, M2) with open-drain mode to control transceiver. We'll read it from internal Flash with address 0x2f05~0x2f08 for 4 ports. The value is range from 0 to 7. The M0/SD is MSB of this value. For a examples, If read value is 6, we'll write M0/SD, M1, M2 as 1, 1, 0. Signed-off-by: Ji-Ze Hong (Peter Hong) Signed-off-by: Johan Hovold

USB: serial: f81534: add auto RTS direction support

2018-01-11T10:00:16Z

The F81532/534 had auto RTS direction support for RS485 mode. We'll read it from internal Flash with address 0x2f01~0x2f04 for 4 ports. There are 4 conditions below: 0: F81534_PORT_CONF_RS232. 1: F81534_PORT_CONF_RS485. 2: value error, default to F81534_PORT_CONF_RS232. 3: F81534_PORT_CONF_RS485_INVERT. F81532/534 Clock register (offset +08h) Bit0: UART Enable (always on) Bit2-1: Clock source selector 00: 1.846MHz. 01: 18.46MHz. 10: 24MHz. 11: 14.77MHz. Bit4: Auto direction(RTS) control (RTS pin Low when TX) Bit5: Invert direction(RTS) when Bit4 enabled (RTS pin high when TX) Signed-off-by: Ji-Ze Hong (Peter Hong) [ johan: rename mode-mask define, and only use GENMASK() for masks ] Signed-off-by: Johan Hovold

USB: serial: f81534: add high baud rate support

2018-01-11T09:56:24Z

The F81532/534 had 4 clocksource 1.846/18.46/14.77/24MHz and baud rates can be up to 1.5Mbits with 24MHz. This device may generate data overrun when baud rate setting to 921600bps or higher with old UART trigger level setting (8x14=112) with full loading. We'll change trigger level from 8x14=112 to 8x8=64 to avoid data overrun. Also the read/write of EP0 will be affected by this patch. The worst case of responding time is 20s when all serial port are full loading and trying to access EP0, so we change EP0 timeout from 10 to 20s. F81532/534 Clock register (offset +08h) Bit0: UART Enable (always on) Bit2-1: Clock source selector 00: 1.846MHz. 01: 18.46MHz. 10: 24MHz. 11: 14.77MHz. Signed-off-by: Ji-Ze Hong (Peter Hong) [ johan: only use GENMASK() for masks ] Signed-off-by: Johan Hovold

USB: serial: Remove redundant license text

2017-11-04T10:55:38Z

Now that the SPDX tag is in all USB files, that identifies the license in a specific and legally-defined manner. So the extra GPL text wording can be removed as it is no longer needed at all. This is done on a quest to remove the 700+ different ways that files in the kernel describe the GPL license text. And there's unneeded stuff like the address (sometimes incorrect) for the FSF which is never needed. No copyright headers or other non-license-description text was removed. Signed-off-by: Greg Kroah-Hartman Acked-by: Johan Hovold Signed-off-by: Greg Kroah-Hartman

USB: add SPDX identifiers to all remaining files in drivers/usb/

2017-11-04T10:48:02Z

It's good to have SPDX identifiers in all files to make it easier to audit the kernel tree for correct licenses. Update the drivers/usb/ and include/linux/usb* files with the correct SPDX license identifier based on the license text in the file itself. The SPDX identifier is a legally binding shorthand, which can be used instead of the full boiler plate text. This work is based on a script and data from Thomas Gleixner, Philippe Ombredanne, and Kate Stewart. Cc: Thomas Gleixner Cc: Kate Stewart Cc: Philippe Ombredanne Signed-off-by: Greg Kroah-Hartman Acked-by: Felipe Balbi Acked-by: Johan Hovold Signed-off-by: Greg Kroah-Hartman