wireguard-linux/include/asm-arm/pgtable.h, branch stable

[ARM] move include/asm-arm to arch/arm/include/asm

2008-08-02T20:32:35Z

Move platform independent header files to arch/arm/include/asm, leaving those in asm/arch* and asm/plat* alone. Signed-off-by: Russell King

mm: introduce pte_special pte bit

2008-04-28T15:58:23Z

s390 for one, cannot implement VM_MIXEDMAP with pfn_valid, due to their memory model (which is more dynamic than most). Instead, they had proposed to implement it with an additional path through vm_normal_page(), using a bit in the pte to determine whether or not the page should be refcounted: vm_normal_page() { ... if (unlikely(vma->vm_flags & (VM_PFNMAP|VM_MIXEDMAP))) { if (vma->vm_flags & VM_MIXEDMAP) { #ifdef s390 if (!mixedmap_refcount_pte(pte)) return NULL; #else if (!pfn_valid(pfn)) return NULL; #endif goto out; } ... } This is fine, however if we are allowed to use a bit in the pte to determine refcountedness, we can use that to _completely_ replace all the vma based schemes. So instead of adding more cases to the already complex vma-based scheme, we can have a clearly seperate and simple pte-based scheme (and get slightly better code generation in the process): vm_normal_page() { #ifdef s390 if (!mixedmap_refcount_pte(pte)) return NULL; return pte_page(pte); #else ... #endif } And finally, we may rather make this concept usable by any architecture rather than making it s390 only, so implement a new type of pte state for this. Unfortunately the old vma based code must stay, because some architectures may not be able to spare pte bits. This makes vm_normal_page a little bit more ugly than we would like, but the 2 cases are clearly seperate. So introduce a pte_special pte state, and use it in mm/memory.c. It is currently a noop for all architectures, so this doesn't actually result in any compiled code changes to mm/memory.o. BTW: I haven't put vm_normal_page() into arch code as-per an earlier suggestion. The reason is that, regardless of where vm_normal_page is actually implemented, the *abstraction* is still exactly the same. Also, while it depends on whether the architecture has pte_special or not, that is the only two possible cases, and it really isn't an arch specific function -- the role of the arch code should be to provide primitive functions and accessors with which to build the core code; pte_special does that. We do not want architectures to know or care about vm_normal_page itself, and we definitely don't want them being able to invent something new there out of sight of mm/ code. If we made vm_normal_page an arch function, then we have to make vm_insert_mixed (next patch) an arch function too. So I don't think moving it to arch code fundamentally improves any abstractions, while it does practically make the code more difficult to follow, for both mm and arch developers, and easier to misuse. [akpm@linux-foundation.org: build fix] Signed-off-by: Nick Piggin Acked-by: Carsten Otte Cc: Jared Hulbert Cc: Martin Schwidefsky Cc: Heiko Carstens Signed-off-by: Andrew Morton Signed-off-by: Linus Torvalds

[ARM] 4644/2: fix flush_kern_tlb_range() in module space

2007-11-08T10:07:14Z

For kernel addresses between TASK_SIZE and PAGE_OFFSET, flush_tlb_kern_range() does not work as would be expected. The TLB invalidate works with a matching ASID, or on entries marked as global. The set_pte_at() macro marks addresses >= PAGE_OFFSET as global, but not addresses from TASK_SIZE to PAGE_OFFSET, which are also kernel addresses. The result is that the entries in this range are not actually invalidated by flush_tlb_kern_range(). This patch instead marks addresses >= TASK_SIZE as global. Signed-off-by: Satoru Fujii Signed-off-by: Kevin Hilman Signed-off-by: Russell King

mm: remove ptep_establish()

2007-07-17T17:22:59Z

The last user of ptep_establish in mm/ is long gone. Remove the architecture primitive as well. Signed-off-by: Martin Schwidefsky Cc: Hugh Dickins Signed-off-by: Andrew Morton Signed-off-by: Linus Torvalds

page table handling cleanup

2007-07-16T16:05:36Z

Kill pte_rdprotect(), pte_exprotect(), pte_mkread(), pte_mkexec(), pte_read(), pte_exec(), and pte_user() except where arch-specific code is making use of them. Signed-off-by: Jan Beulich Cc: Andi Kleen Cc: Christoph Hellwig Signed-off-by: Andrew Morton Signed-off-by: Linus Torvalds

Clean up mostly unused IOSPACE macros

2007-05-08T18:15:13Z

Most architectures defined three macros, MK_IOSPACE_PFN(), GET_IOSPACE() and GET_PFN() in pgtable.h. However, the only callers of any of these macros are in Sparc specific code, either in arch/sparc, arch/sparc64 or drivers/sbus. This patch removes the redundant macros from all architectures except sparc and sparc64. Signed-off-by: David Gibson Cc: Signed-off-by: Andrew Morton Signed-off-by: Linus Torvalds

[ARM] 4158/1: Fix user page protection macros

2007-02-11T17:06:17Z

The PAGE_* user page protection macros don't take into account the configured memory policy and other architecture specific bits like the global/ASID and shared mapping bits. Instead of constants let these depend on a variable fixed up at init just like PAGE_KERNEL. Signed-off-by: Imre Deak Signed-off-by: Russell King

[ARM] Unuse another Linux PTE bit

2006-12-13T14:34:43Z

L_PTE_ASID is not really required to be stored in every PTE, since we can identify it via the address passed to set_pte_at(). So, create set_pte_ext() which takes the address of the PTE to set, the Linux PTE value, and the additional CPU PTE bits which aren't encoded in the Linux PTE value. Signed-off-by: Russell King

[ARM] 3971/1: xsc3: get rid of L_PTE_COHERENT

2006-12-01T23:40:23Z

Merge L_PTE_COHERENT with L_PTE_SHARED and free up a L_PTE_* bit. Signed-off-by: Lennert Buytenhek Signed-off-by: Dan Williams Signed-off-by: Russell King

Merge branch 'devel' of master.kernel.org:/home/rmk/linux-2.6-arm

2006-09-28T21:40:39Z

* 'devel' of master.kernel.org:/home/rmk/linux-2.6-arm: (130 commits) [ARM] 3856/1: Add clocksource for Intel IXP4xx platforms [ARM] 3855/1: Add generic time support [ARM] 3873/1: S3C24XX: Add irq_chip names [ARM] 3872/1: S3C24XX: Apply consistant tabbing to irq_chips [ARM] 3871/1: S3C24XX: Fix ordering of EINT4..23 [ARM] nommu: confirms the CR_V bit in nommu mode [ARM] nommu: abort handler fixup for !CPU_CP15_MMU cores. [ARM] 3870/1: AT91: Start removing static memory mappings [ARM] 3869/1: AT91: NAND support for DK and KB9202 boards [ARM] 3868/1: AT91 hardware header update [ARM] 3867/1: AT91 GPIO update [ARM] 3866/1: AT91 clock update [ARM] 3865/1: AT91RM9200 header updates [ARM] 3862/2: S3C2410 - add basic power management support for AML M5900 series [ARM] kthread: switch arch/arm/kernel/apm.c [ARM] Off-by-one in arch/arm/common/icst* [ARM] 3864/1: Refactore sharpsl_pm [ARM] 3863/1: Add Locomo SPI Device [ARM] 3847/2: Convert LOMOMO to use struct device for GPIOs [ARM] Use CPU_CACHE_* where possible in asm/cacheflush.h ...