<feed xmlns='http://www.w3.org/2005/Atom'>
<title>wireguard-linux/include/asm-powerpc/exception.h, branch stable</title>
<subtitle>WireGuard for the Linux kernel</subtitle>
<id>https://git.zx2c4.com/wireguard-linux/atom/include/asm-powerpc/exception.h?h=stable</id>
<link rel='self' href='https://git.zx2c4.com/wireguard-linux/atom/include/asm-powerpc/exception.h?h=stable'/>
<link rel='alternate' type='text/html' href='https://git.zx2c4.com/wireguard-linux/'/>
<updated>2008-08-04T02:02:00Z</updated>
<entry>
<title>powerpc: Move include files to arch/powerpc/include/asm</title>
<updated>2008-08-04T02:02:00Z</updated>
<author>
<name>Stephen Rothwell</name>
<email>sfr@canb.auug.org.au</email>
</author>
<published>2008-08-01T05:20:30Z</published>
<link rel='alternate' type='text/html' href='https://git.zx2c4.com/wireguard-linux/commit/?id=b8b572e1015f81b4e748417be2629dfe51ab99f9'/>
<id>urn:sha1:b8b572e1015f81b4e748417be2629dfe51ab99f9</id>
<content type='text'>
from include/asm-powerpc.  This is the result of a

mkdir arch/powerpc/include/asm
git mv include/asm-powerpc/* arch/powerpc/include/asm

Followed by a few documentation/comment fixups and a couple of places
where &lt;asm-powepc/...&gt; was being used explicitly.  Of the latter only
one was outside the arch code and it is a driver only built for powerpc.

Signed-off-by: Stephen Rothwell &lt;sfr@canb.auug.org.au&gt;
Signed-off-by: Paul Mackerras &lt;paulus@samba.org&gt;
</content>
</entry>
<entry>
<title>[POWERPC] irqtrace support for 64-bit powerpc</title>
<updated>2008-04-18T05:38:47Z</updated>
<author>
<name>Benjamin Herrenschmidt</name>
<email>benh@kernel.crashing.org</email>
</author>
<published>2008-04-17T04:35:01Z</published>
<link rel='alternate' type='text/html' href='https://git.zx2c4.com/wireguard-linux/commit/?id=945feb174b14e7098cc7ecf0cf4768d35bc52f9c'/>
<id>urn:sha1:945feb174b14e7098cc7ecf0cf4768d35bc52f9c</id>
<content type='text'>
This adds the low level irq tracing hooks to the powerpc architecture
needed to enable full lockdep functionality.

This is partly based on Johannes Berg's initial version.  I removed
the asm trampoline that isn't needed (thus improving performance) and
modified all sorts of bits and pieces, reworking most of the assembly,
etc...

Signed-off-by: Benjamin Herrenschmidt &lt;benh@kernel.crashing.org&gt;
Signed-off-by: Paul Mackerras &lt;paulus@samba.org&gt;
</content>
</entry>
<entry>
<title>[POWERPC] Move lowlevel runlatch calls under cpu feature control</title>
<updated>2007-09-13T15:33:22Z</updated>
<author>
<name>Olof Johansson</name>
<email>olof@lixom.net</email>
</author>
<published>2007-09-05T02:42:30Z</published>
<link rel='alternate' type='text/html' href='https://git.zx2c4.com/wireguard-linux/commit/?id=a416561bf790d55db68b2980c2a6951981018041'/>
<id>urn:sha1:a416561bf790d55db68b2980c2a6951981018041</id>
<content type='text'>
There's no need to call the runlatch on functions on processors that
don't implement them (CPU_FTR_CTRL).

Signed-off-by: Olof Johansson &lt;olof@lixom.net&gt;
Signed-off-by: Paul Mackerras &lt;paulus@samba.org&gt;
</content>
</entry>
<entry>
<title>[POWERPC] Split out iSeries specific exception macros</title>
<updated>2007-08-22T06:48:35Z</updated>
<author>
<name>Stephen Rothwell</name>
<email>sfr@canb.auug.org.au</email>
</author>
<published>2007-08-22T03:48:37Z</published>
<link rel='alternate' type='text/html' href='https://git.zx2c4.com/wireguard-linux/commit/?id=7180e3e636deff82f8810291878a184f21142fa9'/>
<id>urn:sha1:7180e3e636deff82f8810291878a184f21142fa9</id>
<content type='text'>
Signed-off-by: Stephen Rothwell &lt;sfr@canb.auug.org.au&gt;
Signed-off-by: Paul Mackerras &lt;paulus@samba.org&gt;
</content>
</entry>
<entry>
<title>[POWERPC] Move the exception macros into a header file</title>
<updated>2007-08-22T06:48:35Z</updated>
<author>
<name>Stephen Rothwell</name>
<email>sfr@canb.auug.org.au</email>
</author>
<published>2007-08-22T03:46:44Z</published>
<link rel='alternate' type='text/html' href='https://git.zx2c4.com/wireguard-linux/commit/?id=f9ff0f304833be9a6a605c84e24d630d5aef2230'/>
<id>urn:sha1:f9ff0f304833be9a6a605c84e24d630d5aef2230</id>
<content type='text'>
It makes head_64.S a bit more readable and will allow us to move the
iSeries exceptions elsewhere.

This also removes the last line of the comment:

 * The following macros define the code that appears as
 * the prologue to each of the exception handlers.  They
 * are split into two parts to allow a single kernel binary
 * to be used for pSeries and iSeries.
 * LOL.  One day... - paulus

Anything is possible. :-)

Signed-off-by: Stephen Rothwell &lt;sfr@canb.auug.org.au&gt;
Signed-off-by: Paul Mackerras &lt;paulus@samba.org&gt;
</content>
</entry>
</feed>
