<feed xmlns='http://www.w3.org/2005/Atom'>
<title>wireguard-linux/include/asm-xtensa/byteorder.h, branch stable</title>
<subtitle>WireGuard for the Linux kernel</subtitle>
<id>https://git.zx2c4.com/wireguard-linux/atom/include/asm-xtensa/byteorder.h?h=stable</id>
<link rel='self' href='https://git.zx2c4.com/wireguard-linux/atom/include/asm-xtensa/byteorder.h?h=stable'/>
<link rel='alternate' type='text/html' href='https://git.zx2c4.com/wireguard-linux/'/>
<updated>2008-11-06T18:25:09Z</updated>
<entry>
<title>xtensa: move headers files to arch/xtensa/include</title>
<updated>2008-11-06T18:25:09Z</updated>
<author>
<name>Chris Zankel</name>
<email>chris@zankel.net</email>
</author>
<published>2008-11-06T14:40:46Z</published>
<link rel='alternate' type='text/html' href='https://git.zx2c4.com/wireguard-linux/commit/?id=367b8112fe2ea5c39a7bb4d263dcdd9b612fae18'/>
<id>urn:sha1:367b8112fe2ea5c39a7bb4d263dcdd9b612fae18</id>
<content type='text'>
Move all header files for xtensa to arch/xtensa/include and platform and
variant header files to the appropriate arch/xtensa/platforms/ and
arch/xtensa/variants/ directories.

Moving the files gets also rid of all uses of symlinks in the Makefile.

This has been completed already for the majority of the architectures
and xtensa is one out of six missing.

Signed-off-by: Sam Ravnborg &lt;sam@ravnborg.org&gt;
Signed-off-by: Chris Zankel &lt;chris@zankel.net&gt;
</content>
</entry>
<entry>
<title>xtensa: use the new byteorder headers</title>
<updated>2008-11-06T14:46:29Z</updated>
<author>
<name>Harvey Harrison</name>
<email>harvey.harrison@gmail.com</email>
</author>
<published>2008-11-05T18:35:31Z</published>
<link rel='alternate' type='text/html' href='https://git.zx2c4.com/wireguard-linux/commit/?id=206ead28377fee86b129637edada8c77816cc0d6'/>
<id>urn:sha1:206ead28377fee86b129637edada8c77816cc0d6</id>
<content type='text'>
Signed-off-by: Harvey Harrison &lt;harvey.harrison@gmail.com&gt;
Signed-off-by: Chris Zankel &lt;chris@zankel.net&gt;
</content>
</entry>
<entry>
<title>[XTENSA] clean-up header files</title>
<updated>2007-06-01T00:47:01Z</updated>
<author>
<name>Chris Zankel</name>
<email>chris@zankel.net</email>
</author>
<published>2007-06-01T00:47:01Z</published>
<link rel='alternate' type='text/html' href='https://git.zx2c4.com/wireguard-linux/commit/?id=de4f6e5b41bef50fc981410ae8380f27f4e93bf8'/>
<id>urn:sha1:de4f6e5b41bef50fc981410ae8380f27f4e93bf8</id>
<content type='text'>
The header files in the asm-xtensa directory are not clean and
'make headers_check' fails. This is a first patch to fix most of
the header files. It removes unnecessary include statements and
adds some that are required for building the kernel. The linker
script required some updates or the linking stage would fail.

Signed-off-by: Chris Zankel &lt;chris@zankel.net&gt;
</content>
</entry>
<entry>
<title>[PATCH] xtensa: remove extra header files</title>
<updated>2006-12-10T17:55:39Z</updated>
<author>
<name>Chris Zankel</name>
<email>czankel@tensilica.com</email>
</author>
<published>2006-12-10T10:18:48Z</published>
<link rel='alternate' type='text/html' href='https://git.zx2c4.com/wireguard-linux/commit/?id=173d6681380aa1d60dfc35ed7178bd7811ba2784'/>
<id>urn:sha1:173d6681380aa1d60dfc35ed7178bd7811ba2784</id>
<content type='text'>
The Xtensa port contained many header files that were never needed.  This
rather lengthy patch removes all those files.  Unfortunately, there were
many dependencies that needed to be updated, so this patch touches quite a
few source files.

Signed-off-by: Chris Zankel &lt;chris@zankel.net&gt;
Signed-off-by: Andrew Morton &lt;akpm@osdl.org&gt;
Signed-off-by: Linus Torvalds &lt;torvalds@osdl.org&gt;
</content>
</entry>
<entry>
<title>[PATCH] xtensa: fix irq and misc fixes</title>
<updated>2006-12-10T17:55:39Z</updated>
<author>
<name>Chris Zankel</name>
<email>czankel@tensilica.com</email>
</author>
<published>2006-12-10T10:18:47Z</published>
<link rel='alternate' type='text/html' href='https://git.zx2c4.com/wireguard-linux/commit/?id=fd43fe19b830d6cd0eba08a6c6a5f71a6bd9c1b0'/>
<id>urn:sha1:fd43fe19b830d6cd0eba08a6c6a5f71a6bd9c1b0</id>
<content type='text'>
Update the architecture specific interrupt handling code for Xtensa to support
the new API.  Use generic BUG macros in bug.h, and some minor fixes.

Signed-off-by: Chris Zankel &lt;chris@zankel.net&gt;
Signed-off-by: Andrew Morton &lt;akpm@osdl.org&gt;
Signed-off-by: Linus Torvalds &lt;torvalds@osdl.org&gt;
</content>
</entry>
<entry>
<title>[PATCH] xtensa: Architecture support for Tensilica Xtensa Part 6</title>
<updated>2005-06-24T07:05:22Z</updated>
<author>
<name>Chris Zankel</name>
<email>czankel@tensilica.com</email>
</author>
<published>2005-06-24T05:01:26Z</published>
<link rel='alternate' type='text/html' href='https://git.zx2c4.com/wireguard-linux/commit/?id=9a8fd5589902153a134111ed7a40f9cca1f83254'/>
<id>urn:sha1:9a8fd5589902153a134111ed7a40f9cca1f83254</id>
<content type='text'>
The attached patches provides part 6 of an architecture implementation for the
Tensilica Xtensa CPU series.

Signed-off-by: Chris Zankel &lt;chris@zankel.net&gt;
Signed-off-by: Andrew Morton &lt;akpm@osdl.org&gt;
Signed-off-by: Linus Torvalds &lt;torvalds@osdl.org&gt;
</content>
</entry>
</feed>
