<feed xmlns='http://www.w3.org/2005/Atom'>
<title>wireguard-linux/sound/soc/codecs/rt1015.c, branch jd/orphan-parallel</title>
<subtitle>WireGuard for the Linux kernel</subtitle>
<id>https://git.zx2c4.com/wireguard-linux/atom/sound/soc/codecs/rt1015.c?h=jd%2Forphan-parallel</id>
<link rel='self' href='https://git.zx2c4.com/wireguard-linux/atom/sound/soc/codecs/rt1015.c?h=jd%2Forphan-parallel'/>
<link rel='alternate' type='text/html' href='https://git.zx2c4.com/wireguard-linux/'/>
<updated>2020-09-14T12:53:57Z</updated>
<entry>
<title>ASoC: rt1015: Fix the failure to flush DAC data before playback</title>
<updated>2020-09-14T12:53:57Z</updated>
<author>
<name>derek.fang</name>
<email>derek.fang@realtek.com</email>
</author>
<published>2020-09-14T08:57:19Z</published>
<link rel='alternate' type='text/html' href='https://git.zx2c4.com/wireguard-linux/commit/?id=8d9a14fc7371a18d54226bf2542f77b11e5a7101'/>
<id>urn:sha1:8d9a14fc7371a18d54226bf2542f77b11e5a7101</id>
<content type='text'>
Fix the failure to flush DAC data before playback.

Signed-off-by: derek.fang &lt;derek.fang@realtek.com&gt;
Link: https://lore.kernel.org/r/1600073839-6762-2-git-send-email-derek.fang@realtek.com
Signed-off-by: Mark Brown &lt;broonie@kernel.org&gt;
</content>
</entry>
<entry>
<title>ASoC: rt1015: Fix DC calibration on bypass boost mode</title>
<updated>2020-09-14T12:53:57Z</updated>
<author>
<name>derek.fang</name>
<email>derek.fang@realtek.com</email>
</author>
<published>2020-09-14T08:57:18Z</published>
<link rel='alternate' type='text/html' href='https://git.zx2c4.com/wireguard-linux/commit/?id=da145172b236b1ac322fa81f6250aa59074eba68'/>
<id>urn:sha1:da145172b236b1ac322fa81f6250aa59074eba68</id>
<content type='text'>
Fix the DC calibration unsuccessful issue on rt1015
bypass boost mode.

Signed-off-by: derek.fang &lt;derek.fang@realtek.com&gt;
Link: https://lore.kernel.org/r/1600073839-6762-1-git-send-email-derek.fang@realtek.com
Signed-off-by: Mark Brown &lt;broonie@kernel.org&gt;
</content>
</entry>
<entry>
<title>ASoC: rt1015: add missing header inclusion</title>
<updated>2020-06-25T18:21:02Z</updated>
<author>
<name>Tzung-Bi Shih</name>
<email>tzungbi@google.com</email>
</author>
<published>2020-06-25T15:35:43Z</published>
<link rel='alternate' type='text/html' href='https://git.zx2c4.com/wireguard-linux/commit/?id=72ac4a4bef48e67bb26bc5a01d68c8163def013d'/>
<id>urn:sha1:72ac4a4bef48e67bb26bc5a01d68c8163def013d</id>
<content type='text'>
To fix compilation error:

error: implicit declaration of function 'ACPI_PTR'
[-Werror,-Wimplicit-function-declaration]
                .acpi_match_table = ACPI_PTR(rt1015_acpi_match),
		                    ^

Adds the missing header "acpi.h" inclusion and sorts in alphabetical.

Signed-off-by: Tzung-Bi Shih &lt;tzungbi@google.com&gt;
Link: https://lore.kernel.org/r/20200625153543.85039-4-tzungbi@google.com
Signed-off-by: Mark Brown &lt;broonie@kernel.org&gt;
</content>
</entry>
<entry>
<title>ASoC: rt1015: Flush DAC data before playback.</title>
<updated>2020-06-16T11:39:33Z</updated>
<author>
<name>Jack Yu</name>
<email>jack.yu@realtek.com</email>
</author>
<published>2020-06-16T02:36:44Z</published>
<link rel='alternate' type='text/html' href='https://git.zx2c4.com/wireguard-linux/commit/?id=668b1508cf9e3dfd1bfad4f4906d1eaeae0a4015'/>
<id>urn:sha1:668b1508cf9e3dfd1bfad4f4906d1eaeae0a4015</id>
<content type='text'>
Flush DAC data before playback.

Signed-off-by: Jack Yu &lt;jack.yu@realtek.com&gt;
Link: https://lore.kernel.org/r/20200616023644.4523-1-jack.yu@realtek.com
Signed-off-by: Mark Brown &lt;broonie@kernel.org&gt;
</content>
</entry>
<entry>
<title>ASoC: rt1015: Update rt1015 default register value according to spec modification.</title>
<updated>2020-06-15T14:18:33Z</updated>
<author>
<name>Jack Yu</name>
<email>jack.yu@realtek.com</email>
</author>
<published>2020-06-15T03:24:32Z</published>
<link rel='alternate' type='text/html' href='https://git.zx2c4.com/wireguard-linux/commit/?id=e74a1e7eaed95f2c6422e7cf9ed70154f17a6db3'/>
<id>urn:sha1:e74a1e7eaed95f2c6422e7cf9ed70154f17a6db3</id>
<content type='text'>
Update rt1015 default register value according to spec modification.

Signed-off-by: Jack Yu &lt;jack.yu@realtek.com&gt;
Link: https://lore.kernel.org/r/20200615032433.31061-1-jack.yu@realtek.com
Signed-off-by: Mark Brown &lt;broonie@kernel.org&gt;
</content>
</entry>
<entry>
<title>ASoC: rt1015: Enable class-D silence and clock detections</title>
<updated>2020-05-29T12:30:06Z</updated>
<author>
<name>derek.fang</name>
<email>derek.fang@realtek.com</email>
</author>
<published>2020-05-29T11:05:10Z</published>
<link rel='alternate' type='text/html' href='https://git.zx2c4.com/wireguard-linux/commit/?id=2aec8ccc1a814ca41b70710e1960afd034d1e3ab'/>
<id>urn:sha1:2aec8ccc1a814ca41b70710e1960afd034d1e3ab</id>
<content type='text'>
Avoid noise under bypass boost mode.

Signed-off-by: derek.fang &lt;derek.fang@realtek.com&gt;
Link: https://lore.kernel.org/r/1590750310-30085-1-git-send-email-derek.fang@realtek.com
Signed-off-by: Mark Brown &lt;broonie@kernel.org&gt;
</content>
</entry>
<entry>
<title>ASoC: rt1015: Add condition to prevent SoC providing bclk in ratio of 50 times of sample rate.</title>
<updated>2020-05-04T15:23:24Z</updated>
<author>
<name>Jack Yu</name>
<email>jack.yu@realtek.com</email>
</author>
<published>2020-05-04T11:20:13Z</published>
<link rel='alternate' type='text/html' href='https://git.zx2c4.com/wireguard-linux/commit/?id=d696a61413b405a13bbe04f31e6f4531a426fee7'/>
<id>urn:sha1:d696a61413b405a13bbe04f31e6f4531a426fee7</id>
<content type='text'>
Add condition to prevent SoC providing bclk in ratio of 50 times of sample rate.

Signed-off-by: Jack Yu &lt;jack.yu@realtek.com&gt;
Link: https://lore.kernel.org/r/20200504112013.2499-1-jack.yu@realtek.com
Signed-off-by: Mark Brown &lt;broonie@kernel.org&gt;
</content>
</entry>
<entry>
<title>Merge branch 'for-5.6' of https://git.kernel.org/pub/scm/linux/kernel/git/broonie/sound into asoc-5.7</title>
<updated>2020-03-04T13:38:36Z</updated>
<author>
<name>Mark Brown</name>
<email>broonie@kernel.org</email>
</author>
<published>2020-03-04T13:38:36Z</published>
<link rel='alternate' type='text/html' href='https://git.zx2c4.com/wireguard-linux/commit/?id=d98bf8894bfbff7c1899a5d050106b287b12182e'/>
<id>urn:sha1:d98bf8894bfbff7c1899a5d050106b287b12182e</id>
<content type='text'>
</content>
</entry>
<entry>
<title>ASoC: rt1015: modify pre-divider for sysclk</title>
<updated>2020-03-03T14:00:01Z</updated>
<author>
<name>Jack Yu</name>
<email>jack.yu@realtek.com</email>
</author>
<published>2020-03-03T02:59:13Z</published>
<link rel='alternate' type='text/html' href='https://git.zx2c4.com/wireguard-linux/commit/?id=4b01618b624736fc7d74f150f623d11b17b7b288'/>
<id>urn:sha1:4b01618b624736fc7d74f150f623d11b17b7b288</id>
<content type='text'>
Modify pre-divider for system clock.

Signed-off-by: Jack Yu &lt;jack.yu@realtek.com&gt;
Link: https://lore.kernel.org/r/20200303025913.24499-1-jack.yu@realtek.com
Signed-off-by: Mark Brown &lt;broonie@kernel.org&gt;
</content>
</entry>
<entry>
<title>Merge branch 'for-5.6' of https://git.kernel.org/pub/scm/linux/kernel/git/broonie/sound into asoc-5.7</title>
<updated>2020-03-02T14:39:08Z</updated>
<author>
<name>Mark Brown</name>
<email>broonie@kernel.org</email>
</author>
<published>2020-03-02T14:39:08Z</published>
<link rel='alternate' type='text/html' href='https://git.zx2c4.com/wireguard-linux/commit/?id=cd1fa30142e2fc24ae81448f420197712d49d526'/>
<id>urn:sha1:cd1fa30142e2fc24ae81448f420197712d49d526</id>
<content type='text'>
</content>
</entry>
</feed>
